gem5  v21.1.0.2
register_manager.cc
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33  * Author: Mark Wyse
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35 
37 
38 #include "config/the_gpu_isa.hh"
39 #include "debug/GPURename.hh"
44 #include "gpu-compute/wavefront.hh"
45 #include "params/RegisterManager.hh"
46 
47 namespace gem5
48 {
49 
50 RegisterManager::RegisterManager(const RegisterManagerParams &p)
51  : SimObject(p), srfPoolMgrs(p.srf_pool_managers),
52  vrfPoolMgrs(p.vrf_pool_managers)
53 {
54  if (p.policy == "static") {
56  } else {
57  fatal("Unimplemented Register Manager Policy");
58  }
59 
60 }
61 
63 {
64  for (auto mgr : srfPoolMgrs) {
65  delete mgr;
66  }
67  for (auto mgr : vrfPoolMgrs) {
68  delete mgr;
69  }
70 }
71 
72 void
74 {
75  policy->exec();
76 }
77 
78 void
80 {
81  computeUnit = cu;
83  for (int i = 0; i < srfPoolMgrs.size(); i++) {
84  fatal_if(computeUnit->srf[i]->numRegs() %
85  srfPoolMgrs[i]->minAllocation(),
86  "Min SGPR allocation is not multiple of VRF size\n");
87  }
88  for (int i = 0; i < vrfPoolMgrs.size(); i++) {
89  fatal_if(computeUnit->vrf[i]->numRegs() %
90  vrfPoolMgrs[i]->minAllocation(),
91  "Min VGPG allocation is not multiple of VRF size\n");
92  }
93 }
94 
95 // compute mapping for vector register
96 int
98 {
99  return policy->mapVgpr(w, vgprIndex);
100 }
101 
102 // compute mapping for scalar register
103 int
105 {
106  return policy->mapSgpr(w, sgprIndex);
107 }
108 
109 // check if we can allocate registers
110 bool
111 RegisterManager::canAllocateVgprs(int simdId, int nWfs, int demandPerWf)
112 {
113  return policy->canAllocateVgprs(simdId, nWfs, demandPerWf);
114 }
115 
116 bool
117 RegisterManager::canAllocateSgprs(int simdId, int nWfs, int demandPerWf)
118 {
119  return policy->canAllocateSgprs(simdId, nWfs, demandPerWf);
120 }
121 
122 // allocate registers
123 void
125  int scalarDemand)
126 {
127  policy->allocateRegisters(w, vectorDemand, scalarDemand);
128 }
129 
130 void
132 {
134 }
135 
136 } // namespace gem5
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:189
gem5::RegisterManagerPolicy::freeRegisters
virtual void freeRegisters(Wavefront *w)=0
static_register_manager_policy.hh
gem5::MipsISA::w
Bitfield< 0 > w
Definition: pra_constants.hh:281
gem5::ComputeUnit::srf
std::vector< ScalarRegisterFile * > srf
Definition: compute_unit.hh:299
gem5::RegisterManagerPolicy::allocateRegisters
virtual void allocateRegisters(Wavefront *w, int vectorDemand, int scalarDemand)=0
gem5::StaticRegisterManagerPolicy
Definition: static_register_manager_policy.hh:44
gem5::Wavefront
Definition: wavefront.hh:62
compute_unit.hh
gem5::RegisterManager::setParent
void setParent(ComputeUnit *cu)
Definition: register_manager.cc:79
gem5::RegisterManager::vrfPoolMgrs
std::vector< PoolManager * > vrfPoolMgrs
Definition: register_manager.hh:82
gem5::ArmISA::i
Bitfield< 7 > i
Definition: misc_types.hh:66
gem5::ComputeUnit::vrf
std::vector< VectorRegisterFile * > vrf
Definition: compute_unit.hh:297
wavefront.hh
gem5::RegisterManager::mapSgpr
int mapSgpr(Wavefront *w, int sgprIndex)
Definition: register_manager.cc:104
gem5::ComputeUnit
Definition: compute_unit.hh:203
vector_register_file.hh
gem5::RegisterManager::freeRegisters
void freeRegisters(Wavefront *w)
Definition: register_manager.cc:131
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::RegisterManagerPolicy::setParent
virtual void setParent(ComputeUnit *_cu)
Definition: register_manager_policy.hh:58
scalar_register_file.hh
gem5::RegisterManager::srfPoolMgrs
std::vector< PoolManager * > srfPoolMgrs
Definition: register_manager.hh:81
gem5::RegisterManagerPolicy::canAllocateVgprs
virtual bool canAllocateVgprs(int simdId, int nWfs, int demandPerWf)=0
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::RegisterManager::policy
RegisterManagerPolicy * policy
Definition: register_manager.hh:85
gem5::RegisterManager::mapVgpr
int mapVgpr(Wavefront *w, int vgprIndex)
Definition: register_manager.cc:97
gem5::RegisterManager::exec
void exec()
Definition: register_manager.cc:73
register_manager.hh
gem5::RegisterManagerPolicy::mapSgpr
virtual int mapSgpr(Wavefront *w, int sgprIndex)=0
gem5::RegisterManagerPolicy::exec
virtual void exec()=0
gem5::RegisterManager::allocateRegisters
void allocateRegisters(Wavefront *w, int vectorDemand, int scalarDemand)
Definition: register_manager.cc:124
gem5::RegisterManager::RegisterManager
RegisterManager(const RegisterManagerParams &params)
Definition: register_manager.cc:50
gem5::RegisterManagerPolicy::mapVgpr
virtual int mapVgpr(Wavefront *w, int vgprIndex)=0
gem5::RegisterManager::canAllocateSgprs
bool canAllocateSgprs(int simdId, int nWfs, int demandPerWf)
Definition: register_manager.cc:117
gem5::RegisterManager::~RegisterManager
~RegisterManager()
Definition: register_manager.cc:62
gem5::RegisterManagerPolicy::canAllocateSgprs
virtual bool canAllocateSgprs(int simdId, int nWfs, int demandPerWf)=0
gem5::RegisterManager::canAllocateVgprs
bool canAllocateVgprs(int simdId, int nWfs, int demandPerWf)
Definition: register_manager.cc:111
fatal_if
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition: logging.hh:225
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::RegisterManager::computeUnit
ComputeUnit * computeUnit
Definition: register_manager.hh:87

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