gem5  v21.2.1.1
register_manager.cc
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31  * Author: Mark Wyse
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33 
35 
36 #include "config/the_gpu_isa.hh"
37 #include "debug/GPURename.hh"
42 #include "gpu-compute/wavefront.hh"
43 #include "params/RegisterManager.hh"
44 
45 namespace gem5
46 {
47 
48 RegisterManager::RegisterManager(const RegisterManagerParams &p)
49  : SimObject(p), srfPoolMgrs(p.srf_pool_managers),
50  vrfPoolMgrs(p.vrf_pool_managers)
51 {
52  if (p.policy == "static") {
54  } else {
55  fatal("Unimplemented Register Manager Policy");
56  }
57 
58 }
59 
61 {
62  for (auto mgr : srfPoolMgrs) {
63  delete mgr;
64  }
65  for (auto mgr : vrfPoolMgrs) {
66  delete mgr;
67  }
68 }
69 
70 void
72 {
73  policy->exec();
74 }
75 
76 void
78 {
79  computeUnit = cu;
81  for (int i = 0; i < srfPoolMgrs.size(); i++) {
82  fatal_if(computeUnit->srf[i]->numRegs() %
83  srfPoolMgrs[i]->minAllocation(),
84  "Min SGPR allocation is not multiple of VRF size\n");
85  }
86  for (int i = 0; i < vrfPoolMgrs.size(); i++) {
87  fatal_if(computeUnit->vrf[i]->numRegs() %
88  vrfPoolMgrs[i]->minAllocation(),
89  "Min VGPG allocation is not multiple of VRF size\n");
90  }
91 }
92 
93 // compute mapping for vector register
94 int
96 {
97  return policy->mapVgpr(w, vgprIndex);
98 }
99 
100 // compute mapping for scalar register
101 int
103 {
104  return policy->mapSgpr(w, sgprIndex);
105 }
106 
107 // check if we can allocate registers
108 bool
109 RegisterManager::canAllocateVgprs(int simdId, int nWfs, int demandPerWf)
110 {
111  return policy->canAllocateVgprs(simdId, nWfs, demandPerWf);
112 }
113 
114 bool
115 RegisterManager::canAllocateSgprs(int simdId, int nWfs, int demandPerWf)
116 {
117  return policy->canAllocateSgprs(simdId, nWfs, demandPerWf);
118 }
119 
120 // allocate registers
121 void
123  int scalarDemand)
124 {
125  policy->allocateRegisters(w, vectorDemand, scalarDemand);
126 }
127 
128 void
130 {
132 }
133 
134 } // namespace gem5
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:190
gem5::RegisterManagerPolicy::freeRegisters
virtual void freeRegisters(Wavefront *w)=0
static_register_manager_policy.hh
gem5::MipsISA::w
Bitfield< 0 > w
Definition: pra_constants.hh:281
gem5::ComputeUnit::srf
std::vector< ScalarRegisterFile * > srf
Definition: compute_unit.hh:297
gem5::RegisterManagerPolicy::allocateRegisters
virtual void allocateRegisters(Wavefront *w, int vectorDemand, int scalarDemand)=0
gem5::StaticRegisterManagerPolicy
Definition: static_register_manager_policy.hh:42
gem5::Wavefront
Definition: wavefront.hh:60
compute_unit.hh
gem5::RegisterManager::setParent
void setParent(ComputeUnit *cu)
Definition: register_manager.cc:77
gem5::RegisterManager::vrfPoolMgrs
std::vector< PoolManager * > vrfPoolMgrs
Definition: register_manager.hh:80
gem5::ArmISA::i
Bitfield< 7 > i
Definition: misc_types.hh:67
gem5::ComputeUnit::vrf
std::vector< VectorRegisterFile * > vrf
Definition: compute_unit.hh:295
wavefront.hh
gem5::RegisterManager::mapSgpr
int mapSgpr(Wavefront *w, int sgprIndex)
Definition: register_manager.cc:102
gem5::ComputeUnit
Definition: compute_unit.hh:201
vector_register_file.hh
gem5::RegisterManager::freeRegisters
void freeRegisters(Wavefront *w)
Definition: register_manager.cc:129
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::RegisterManagerPolicy::setParent
virtual void setParent(ComputeUnit *_cu)
Definition: register_manager_policy.hh:56
scalar_register_file.hh
gem5::RegisterManager::srfPoolMgrs
std::vector< PoolManager * > srfPoolMgrs
Definition: register_manager.hh:79
gem5::RegisterManagerPolicy::canAllocateVgprs
virtual bool canAllocateVgprs(int simdId, int nWfs, int demandPerWf)=0
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::RegisterManager::policy
RegisterManagerPolicy * policy
Definition: register_manager.hh:83
gem5::RegisterManager::mapVgpr
int mapVgpr(Wavefront *w, int vgprIndex)
Definition: register_manager.cc:95
gem5::RegisterManager::exec
void exec()
Definition: register_manager.cc:71
register_manager.hh
gem5::RegisterManagerPolicy::mapSgpr
virtual int mapSgpr(Wavefront *w, int sgprIndex)=0
gem5::RegisterManagerPolicy::exec
virtual void exec()=0
gem5::RegisterManager::allocateRegisters
void allocateRegisters(Wavefront *w, int vectorDemand, int scalarDemand)
Definition: register_manager.cc:122
gem5::RegisterManager::RegisterManager
RegisterManager(const RegisterManagerParams &params)
Definition: register_manager.cc:48
gem5::RegisterManagerPolicy::mapVgpr
virtual int mapVgpr(Wavefront *w, int vgprIndex)=0
gem5::RegisterManager::canAllocateSgprs
bool canAllocateSgprs(int simdId, int nWfs, int demandPerWf)
Definition: register_manager.cc:115
gem5::RegisterManager::~RegisterManager
~RegisterManager()
Definition: register_manager.cc:60
gem5::RegisterManagerPolicy::canAllocateSgprs
virtual bool canAllocateSgprs(int simdId, int nWfs, int demandPerWf)=0
gem5::RegisterManager::canAllocateVgprs
bool canAllocateVgprs(int simdId, int nWfs, int demandPerWf)
Definition: register_manager.cc:109
fatal_if
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition: logging.hh:226
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
gem5::RegisterManager::computeUnit
ComputeUnit * computeUnit
Definition: register_manager.hh:85

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