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rename.hh
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1/*
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13 *
14 * Copyright (c) 2004-2006 The Regents of The University of Michigan
15 * Copyright (c) 2013 Advanced Micro Devices, Inc.
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40 */
41
42#ifndef __CPU_O3_RENAME_HH__
43#define __CPU_O3_RENAME_HH__
44
45#include <list>
46#include <utility>
47
48#include "base/statistics.hh"
49#include "cpu/o3/comm.hh"
50#include "cpu/o3/commit.hh"
52#include "cpu/o3/free_list.hh"
53#include "cpu/o3/iew.hh"
54#include "cpu/o3/limits.hh"
55#include "cpu/timebuf.hh"
56#include "sim/probe/probe.hh"
57
58namespace gem5
59{
60
61struct BaseO3CPUParams;
62
63namespace o3
64{
65
78class Rename
79{
80 public:
81 // A deque is used to queue the instructions. Barrier insts must
82 // be added to the front of the queue, which is the only reason for
83 // using a deque instead of a queue. (Most other stages use a
84 // queue)
86
87 public:
96
108
109 private:
112
115
125
126 public:
128 Rename(CPU *_cpu, const BaseO3CPUParams &params);
129
131 std::string name() const;
132
134 void regProbePoints();
135
138
141
144
146 void setIEWStage(IEW *iew_stage) { iew_ptr = iew_stage; }
147
149 void
150 setCommitStage(Commit *commit_stage)
151 {
152 commit_ptr = commit_stage;
153 }
154
155 private:
158
161
162 public:
164 void startupStage();
165
167 void clearStates(ThreadID tid);
168
171
174
176 void setFreeList(UnifiedFreeList *fl_ptr);
177
179 void setScoreboard(Scoreboard *_scoreboard);
180
182 void drainSanityCheck() const;
183
185 bool isDrained() const;
186
188 void takeOverFrom();
189
191 void squash(const InstSeqNum &squash_seq_num, ThreadID tid);
192
196 void tick();
197
199 void dumpHistory();
200
201 private:
203 void resetStage();
204
210 void rename(bool &status_change, ThreadID tid);
211
215 void renameInsts(ThreadID tid);
216
220 void skidInsert(ThreadID tid);
221
225 void sortInsts();
226
228 bool skidsEmpty();
229
231 void updateStatus();
232
237 bool block(ThreadID tid);
238
243 bool unblock(ThreadID tid);
244
246 void doSquash(const InstSeqNum &squash_seq_num, ThreadID tid);
247
249 void removeFromHistory(InstSeqNum inst_seq_num, ThreadID tid);
250
252 void renameSrcRegs(const DynInstPtr &inst, ThreadID tid);
253
255 void renameDestRegs(const DynInstPtr &inst, ThreadID tid);
256
259
262
265
268
270 unsigned validInsts();
271
273 void readStallSignals(ThreadID tid);
274
276 bool checkStall(ThreadID tid);
277
279 void readFreeEntries(ThreadID tid);
280
283
291 void serializeAfter(InstQueue &inst_list, ThreadID tid);
292
298 {
299 RenameHistory(InstSeqNum _instSeqNum, const RegId& _archReg,
300 PhysRegIdPtr _newPhysReg,
301 PhysRegIdPtr _prevPhysReg)
302 : instSeqNum(_instSeqNum), archReg(_archReg),
303 newPhysReg(_newPhysReg), prevPhysReg(_prevPhysReg)
304 {
305 }
306
316 };
317
322
325
328
331
334
337
340
343
346
349
352
355
358
361
364
367
370
375
380
385
390
395 {
396 unsigned iqEntries;
397 unsigned robEntries;
398 unsigned lqEntries;
399 unsigned sqEntries;
400 };
401
406
412
414 struct Stalls
415 {
416 bool iew;
417 bool commit;
418 };
419
422
425
430
433
436
439
441 unsigned renameWidth;
442
446 unsigned toIEWIndex;
447
450
454
458
461
464
476
480 void incrFullStat(const FullSource &source);
481
540};
541
542} // namespace o3
543} // namespace gem5
544
545#endif // __CPU_O3_RENAME_HH__
Physical register ID.
Definition reg_class.hh:415
ProbePointArg generates a point for the class of Arg.
Definition probe.hh:264
Register ID: describe an architectural register with its class and index.
Definition reg_class.hh:94
O3CPU class, has each of the stages (fetch through commit) within it, as well as all of the time buff...
Definition cpu.hh:94
Commit handles single threaded and SMT commit.
Definition commit.hh:92
IEW handles both single threaded and SMT IEW (issue/execute/writeback).
Definition iew.hh:88
Rename handles both single threaded and SMT rename.
Definition rename.hh:79
DynInstPtr serializeInst[MaxThreads]
The serialize instruction that rename has stalled on.
Definition rename.hh:424
void incrFullStat(const FullSource &source)
Function used to increment the stat that corresponds to the source of the stall.
Definition rename.cc:1401
ThreadID numThreads
The number of threads active in rename.
Definition rename.hh:460
TimeBuffer< RenameStruct >::wire toIEW
Wire to write any information heading to IEW.
Definition rename.hh:342
void sortInsts()
Separates instructions from decode into individual lists of instructions sorted by thread.
Definition rename.cc:793
void setCommitStage(Commit *commit_stage)
Sets pointer to commit stage.
Definition rename.hh:150
ThreadStatus renameStatus[MaxThreads]
Per-thread status.
Definition rename.hh:114
Rename(CPU *_cpu, const BaseO3CPUParams &params)
Rename constructor.
Definition rename.cc:61
TimeBuffer< TimeStruct >::wire toDecode
Wire to write infromation heading to previous stages.
Definition rename.hh:336
TimeBuffer< RenameStruct > * renameQueue
Rename instruction queue.
Definition rename.hh:339
unsigned commitToRenameDelay
Delay between commit and rename, in ticks.
Definition rename.hh:438
int storesInProgress[MaxThreads]
Count of Store instructions in progress that have been sent off to the IQ and ROB,...
Definition rename.hh:384
ThreadStatus
Individual thread status.
Definition rename.hh:99
int instsInProgress[MaxThreads]
Count of instructions in progress that have been sent off to the IQ and ROB, but are not yet included...
Definition rename.hh:374
int calcFreeIQEntries(ThreadID tid)
Calculates the number of free IQ entries for a specific thread.
Definition rename.cc:1150
void startupStage()
Initializes variables for the stage.
Definition rename.cc:224
ProbePointArg< DynInstPtr > * ppRename
To probe when register renaming for an instruction is complete.
Definition rename.hh:119
bool blockThisCycle
Whether or not rename needs to block this cycle.
Definition rename.hh:449
void renameSrcRegs(const DynInstPtr &inst, ThreadID tid)
Renames the source registers of an instruction.
Definition rename.cc:1012
void doSquash(const InstSeqNum &squash_seq_num, ThreadID tid)
Executes actual squash, removing squashed instructions.
Definition rename.cc:915
void renameDestRegs(const DynInstPtr &inst, ThreadID tid)
Renames the destination registers of an instruction.
Definition rename.cc:1085
unsigned skidBufferMax
The maximum skid buffer size.
Definition rename.hh:463
std::list< ThreadID > * activeThreads
Pointer to the list of active threads.
Definition rename.hh:366
UnifiedFreeList * freeList
Free list interface.
Definition rename.hh:360
void tick()
Ticks rename, which processes all input signals and attempts to rename as many instructions as possib...
Definition rename.cc:392
void readFreeEntries(ThreadID tid)
Gets the number of free entries for a specific thread.
Definition rename.cc:1240
std::deque< DynInstPtr > InstQueue
Definition rename.hh:85
int calcFreeROBEntries(ThreadID tid)
Calculates the number of free ROB entries for a specific thread.
Definition rename.cc:1139
int iewToRenameDelay
Delay between iew and rename, in ticks.
Definition rename.hh:432
RenameStatus _status
Rename status.
Definition rename.hh:111
void renameInsts(ThreadID tid)
Renames instructions for the given thread.
Definition rename.cc:510
void setFreeList(UnifiedFreeList *fl_ptr)
Sets pointer to the free list.
Definition rename.cc:296
std::pair< InstSeqNum, PhysRegIdPtr > SeqNumRegPair
Probe points.
Definition rename.hh:117
bool emptyROB[MaxThreads]
Records if the ROB is empty.
Definition rename.hh:411
void rename(bool &status_change, ThreadID tid)
Determines what to do based on rename's current status.
Definition rename.cc:455
TimeBuffer< TimeStruct >::wire fromIEW
Wire to get IEW's output from backwards time buffer.
Definition rename.hh:330
std::vector< PhysRegIdPtr > freeingInProgress[MaxThreads]
Hold phys regs to be released after squash finish.
Definition rename.hh:363
std::string name() const
Returns the name of rename.
Definition rename.cc:92
std::list< RenameHistory > historyBuffer[MaxThreads]
A per-thread list of all destination register renames, used to either undo rename mappings or free ol...
Definition rename.hh:321
TimeBuffer< DecodeStruct >::wire fromDecode
Wire to get decode's output from decode queue.
Definition rename.hh:348
void serializeAfter(InstQueue &inst_list, ThreadID tid)
Either serializes on the next instruction available in the InstQueue, or records that it must seriali...
Definition rename.cc:1388
gem5::o3::Rename::RenameStats stats
TimeBuffer< DecodeStruct > * decodeQueue
Decode instruction queue interface.
Definition rename.hh:345
unsigned renameWidth
Rename width, in instructions.
Definition rename.hh:441
void setRenameMap(UnifiedRenameMap::PerThreadUnifiedRenameMap &rm_ptr)
Sets pointer to rename maps (per-thread structures).
Definition rename.cc:289
void setIEWStage(IEW *iew_stage)
Sets pointer to IEW stage.
Definition rename.hh:146
bool resumeUnblocking
Whether or not rename needs to resume clearing out the skidbuffer after squashing.
Definition rename.hh:457
InstQueue skidBuffer[MaxThreads]
Skid buffer between rename and decode.
Definition rename.hh:354
Scoreboard * scoreboard
Pointer to the scoreboard.
Definition rename.hh:369
void drainSanityCheck() const
Perform sanity checks after a drain.
Definition rename.cc:328
bool skidsEmpty()
Returns if all of the skid buffers are empty.
Definition rename.cc:808
IEW * iew_ptr
Pointer to IEW stage.
Definition rename.hh:157
int calcFreeSQEntries(ThreadID tid)
Calculates the number of free SQ entries for a specific thread.
Definition rename.cc:1174
void dumpHistory()
Debugging function used to dump history buffer of renamings.
Definition rename.cc:1423
FullSource
Enum to record the source of a structure full stall.
Definition rename.hh:469
UnifiedRenameMap * renameMap[MaxThreads]
Rename map interface.
Definition rename.hh:357
bool block(ThreadID tid)
Switches rename to blocking, and signals back that rename has become blocked.
Definition rename.cc:862
int loadsInProgress[MaxThreads]
Count of Load instructions in progress that have been sent off to the IQ and ROB, but are not yet inc...
Definition rename.hh:379
TimeBuffer< TimeStruct >::wire fromCommit
Wire to get commit's output from backwards time buffer.
Definition rename.hh:333
bool unblock(ThreadID tid)
Switches rename to unblocking if the skid buffer is empty, and signals back that rename has unblocked...
Definition rename.cc:895
TimeBuffer< TimeStruct > * timeBuffer
Pointer to main time buffer used for backwards communication.
Definition rename.hh:327
unsigned toIEWIndex
The index of the instruction in the time buffer to IEW that rename is currently using.
Definition rename.hh:446
RenameStatus
Overall rename status.
Definition rename.hh:92
void removeFromHistory(InstSeqNum inst_seq_num, ThreadID tid)
Removes a committed instruction's rename history.
Definition rename.cc:963
void setTimeBuffer(TimeBuffer< TimeStruct > *tb_ptr)
Sets the main backwards communication time buffer pointer.
Definition rename.cc:191
void takeOverFrom()
Takes over from another CPU's thread.
Definition rename.cc:322
Stalls stalls[MaxThreads]
Tracks which stages are telling decode to stall.
Definition rename.hh:421
void regProbePoints()
Registers probes.
Definition rename.cc:182
void setActiveThreads(std::list< ThreadID > *at_ptr)
Sets pointer to list of active threads.
Definition rename.cc:282
void resetStage()
Reset this pipeline stage.
Definition rename.cc:251
bool checkStall(ThreadID tid)
Checks if any stages are telling rename to block.
Definition rename.cc:1212
InstQueue insts[MaxThreads]
Queue of all instructions coming from decode this cycle.
Definition rename.hh:351
void skidInsert(ThreadID tid)
Inserts unused instructions from a given thread into the skid buffer, to be renamed once rename unblo...
Definition rename.cc:760
void readStallSignals(ThreadID tid)
Reads signals telling rename to block/unblock.
Definition rename.cc:1199
void updateStatus()
Updates overall rename status based on all of the threads' statuses.
Definition rename.cc:824
bool checkSignalsAndUpdate(ThreadID tid)
Checks the signals and updates the status.
Definition rename.cc:1277
void squash(const InstSeqNum &squash_seq_num, ThreadID tid)
Squashes all instructions in a thread.
Definition rename.cc:339
bool isDrained() const
Has the stage drained?
Definition rename.cc:308
void setScoreboard(Scoreboard *_scoreboard)
Sets pointer to the scoreboard.
Definition rename.cc:302
FreeEntries freeEntries[MaxThreads]
Per-thread tracking of the number of free entries of back-end structures.
Definition rename.hh:405
int calcFreeLQEntries(ThreadID tid)
Calculates the number of free LQ entries for a specific thread.
Definition rename.cc:1161
Commit * commit_ptr
Pointer to commit stage.
Definition rename.hh:160
bool serializeOnNextInst[MaxThreads]
Records if rename needs to serialize on the next instruction for any thread.
Definition rename.hh:429
ProbePointArg< SeqNumRegPair > * ppSquashInRename
To probe when an instruction is squashed and the register mapping for it needs to be undone.
Definition rename.hh:124
int decodeToRenameDelay
Delay between decode and rename, in ticks.
Definition rename.hh:435
CPU * cpu
Pointer to CPU.
Definition rename.hh:324
void clearStates(ThreadID tid)
Clear all thread-specific states.
Definition rename.cc:230
bool wroteToTimeBuffer
Variable that tracks if decode has written to the time buffer this cycle.
Definition rename.hh:389
void setDecodeQueue(TimeBuffer< DecodeStruct > *dq_ptr)
Sets pointer to time buffer coming from decode.
Definition rename.cc:215
bool resumeSerialize
Whether or not rename needs to resume a serialize instruction after squashing.
Definition rename.hh:453
void setRenameQueue(TimeBuffer< RenameStruct > *rq_ptr)
Sets pointer to time buffer used to communicate to the next stage.
Definition rename.cc:206
unsigned validInsts()
Returns the number of valid instructions coming from decode.
Definition rename.cc:1186
Implements a simple scoreboard to track which registers are ready.
Definition scoreboard.hh:55
FreeList class that simply holds the list of free integer and floating point registers.
Definition free_list.hh:125
Unified register rename map for all classes of registers.
std::array< UnifiedRenameMap, MaxThreads > PerThreadUnifiedRenameMap
Statistics container.
Definition group.hh:93
This is a simple scalar statistic, like a counter.
STL deque class.
Definition stl.hh:44
STL list class.
Definition stl.hh:51
STL pair class.
Definition stl.hh:58
STL vector class.
Definition stl.hh:37
static constexpr int MaxThreads
Definition limits.hh:38
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
int16_t ThreadID
Thread index/ID type.
Definition types.hh:235
uint64_t InstSeqNum
Definition inst_seq.hh:40
Declaration of Statistics objects.
Structures whose free entries impact the amount of instructions that can be renamed.
Definition rename.hh:395
Holds the information for each destination register rename.
Definition rename.hh:298
RenameHistory(InstSeqNum _instSeqNum, const RegId &_archReg, PhysRegIdPtr _newPhysReg, PhysRegIdPtr _prevPhysReg)
Definition rename.hh:299
InstSeqNum instSeqNum
The sequence number of the instruction that renamed.
Definition rename.hh:308
RegId archReg
The architectural register index that was renamed.
Definition rename.hh:310
PhysRegIdPtr newPhysReg
The new physical register that the arch.
Definition rename.hh:312
PhysRegIdPtr prevPhysReg
The old physical register that the arch.
Definition rename.hh:315
statistics::Scalar blockCycles
Stat for total number of cycles spent blocking.
Definition rename.hh:491
statistics::Scalar matLookups
Definition rename.hh:527
statistics::Scalar ROBFullEvents
Stat for total number of times that the ROB starts a stall in rename.
Definition rename.hh:506
statistics::Scalar renamedOperands
Stat for total number of renamed destination registers.
Definition rename.hh:520
statistics::Scalar fpLookups
Definition rename.hh:524
statistics::Scalar fullRegistersEvents
Stat for total number of times that rename runs out of free registers to use to rename.
Definition rename.hh:518
statistics::Scalar squashedInsts
Stat for total number of squashed instructions that rename discards.
Definition rename.hh:503
statistics::Scalar IQFullEvents
Stat for total number of times that the IQ starts a stall in rename.
Definition rename.hh:509
statistics::Scalar vecPredLookups
Definition rename.hh:526
statistics::Scalar squashCycles
Stat for total number of cycles spent squashing.
Definition rename.hh:487
statistics::Scalar renamedInsts
Stat for total number of renamed instructions.
Definition rename.hh:500
statistics::Scalar LQFullEvents
Stat for total number of times that the LQ starts a stall in rename.
Definition rename.hh:512
statistics::Scalar lookups
Stat for total number of source register rename lookups.
Definition rename.hh:522
statistics::Scalar vecLookups
Definition rename.hh:525
statistics::Scalar tempSerializing
Number of instructions marked as temporarily serializing.
Definition rename.hh:536
statistics::Scalar serializing
Number of serialize instructions handled.
Definition rename.hh:534
statistics::Scalar undoneMaps
Stat for total number of mappings that were undone due to a squash.
Definition rename.hh:532
statistics::Scalar runCycles
Stat for total number of cycles spent running normally.
Definition rename.hh:496
statistics::Scalar committedMaps
Stat for total number of committed renaming mappings.
Definition rename.hh:529
statistics::Scalar intLookups
Definition rename.hh:523
statistics::Scalar unblockCycles
Stat for total number of cycles spent unblocking.
Definition rename.hh:498
statistics::Scalar idleCycles
Stat for total number of cycles spent idle.
Definition rename.hh:489
RenameStats(statistics::Group *parent)
Definition rename.cc:97
statistics::Scalar SQFullEvents
Stat for total number of times that the SQ starts a stall in rename.
Definition rename.hh:515
statistics::Scalar skidInsts
Number of instructions inserted into skid buffers.
Definition rename.hh:538
statistics::Scalar serializeStallCycles
Stat for total number of cycles spent stalling for a serializing inst.
Definition rename.hh:494
Source of possible stalls.
Definition rename.hh:415

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