gem5
v24.1.0.1
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arch
sparc
insts
unknown.hh
Go to the documentation of this file.
1
/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_SPARC_INSTS_UNKNOWN_HH__
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#define __ARCH_SPARC_INSTS_UNKNOWN_HH__
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#include "
arch/sparc/insts/static_inst.hh
"
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namespace
gem5
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{
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namespace
SparcISA
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{
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class
Unknown
:
public
SparcStaticInst
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{
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public
:
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// Constructor
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Unknown
(
ExtMachInst
_machInst) :
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SparcStaticInst
(
"unknown"
, _machInst, No_OpClass)
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{
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flags
[IsInvalid] =
true
;
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}
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Unknown
(
ExtMachInst
_machInst) : {
…
}
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Fault
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execute
(
ExecContext
*,
trace::InstRecord
*)
const override
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{
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return
std::make_shared<IllegalInstruction>();
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}
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execute
(
ExecContext
*,
trace::InstRecord
*)
const override
{
…
}
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std::string
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generateDisassembly
(
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Addr
pc
,
const
loader::SymbolTable
*symtab)
const override
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{
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return
"Unknown instruction"
;
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}
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generateDisassembly
( {
…
}
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};
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class
Unknown
:
public
SparcStaticInst
{
…
};
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}
// namespace SparcISA
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}
// namespace gem5
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#endif
// __ARCH_SPARC_INSTS_UNKNOWN_HH__
static_inst.hh
gem5::ExecContext
The ExecContext is an abstract base class the provides the interface used by the ISA to manipulate th...
Definition
exec_context.hh:72
gem5::SparcISA::SparcStaticInst
Base class for all SPARC static instructions.
Definition
static_inst.hh:94
gem5::SparcISA::Unknown
Class for Unknown/Illegal instructions.
Definition
unknown.hh:44
gem5::SparcISA::Unknown::Unknown
Unknown(ExtMachInst _machInst)
Definition
unknown.hh:48
gem5::SparcISA::Unknown::execute
Fault execute(ExecContext *, trace::InstRecord *) const override
Definition
unknown.hh:55
gem5::SparcISA::Unknown::generateDisassembly
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition
unknown.hh:61
gem5::StaticInst::flags
std::bitset< Num_Flags > flags
Flag values for this instruction.
Definition
static_inst.hh:103
gem5::loader::SymbolTable
Definition
symtab.hh:152
gem5::trace::InstRecord
Definition
insttracer.hh:62
gem5::MipsISA::pc
Bitfield< 4 > pc
Definition
pra_constants.hh:243
gem5::SparcISA::ExtMachInst
uint64_t ExtMachInst
Definition
types.hh:42
gem5
Copyright (c) 2024 Arm Limited All rights reserved.
Definition
binary32.hh:36
gem5::Fault
std::shared_ptr< FaultBase > Fault
Definition
types.hh:249
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition
types.hh:147
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