gem5 v24.0.0.0
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Register entry for v8 records. More...
#include <tarmac_record_v8.hh>
Public Member Functions | |
TraceRegEntryV8 (const TarmacContext &tarmCtx, const RegId ®) | |
virtual void | print (std::ostream &outs, int verbosity=0, const std::string &prefix="") const override |
Public Member Functions inherited from gem5::trace::TarmacTracerRecord::TraceRegEntry | |
TraceRegEntry (const TarmacContext &tarmCtx, const RegId ®) | |
void | update (const TarmacContext &tarmCtx) |
This updates the register entry using the update table. | |
Public Member Functions inherited from gem5::trace::TarmacBaseRecord::RegEntry | |
RegEntry ()=default | |
RegEntry (const PCStateBase &pc) | |
Public Member Functions inherited from gem5::Printable | |
Printable () | |
virtual | ~Printable () |
Public Member Functions inherited from gem5::trace::TarmacTracerRecordV8::TraceEntryV8 | |
TraceEntryV8 (std::string _cpuName) | |
Protected Member Functions | |
void | updateInt (const TarmacContext &tarmCtx) override |
void | updateMisc (const TarmacContext &tarmCtx) override |
Register update functions. | |
void | updateVec (const TarmacContext &tarmCtx) override |
void | updatePred (const TarmacContext &tarmCtx) override |
std::string | formatReg () const |
Returning a string which contains the formatted register value: transformed in hex, 0 padded or/and split in chunks separated by underscores in case of vector register. | |
Protected Member Functions inherited from gem5::trace::TarmacTracerRecord::TraceRegEntry | |
virtual void | updateCC (const TarmacContext &tarmCtx) |
virtual void | updateFloat (const TarmacContext &tarmCtx) |
Protected Attributes | |
uint16_t | regWidth |
Size in bits of arch register. | |
Protected Attributes inherited from gem5::trace::TarmacTracerRecordV8::TraceEntryV8 | |
std::string | cpuName |
Additional Inherited Members | |
Public Types inherited from gem5::trace::TarmacBaseRecord::RegEntry | |
enum | RegElement { Lo = 0 , Hi = 1 , Max = 32 } |
Public Attributes inherited from gem5::trace::TarmacTracerRecord::TraceRegEntry | |
bool | regValid |
True if register entry is valid. | |
RegId | regId |
Register ID. | |
std::string | regName |
Register name to be printed. | |
Public Attributes inherited from gem5::trace::TarmacBaseRecord::RegEntry | |
RegType | type |
RegIndex | index |
ISetState | isetstate |
std::vector< uint64_t > | values |
Register entry for v8 records.
Definition at line 96 of file tarmac_record_v8.hh.
gem5::trace::TarmacTracerRecordV8::TraceRegEntryV8::TraceRegEntryV8 | ( | const TarmacContext & | tarmCtx, |
const RegId & | reg ) |
Definition at line 83 of file tarmac_record_v8.cc.
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protected |
Returning a string which contains the formatted register value: transformed in hex, 0 padded or/and split in chunks separated by underscores in case of vector register.
Definition at line 293 of file tarmac_record_v8.cc.
References gem5::csprintf(), and gem5::ArmISA::mask.
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overridevirtual |
Reimplemented from gem5::trace::TarmacTracerRecord::TraceRegEntry.
Definition at line 276 of file tarmac_record_v8.cc.
References gem5::ccprintf(), and gem5::curTick().
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overrideprotectedvirtual |
Reimplemented from gem5::trace::TarmacTracerRecord::TraceRegEntry.
Definition at line 93 of file tarmac_record_v8.cc.
References gem5::ArmISA::FramePointerReg, gem5::RefCountingPtr< T >::get(), gem5::MipsISA::int_reg::NumArchRegs, gem5::ArmISA::int_reg::Pc, gem5::ArmISA::ReturnAddressReg, gem5::ArmISA::StackPointerReg, and gem5::trace::TarmacContext::staticInst.
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overrideprotectedvirtual |
Register update functions.
Reimplemented from gem5::trace::TarmacTracerRecord::TraceRegEntry.
Definition at line 121 of file tarmac_record_v8.cc.
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overrideprotectedvirtual |
Reimplemented from gem5::trace::TarmacTracerRecord::TraceRegEntry.
Definition at line 151 of file tarmac_record_v8.cc.
References gem5::ArmISA::ArmStaticInst::getCurSveVecLenInBits(), gem5::ThreadContext::getReg(), gem5::ArmISA::i, gem5::trace::InstRecord::thread, and gem5::trace::TarmacContext::thread.
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overrideprotectedvirtual |
Reimplemented from gem5::trace::TarmacTracerRecord::TraceRegEntry.
Definition at line 129 of file tarmac_record_v8.cc.
References gem5::VecRegContainer< SIZE >::as(), gem5::ArmISA::ArmStaticInst::getCurSveVecLenInBits(), gem5::ThreadContext::getReg(), gem5::ArmISA::i, gem5::trace::InstRecord::thread, and gem5::trace::TarmacContext::thread.
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protected |
Size in bits of arch register.
Definition at line 121 of file tarmac_record_v8.hh.