gem5  v22.1.0.0
tarmac_tracer.cc
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37 
38 #include "tarmac_tracer.hh"
39 
40 #include <string>
41 
42 #include "arch/arm/system.hh"
43 #include "base/output.hh"
44 #include "cpu/base.hh"
45 
46 #include "enums/TarmacDump.hh"
47 
48 namespace gem5
49 {
50 
51 namespace trace {
52 
53 std::string
55 {
56  auto id = thread->getCpuPtr()->cpuId();
57  return "cpu" + std::to_string(id);
58 }
59 
60 namespace {
61 
63 tarmacDump(const TarmacTracerParams &p)
64 {
65  switch (p.outfile) {
66  case TarmacDump::stdoutput:
67  return simout.findOrCreate("stdout");
68  case TarmacDump::stderror:
69  return simout.findOrCreate("stderr");
70  case TarmacDump::file:
71  return simout.findOrCreate(p.name);
72  default:
73  panic("Invalid option\n");
74  }
75 }
76 
77 }
78 
80  : InstTracer(p),
81  outstream(tarmacDump(p)),
82  startTick(p.start_tick),
83  endTick(p.end_tick)
84 {
85  // Wrong parameter setting: The trace end happens before the
86  // trace start.
88  "Tarmac start point: %lu is bigger than "
89  "Tarmac end point: %lu\n", startTick, endTick);
90 
91  // By default cpu tracers in gem5 are not tracing faults
92  // (exceptions).
93  // This is not in compliance with the Tarmac specification:
94  // instructions like SVC, SMC, HVC have to be traced.
95  // Tarmac Tracer is then automatically enabling this behaviour.
96  setDebugFlag("ExecFaulting");
97 }
98 
99 InstRecord *
101  const StaticInstPtr staticInst,
102  const PCStateBase &pc,
103  const StaticInstPtr macroStaticInst)
104 {
105  // Check if we need to start tracing since we have passed the
106  // tick start point.
107  if (when < startTick || when > endTick)
108  return nullptr;
109 
110  if (ArmSystem::highestELIs64(tc)) {
111  // TarmacTracerV8
112  return new TarmacTracerRecordV8(when, tc, staticInst, pc, *this,
113  macroStaticInst);
114  } else {
115  // TarmacTracer
116  return new TarmacTracerRecord(when, tc, staticInst, pc, *this,
117  macroStaticInst);
118  }
119 }
120 
121 std::ostream&
123 {
124  return *(outstream->stream());
125 }
126 
127 } // namespace trace
128 } // namespace gem5
bool highestELIs64() const
Returns true if the register width of the highest implemented exception level is 64 bits (ARMv8)
Definition: system.hh:184
int cpuId() const
Reads this CPU's ID.
Definition: base.hh:183
OutputStream * findOrCreate(const std::string &name, bool binary=false)
Definition: output.cc:262
std::ostream * stream() const
Get the output underlying output stream.
Definition: output.hh:62
ThreadContext is the external interface to all thread state for anything outside of the CPU.
virtual BaseCPU * getCpuPtr()=0
std::string tarmacCpuName() const
InstRecord * getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr staticInst, const PCStateBase &pc, const StaticInstPtr macroStaticInst=nullptr) override
Generates a TarmacTracerRecord, depending on the Tarmac version.
TarmacTracer(const Params &p)
friend class TarmacTracerRecordV8
friend class TarmacTracerRecord
TarmacTracerParams Params
Tick startTick
startTick and endTick allow to trace a specific window of ticks rather than the entire CPU execution.
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:178
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:204
Bitfield< 4 > pc
Bitfield< 54 > p
Definition: pagetable.hh:70
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
void setDebugFlag(const char *string)
Definition: debug.cc:194
OutputDirectory simout
Definition: output.cc:62
uint64_t Tick
Tick count type.
Definition: types.hh:58
const std::string to_string(sc_enc enc)
Definition: sc_fxdefs.cc:60

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