gem5  v21.1.0.2
Public Member Functions | Static Public Member Functions | Public Attributes | Static Public Attributes | Protected Attributes | List of all members
gem5::ArmSystem Class Reference

#include <system.hh>

Inheritance diagram for gem5::ArmSystem:
gem5::System gem5::SimObject gem5::PCEventScope gem5::EventManager gem5::Serializable gem5::Drainable gem5::statistics::Group gem5::Named

Public Member Functions

 PARAMS (ArmSystem)
 
 ArmSystem (const Params &p)
 
bool haveSecurity () const
 Returns true if this system implements the Security Extensions. More...
 
bool haveLPAE () const
 Returns true if this system implements the Large Physical Address Extension. More...
 
bool haveVirtualization () const
 Returns true if this system implements the virtualization Extensions. More...
 
bool haveCrypto () const
 Returns true if this system implements the Crypto Extension. More...
 
void setGenericTimer (GenericTimer *generic_timer)
 Sets the pointer to the Generic Timer. More...
 
void setGIC (BaseGic *gic)
 Sets the pointer to the GIC. More...
 
void setPowerController (FVPBasePwrCtrl *pwr_ctrl)
 Sets the pointer to the Power Controller. More...
 
GenericTimergetGenericTimer () const
 Get a pointer to the system's generic timer model. More...
 
BaseGicgetGIC () const
 Get a pointer to the system's GIC. More...
 
FVPBasePwrCtrlgetPowerController () const
 Get a pointer to the system's power controller. More...
 
bool highestELIs64 () const
 Returns true if the register width of the highest implemented exception level is 64 bits (ARMv8) More...
 
ArmISA::ExceptionLevel highestEL () const
 Returns the highest implemented exception level. More...
 
Addr resetAddr () const
 Returns the reset address if the highest implemented exception level is 64 bits (ARMv8) More...
 
void setResetAddr (Addr addr)
 
bool haveLargeAsid64 () const
 Returns true if ASID is 16 bits in AArch64 (ARMv8) More...
 
bool haveTME () const
 Returns true if this system implements the transactional memory extension (ARMv9) More...
 
bool haveSVE () const
 Returns true if SVE is implemented (ARMv8) More...
 
unsigned sveVL () const
 Returns the SVE vector length at reset, in quadwords. More...
 
bool haveLSE () const
 Returns true if LSE is implemented (ARMv8.1) More...
 
bool haveVHE () const
 Returns true if Virtualization Host Extensions is implemented. More...
 
bool havePAN () const
 Returns true if Priviledge Access Never is implemented. More...
 
bool haveSecEL2 () const
 Returns true if Priviledge Access Never is implemented. More...
 
uint8_t physAddrRange64 () const
 Returns the supported physical address range in bits if the highest implemented exception level is 64 bits (ARMv8) More...
 
uint8_t physAddrRange () const
 Returns the supported physical address range in bits. More...
 
Addr physAddrMask () const
 Returns the physical address mask. More...
 
bool haveSemihosting () const
 Is Arm Semihosting support enabled? More...
 
- Public Member Functions inherited from gem5::System
RequestPortgetSystemPort ()
 Get a reference to the system port that can be used by non-structural simulation objects like processes or threads, or external entities like loaders and debuggers, etc, to access the memory system. More...
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Additional function to return the Port of a memory object. More...
 
unsigned int cacheLineSize () const
 Get the cache line size of the system. More...
 
bool schedule (PCEvent *event) override
 
bool remove (PCEvent *event) override
 
KvmVMgetKvmVM ()
 Get a pointer to the Kernel Virtual Machine (KVM) SimObject, if present. More...
 
bool validKvmEnvironment () const
 Verify gem5 configuration will support KVM emulation. More...
 
memory::PhysicalMemorygetPhysMem ()
 Get a pointer to access the physical memory of the system. More...
 
Addr freeMemSize (int poolID=0) const
 Amount of physical memory that is still free. More...
 
Addr memSize (int poolID=0) const
 Amount of physical memory that exists. More...
 
bool isMemAddr (Addr addr) const
 Check if a physical address is within a range of a memory that is part of the global address map. More...
 
void addDeviceMemory (RequestorID requestorId, memory::AbstractMemory *deviceMemory)
 Add a physical memory range for a device. More...
 
bool isDeviceMemAddr (const PacketPtr &pkt) const
 Similar to isMemAddr but for devices. More...
 
memory::AbstractMemorygetDeviceMemory (const PacketPtr &pkt) const
 Return a pointer to the device memory. More...
 
AddrRangeList getShadowRomRanges () const
 
Arch getArch () const
 Get the architecture. More...
 
ByteOrder getGuestByteOrder () const
 Get the guest byte order. More...
 
Addr getPageBytes () const
 Get the page bytes for the ISA. More...
 
Addr getPageShift () const
 Get the number of bits worth of in-page address for the ISA. More...
 
ThermalModelgetThermalModel () const
 The thermal model used for this system (if any). More...
 
RequestorID getRequestorId (const SimObject *requestor, std::string subrequestor={})
 Request an id used to create a request object in the system. More...
 
RequestorID getGlobalRequestorId (const std::string &requestor_name)
 Registers a GLOBAL RequestorID, which is a RequestorID not related to any particular SimObject; since no SimObject is passed, the requestor gets registered by providing the full requestor name. More...
 
std::string getRequestorName (RequestorID requestor_id)
 Get the name of an object for a given request id. More...
 
RequestorID lookupRequestorId (const SimObject *obj) const
 Looks up the RequestorID for a given SimObject returns an invalid RequestorID (invldRequestorId) if not found. More...
 
RequestorID lookupRequestorId (const std::string &name) const
 Looks up the RequestorID for a given object name string returns an invalid RequestorID (invldRequestorId) if not found. More...
 
RequestorID maxRequestors ()
 Get the number of requestors registered in the system. More...
 
void regStats () override
 Callback to set stat parameters. More...
 
uint64_t incWorkItemsBegin ()
 Called by pseudo_inst to track the number of work items started by this system. More...
 
uint64_t incWorkItemsEnd ()
 Called by pseudo_inst to track the number of work items completed by this system. More...
 
int markWorkItem (int index)
 Called by pseudo_inst to mark the cpus actively executing work items. More...
 
void workItemBegin (uint32_t tid, uint32_t workid)
 
void workItemEnd (uint32_t tid, uint32_t workid)
 
bool trapToGdb (int signal, ContextID ctx_id) const
 
 PARAMS (System)
 
 System (const Params &p)
 
 ~System ()
 
const AddrRangem5opRange () const
 Range used by memory-mapped m5 pseudo-ops if enabled. More...
 
Addr allocPhysPages (int npages, int poolID=0)
 Allocate npages contiguous unused physical pages. More...
 
void registerThreadContext (ThreadContext *tc, ContextID assigned=InvalidContextID)
 
void replaceThreadContext (ThreadContext *tc, ContextID context_id)
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
bool isAtomicMode () const
 Is the system in atomic mode? More...
 
bool isTimingMode () const
 Is the system in timing mode? More...
 
bool bypassCaches () const
 Should caches be bypassed? More...
 
enums::MemoryMode getMemoryMode () const
 Get the memory mode of the system. More...
 
void setMemoryMode (enums::MemoryMode mode)
 Change the memory mode of the system. More...
 
- Public Member Functions inherited from gem5::SimObject
const Paramsparams () const
 
 SimObject (const Params &p)
 
virtual ~SimObject ()
 
virtual void init ()
 init() is called after all C++ SimObjects have been created and all ports are connected. More...
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint. More...
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint. More...
 
virtual void regProbePoints ()
 Register probe points for this object. More...
 
virtual void regProbeListeners ()
 Register probe listeners for this object. More...
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object. More...
 
virtual void startup ()
 startup() is the final initialization call before simulation. More...
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining. More...
 
virtual void memWriteback ()
 Write back dirty buffers to memory using functional writes. More...
 
virtual void memInvalidate ()
 Invalidate the contents of memory buffers. More...
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue. More...
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from gem5::Drainable
DrainState drainState () const
 Return the current drain state of an object. More...
 
virtual void notifyFork ()
 Notify a child process of a fork. More...
 
- Public Member Functions inherited from gem5::statistics::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group. More...
 
virtual ~Group ()
 
virtual void resetStats ()
 Callback to reset stats. More...
 
virtual void preDumpStats ()
 Callback before stats are dumped. More...
 
void addStat (statistics::Info *info)
 Register a stat with this group. More...
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object. More...
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object. More...
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block. More...
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group. More...
 
void mergeStatGroup (Group *block)
 Merge the contents (stats & children) of a block to this block. More...
 
 Group ()=delete
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 

Static Public Member Functions

static ArmSystemgetArmSystem (ThreadContext *tc)
 Returns a valid ArmSystem pointer if using ARM ISA, it fails otherwise. More...
 
static bool haveSecurity (ThreadContext *tc)
 Returns true if the system of a specific thread context implements the Security Extensions. More...
 
static bool haveVirtualization (ThreadContext *tc)
 Returns true if the system of a specific thread context implements the virtualization Extensions. More...
 
static bool haveLPAE (ThreadContext *tc)
 Returns true if the system of a specific thread context implements the Large Physical Address Extension. More...
 
static bool highestELIs64 (ThreadContext *tc)
 Returns true if the register width of the highest implemented exception level for the system of a specific thread context is 64 bits (ARMv8) More...
 
static ArmISA::ExceptionLevel highestEL (ThreadContext *tc)
 Returns the highest implemented exception level for the system of a specific thread context. More...
 
static bool haveEL (ThreadContext *tc, ArmISA::ExceptionLevel el)
 Return true if the system implements a specific exception level. More...
 
static bool haveTME (ThreadContext *tc)
 Returns true if the system of a specific thread context implements the transactional memory extension (TME) More...
 
static Addr resetAddr (ThreadContext *tc)
 Returns the reset address if the highest implemented exception level for the system of a specific thread context is 64 bits (ARMv8) More...
 
static uint8_t physAddrRange (ThreadContext *tc)
 Returns the supported physical address range in bits for the system of a specific thread context. More...
 
static Addr physAddrMask (ThreadContext *tc)
 Returns the physical address mask for the system of a specific thread context. More...
 
static bool haveLargeAsid64 (ThreadContext *tc)
 Returns true if ASID is 16 bits for the system of a specific thread context while in AArch64 (ARMv8) More...
 
static bool haveSemihosting (ThreadContext *tc)
 Is Arm Semihosting support enabled? More...
 
static bool callSemihosting64 (ThreadContext *tc, bool gem5_ops=false)
 Make a Semihosting call from aarch64. More...
 
static bool callSemihosting32 (ThreadContext *tc, bool gem5_ops=false)
 Make a Semihosting call from aarch32. More...
 
static bool callSemihosting (ThreadContext *tc, bool gem5_ops=false)
 Make a Semihosting call from either aarch64 or aarch32. More...
 
static void callSetStandByWfi (ThreadContext *tc)
 Make a call to notify the power controller of STANDBYWFI assertion. More...
 
static void callClearStandByWfi (ThreadContext *tc)
 Make a call to notify the power controller of STANDBYWFI deassertion. More...
 
static bool callSetWakeRequest (ThreadContext *tc)
 Notify the power controller of WAKEREQUEST assertion. More...
 
static void callClearWakeRequest (ThreadContext *tc)
 Notify the power controller of WAKEREQUEST deassertion. More...
 
- Static Public Member Functions inherited from gem5::System
static void printSystems ()
 
- Static Public Member Functions inherited from gem5::SimObject
static void serializeAll (const std::string &cpt_dir)
 Create a checkpoint by serializing all SimObjects in the system. More...
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it. More...
 
static void setSimObjectResolver (SimObjectResolver *resolver)
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
static SimObjectResolvergetSimObjectResolver ()
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section. More...
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it. More...
 

Public Attributes

bool multiProc
 true if this a multiprocessor system More...
 
- Public Attributes inherited from gem5::System
Threads threads
 
const bool multiThread
 
std::vector< MemPoolmemPools
 Memory allocation objects for all physical memories in the system. More...
 
uint64_t init_param
 
PortProxy physProxy
 Port to physical memory used for writing object files into ram at boot. More...
 
Workloadworkload = nullptr
 OS kernel. More...
 
std::map< std::pair< uint32_t, uint32_t >, TicklastWorkItemStarted
 
std::map< uint32_t, statistics::Histogram * > workItemStats
 
FutexMap futexMap
 
std::set< int > PIDs
 Process set to track which PIDs have already been allocated. More...
 
std::list< BasicSignalsignalList
 
std::vector< RedirectPath * > redirectPaths
 

Static Public Attributes

static constexpr Addr PageBytes = ArmISA::PageBytes
 
static constexpr Addr PageShift = ArmISA::PageShift
 
- Static Public Attributes inherited from gem5::System
static std::vector< System * > systemList
 
static int numSystemsRunning = 0
 
static const int maxPID = 32768
 

Protected Attributes

const bool _haveSecurity
 True if this system implements the Security Extensions. More...
 
const bool _haveLPAE
 True if this system implements the Large Physical Address Extension. More...
 
const bool _haveVirtualization
 True if this system implements the virtualization Extensions. More...
 
const bool _haveCrypto
 True if this system implements the Crypto Extension. More...
 
GenericTimer_genericTimer
 Pointer to the Generic Timer wrapper. More...
 
BaseGic_gic
 
FVPBasePwrCtrl_pwrCtrl
 Pointer to the Power Controller (if any) More...
 
Addr _resetAddr
 Reset address (ARMv8) More...
 
bool _highestELIs64
 True if the register width of the highest implemented exception level is 64 bits (ARMv8) More...
 
const uint8_t _physAddrRange64
 Supported physical address range in bits if the highest implemented exception level is 64 bits (ARMv8) More...
 
const bool _haveLargeAsid64
 True if ASID is 16 bits in AArch64 (ARMv8) More...
 
const bool _haveTME
 True if system implements the transactional memory extension (TME) More...
 
const bool _haveSVE
 True if SVE is implemented (ARMv8) More...
 
const unsigned _sveVL
 SVE vector length at reset, in quadwords. More...
 
const bool _haveLSE
 True if LSE is implemented (ARMv8.1) More...
 
const bool _haveVHE
 True if FEAT_VHE (Virtualization Host Extensions) is implemented. More...
 
const unsigned _havePAN
 True if Priviledge Access Never is implemented. More...
 
const unsigned _haveSecEL2
 True if Secure EL2 is implemented. More...
 
ArmSemihosting *const semihosting
 True if the Semihosting interface is enabled. More...
 
- Protected Attributes inherited from gem5::System
KvmVM *const kvmVM = nullptr
 
memory::PhysicalMemory physmem
 
AddrRangeList ShadowRomRanges
 
enums::MemoryMode memoryMode
 
const unsigned int _cacheLineSize
 
uint64_t workItemsBegin = 0
 
uint64_t workItemsEnd = 0
 
uint32_t numWorkIds
 
std::vector< RequestorInforequestors
 This array is a per-system list of all devices capable of issuing a memory system request and an associated string for each requestor id. More...
 
ThermalModelthermalModel
 
const AddrRange _m5opRange
 Range for memory-mapped m5 pseudo ops. More...
 
- Protected Attributes inherited from gem5::SimObject
const SimObjectParams & _params
 Cached copy of the object parameters. More...
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue. More...
 

Additional Inherited Members

- Public Types inherited from gem5::SimObject
typedef SimObjectParams Params
 
- Protected Member Functions inherited from gem5::System
std::string stripSystemName (const std::string &requestor_name) const
 Strips off the system name from a requestor name. More...
 
RequestorID _getRequestorId (const SimObject *requestor, const std::string &requestor_name)
 helper function for getRequestorId More...
 
std::string leafRequestorName (const SimObject *requestor, const std::string &subrequestor)
 Helper function for constructing the full (sub)requestor name by providing the root requestor and the relative subrequestor name. More...
 
- Protected Member Functions inherited from gem5::Drainable
 Drainable ()
 
virtual ~Drainable ()
 
virtual void drainResume ()
 Resume execution after a successful drain. More...
 
void signalDrainDone () const
 Signal that an object is drained. More...
 

Detailed Description

Definition at line 62 of file system.hh.

Constructor & Destructor Documentation

◆ ArmSystem()

gem5::ArmSystem::ArmSystem ( const Params p)

Member Function Documentation

◆ callClearStandByWfi()

void gem5::ArmSystem::callClearStandByWfi ( ThreadContext tc)
static

Make a call to notify the power controller of STANDBYWFI deassertion.

Definition at line 219 of file system.cc.

References getArmSystem(), and getPowerController().

Referenced by gem5::Gicv3::postInt().

◆ callClearWakeRequest()

void gem5::ArmSystem::callClearWakeRequest ( ThreadContext tc)
static

Notify the power controller of WAKEREQUEST deassertion.

Definition at line 235 of file system.cc.

References getArmSystem(), and getPowerController().

Referenced by gem5::Gicv3CPUInterface::deassertWakeRequest().

◆ callSemihosting()

bool gem5::ArmSystem::callSemihosting ( ThreadContext tc,
bool  gem5_ops = false 
)
static

Make a Semihosting call from either aarch64 or aarch32.

Definition at line 203 of file system.cc.

References callSemihosting32(), callSemihosting64(), and gem5::ArmISA::inAArch64().

Referenced by gem5::Iris::ThreadContext::semihostingEvent().

◆ callSemihosting32()

bool gem5::ArmSystem::callSemihosting32 ( ThreadContext tc,
bool  gem5_ops = false 
)
static

Make a Semihosting call from aarch32.

Definition at line 197 of file system.cc.

References gem5::ArmSemihosting::call32(), getArmSystem(), and semihosting.

Referenced by callSemihosting().

◆ callSemihosting64()

bool gem5::ArmSystem::callSemihosting64 ( ThreadContext tc,
bool  gem5_ops = false 
)
static

Make a Semihosting call from aarch64.

Definition at line 191 of file system.cc.

References gem5::ArmSemihosting::call64(), getArmSystem(), and semihosting.

Referenced by callSemihosting().

◆ callSetStandByWfi()

void gem5::ArmSystem::callSetStandByWfi ( ThreadContext tc)
static

Make a call to notify the power controller of STANDBYWFI assertion.

Definition at line 212 of file system.cc.

References getArmSystem(), and getPowerController().

◆ callSetWakeRequest()

bool gem5::ArmSystem::callSetWakeRequest ( ThreadContext tc)
static

Notify the power controller of WAKEREQUEST assertion.

Returns true if WAKEREQUEST is enabled as a power-on mechanism, and the core is now powered, false otherwise

Definition at line 226 of file system.cc.

References getArmSystem(), and getPowerController().

Referenced by gem5::Gicv3CPUInterface::assertWakeRequest().

◆ getArmSystem()

static ArmSystem* gem5::ArmSystem::getArmSystem ( ThreadContext tc)
inlinestatic

◆ getGenericTimer()

GenericTimer* gem5::ArmSystem::getGenericTimer ( ) const
inline

Get a pointer to the system's generic timer model.

Definition at line 195 of file system.hh.

References _genericTimer.

Referenced by gem5::ArmISA::ISA::getGenericTimer(), and gem5::ArmISA::ISA::readMiscReg().

◆ getGIC()

BaseGic* gem5::ArmSystem::getGIC ( ) const
inline

Get a pointer to the system's GIC.

Definition at line 198 of file system.hh.

References _gic.

Referenced by gem5::ArmISA::FsWorkload::initState(), and gem5::ArmISA::ISA::setupThreadContext().

◆ getPowerController()

FVPBasePwrCtrl* gem5::ArmSystem::getPowerController ( ) const
inline

Get a pointer to the system's power controller.

Definition at line 201 of file system.hh.

References _pwrCtrl.

Referenced by callClearStandByWfi(), callClearWakeRequest(), callSetStandByWfi(), and callSetWakeRequest().

◆ haveCrypto()

bool gem5::ArmSystem::haveCrypto ( ) const
inline

Returns true if this system implements the Crypto Extension.

Definition at line 176 of file system.hh.

References _haveCrypto.

Referenced by gem5::ArmISA::ISA::ISA().

◆ haveEL()

bool gem5::ArmSystem::haveEL ( ThreadContext tc,
ArmISA::ExceptionLevel  el 
)
static

Return true if the system implements a specific exception level.

Definition at line 138 of file system.cc.

References gem5::ArmISA::el, gem5::ArmISA::EL0, gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL3, haveSecurity(), haveVirtualization(), and warn.

Referenced by gem5::ArmISA::addPAC(), gem5::ArmISA::addPACDA(), gem5::ArmISA::addPACDB(), gem5::ArmISA::addPACGA(), gem5::ArmISA::addPACIA(), gem5::ArmISA::addPACIB(), gem5::ArmISA::VectorCatch::addressMatching(), gem5::ArmISA::authDA(), gem5::ArmISA::authDB(), gem5::ArmISA::authIA(), gem5::ArmISA::authIB(), gem5::ArmISA::badMode(), gem5::ArmISA::badMode32(), gem5::ArmISA::calculateBottomPACBit(), gem5::ArmISA::ArmStaticInst::checkForWFxTrap32(), gem5::ArmISA::ArmStaticInst::checkForWFxTrap64(), gem5::ArmISA::TLB::checkPermissions64(), gem5::ArmISA::debugTargetFrom(), gem5::ArmISA::EL2Enabled(), gem5::ArmISA::ELIsInHost(), gem5::ArmISA::VectorCatch::exceptionTrapping(), gem5::ArmISA::ArmStaticInst::generalExceptionsToAArch64(), gem5::ArmISA::haveAArch32EL(), gem5::ArmISA::illegalExceptionReturn(), gem5::ArmISA::SelfDebug::isDebugEnabledForEL32(), gem5::ArmISA::SelfDebug::isDebugEnabledForEL64(), gem5::ArmISA::BrkPoint::isEnabled(), gem5::ArmISA::WatchPoint::isEnabled(), gem5::ArmISA::isSecure(), gem5::ArmISA::isSecureBelowEL3(), gem5::ArmISA::IsSecureEL2Enabled(), gem5::ArmISA::isUnpriviledgeAccess(), gem5::ArmISA::readMPIDR(), gem5::ArmISA::PrefetchAbort::routeToHyp(), gem5::ArmISA::s1TranslationRegime(), gem5::ArmISA::stripPAC(), gem5::ArmISA::trapPACUse(), and gem5::ArmISA::ArmStaticInst::trapWFx().

◆ haveLargeAsid64() [1/2]

bool gem5::ArmSystem::haveLargeAsid64 ( ) const
inline

Returns true if ASID is 16 bits in AArch64 (ARMv8)

Definition at line 224 of file system.hh.

References _haveLargeAsid64.

Referenced by haveLargeAsid64(), gem5::ArmISA::ISA::ISA(), and gem5::ArmISA::TLB::TLB().

◆ haveLargeAsid64() [2/2]

bool gem5::ArmSystem::haveLargeAsid64 ( ThreadContext tc)
static

Returns true if ASID is 16 bits for the system of a specific thread context while in AArch64 (ARMv8)

Definition at line 179 of file system.cc.

References getArmSystem(), and haveLargeAsid64().

◆ haveLPAE() [1/2]

bool gem5::ArmSystem::haveLPAE ( ) const
inline

Returns true if this system implements the Large Physical Address Extension.

Definition at line 166 of file system.hh.

References _haveLPAE.

Referenced by haveLPAE(), gem5::ArmISA::ISA::ISA(), gem5::ArmISA::longDescFormatInUse(), and gem5::ArmISA::TLB::TLB().

◆ haveLPAE() [2/2]

bool gem5::ArmSystem::haveLPAE ( ThreadContext tc)
static

Returns true if the system of a specific thread context implements the Large Physical Address Extension.

Definition at line 114 of file system.cc.

References gem5::FullSystem, getArmSystem(), and haveLPAE().

◆ haveLSE()

bool gem5::ArmSystem::haveLSE ( ) const
inline

Returns true if LSE is implemented (ARMv8.1)

Definition at line 238 of file system.hh.

References _haveLSE.

Referenced by gem5::ArmISA::ISA::ISA().

◆ havePAN()

bool gem5::ArmSystem::havePAN ( ) const
inline

Returns true if Priviledge Access Never is implemented.

Definition at line 244 of file system.hh.

References _havePAN.

Referenced by gem5::ArmISA::ISA::ISA().

◆ haveSecEL2()

bool gem5::ArmSystem::haveSecEL2 ( ) const
inline

Returns true if Priviledge Access Never is implemented.

Definition at line 247 of file system.hh.

References _haveSecEL2.

Referenced by gem5::ArmISA::ISA::ISA().

◆ haveSecurity() [1/2]

bool gem5::ArmSystem::haveSecurity ( ) const
inline

◆ haveSecurity() [2/2]

bool gem5::ArmSystem::haveSecurity ( ThreadContext tc)
static

Returns true if the system of a specific thread context implements the Security Extensions.

Definition at line 108 of file system.cc.

References gem5::FullSystem, getArmSystem(), and haveSecurity().

◆ haveSemihosting() [1/2]

bool gem5::ArmSystem::haveSemihosting ( ) const
inline

Is Arm Semihosting support enabled?

Definition at line 268 of file system.hh.

References semihosting.

Referenced by haveSemihosting().

◆ haveSemihosting() [2/2]

bool gem5::ArmSystem::haveSemihosting ( ThreadContext tc)
static

Is Arm Semihosting support enabled?

Definition at line 185 of file system.cc.

References gem5::FullSystem, getArmSystem(), and haveSemihosting().

◆ haveSVE()

bool gem5::ArmSystem::haveSVE ( ) const
inline

Returns true if SVE is implemented (ARMv8)

Definition at line 232 of file system.hh.

References _haveSVE.

Referenced by gem5::ArmISA::ISA::ISA().

◆ haveTME() [1/2]

bool gem5::ArmSystem::haveTME ( ) const
inline

Returns true if this system implements the transactional memory extension (ARMv9)

Definition at line 229 of file system.hh.

References _haveTME.

Referenced by haveTME(), and gem5::ArmISA::ISA::ISA().

◆ haveTME() [2/2]

bool gem5::ArmSystem::haveTME ( ThreadContext tc)
static

Returns true if the system of a specific thread context implements the transactional memory extension (TME)

Definition at line 155 of file system.cc.

References getArmSystem(), and haveTME().

◆ haveVHE()

bool gem5::ArmSystem::haveVHE ( ) const
inline

Returns true if Virtualization Host Extensions is implemented.

Definition at line 241 of file system.hh.

References _haveVHE.

Referenced by gem5::ArmISA::ISA::ISA().

◆ haveVirtualization() [1/2]

bool gem5::ArmSystem::haveVirtualization ( ) const
inline

◆ haveVirtualization() [2/2]

bool gem5::ArmSystem::haveVirtualization ( ThreadContext tc)
static

Returns true if the system of a specific thread context implements the virtualization Extensions.

Definition at line 120 of file system.cc.

References gem5::FullSystem, getArmSystem(), and haveVirtualization().

◆ highestEL() [1/2]

ArmISA::ExceptionLevel gem5::ArmSystem::highestEL ( ) const
inline

◆ highestEL() [2/2]

ExceptionLevel gem5::ArmSystem::highestEL ( ThreadContext tc)
static

Returns the highest implemented exception level for the system of a specific thread context.

Definition at line 132 of file system.cc.

References gem5::ArmISA::EL1, gem5::FullSystem, getArmSystem(), and highestEL().

◆ highestELIs64() [1/2]

bool gem5::ArmSystem::highestELIs64 ( ) const
inline

◆ highestELIs64() [2/2]

bool gem5::ArmSystem::highestELIs64 ( ThreadContext tc)
static

Returns true if the register width of the highest implemented exception level for the system of a specific thread context is 64 bits (ARMv8)

Definition at line 126 of file system.cc.

References gem5::FullSystem, getArmSystem(), and highestELIs64().

◆ PARAMS()

gem5::ArmSystem::PARAMS ( ArmSystem  )

◆ physAddrMask() [1/2]

Addr gem5::ArmSystem::physAddrMask ( ) const
inline

Returns the physical address mask.

Definition at line 265 of file system.hh.

References gem5::mask(), and physAddrRange().

Referenced by physAddrMask().

◆ physAddrMask() [2/2]

Addr gem5::ArmSystem::physAddrMask ( ThreadContext tc)
static

Returns the physical address mask for the system of a specific thread context.

Definition at line 173 of file system.cc.

References getArmSystem(), and physAddrMask().

◆ physAddrRange() [1/2]

uint8_t gem5::ArmSystem::physAddrRange ( ) const
inline

Returns the supported physical address range in bits.

Definition at line 255 of file system.hh.

References _haveLPAE, _highestELIs64, and _physAddrRange64.

Referenced by gem5::ArmISA::ISA::ISA(), physAddrMask(), physAddrRange(), and gem5::ArmISA::TLB::TLB().

◆ physAddrRange() [2/2]

uint8_t gem5::ArmSystem::physAddrRange ( ThreadContext tc)
static

Returns the supported physical address range in bits for the system of a specific thread context.

Definition at line 167 of file system.cc.

References getArmSystem(), and physAddrRange().

◆ physAddrRange64()

uint8_t gem5::ArmSystem::physAddrRange64 ( ) const
inline

Returns the supported physical address range in bits if the highest implemented exception level is 64 bits (ARMv8)

Definition at line 251 of file system.hh.

References _physAddrRange64.

◆ resetAddr() [1/2]

Addr gem5::ArmSystem::resetAddr ( ) const
inline

Returns the reset address if the highest implemented exception level is 64 bits (ARMv8)

Definition at line 220 of file system.hh.

References _resetAddr.

Referenced by gem5::ArmISA::ISA::clear32(), gem5::ArmISA::ISA::clear64(), gem5::ArmISA::Reset::invoke(), and resetAddr().

◆ resetAddr() [2/2]

Addr gem5::ArmSystem::resetAddr ( ThreadContext tc)
static

Returns the reset address if the highest implemented exception level for the system of a specific thread context is 64 bits (ARMv8)

Definition at line 161 of file system.cc.

References getArmSystem(), and resetAddr().

◆ setGenericTimer()

void gem5::ArmSystem::setGenericTimer ( GenericTimer generic_timer)
inline

Sets the pointer to the Generic Timer.

Definition at line 180 of file system.hh.

References _genericTimer.

Referenced by gem5::GenericTimer::GenericTimer().

◆ setGIC()

void gem5::ArmSystem::setGIC ( BaseGic gic)
inline

Sets the pointer to the GIC.

Definition at line 186 of file system.hh.

References _gic, and gem5::ArmISA::gic.

Referenced by gem5::BaseGic::init(), and gem5::Gicv3::unserialize().

◆ setPowerController()

void gem5::ArmSystem::setPowerController ( FVPBasePwrCtrl pwr_ctrl)
inline

Sets the pointer to the Power Controller.

Definition at line 189 of file system.hh.

References _pwrCtrl.

Referenced by gem5::FVPBasePwrCtrl::FVPBasePwrCtrl().

◆ setResetAddr()

void gem5::ArmSystem::setResetAddr ( Addr  addr)
inline

Definition at line 221 of file system.hh.

References _resetAddr, and gem5::X86ISA::addr.

◆ sveVL()

unsigned gem5::ArmSystem::sveVL ( ) const
inline

Returns the SVE vector length at reset, in quadwords.

Definition at line 235 of file system.hh.

References _sveVL.

Referenced by gem5::ArmISA::ISA::ISA().

Member Data Documentation

◆ _genericTimer

GenericTimer* gem5::ArmSystem::_genericTimer
protected

Pointer to the Generic Timer wrapper.

Definition at line 88 of file system.hh.

Referenced by getGenericTimer(), and setGenericTimer().

◆ _gic

BaseGic* gem5::ArmSystem::_gic
protected

Definition at line 89 of file system.hh.

Referenced by getGIC(), and setGIC().

◆ _haveCrypto

const bool gem5::ArmSystem::_haveCrypto
protected

True if this system implements the Crypto Extension.

Definition at line 83 of file system.hh.

Referenced by haveCrypto().

◆ _haveLargeAsid64

const bool gem5::ArmSystem::_haveLargeAsid64
protected

True if ASID is 16 bits in AArch64 (ARMv8)

Definition at line 116 of file system.hh.

Referenced by haveLargeAsid64().

◆ _haveLPAE

const bool gem5::ArmSystem::_haveLPAE
protected

True if this system implements the Large Physical Address Extension.

Definition at line 73 of file system.hh.

Referenced by haveLPAE(), and physAddrRange().

◆ _haveLSE

const bool gem5::ArmSystem::_haveLSE
protected

True if LSE is implemented (ARMv8.1)

Definition at line 134 of file system.hh.

Referenced by haveLSE().

◆ _havePAN

const unsigned gem5::ArmSystem::_havePAN
protected

True if Priviledge Access Never is implemented.

Definition at line 140 of file system.hh.

Referenced by havePAN().

◆ _haveSecEL2

const unsigned gem5::ArmSystem::_haveSecEL2
protected

True if Secure EL2 is implemented.

Definition at line 143 of file system.hh.

Referenced by haveSecEL2().

◆ _haveSecurity

const bool gem5::ArmSystem::_haveSecurity
protected

True if this system implements the Security Extensions.

Definition at line 68 of file system.hh.

Referenced by haveSecurity(), and highestEL().

◆ _haveSVE

const bool gem5::ArmSystem::_haveSVE
protected

True if SVE is implemented (ARMv8)

Definition at line 126 of file system.hh.

Referenced by haveSVE().

◆ _haveTME

const bool gem5::ArmSystem::_haveTME
protected

True if system implements the transactional memory extension (TME)

Definition at line 121 of file system.hh.

Referenced by haveTME().

◆ _haveVHE

const bool gem5::ArmSystem::_haveVHE
protected

True if FEAT_VHE (Virtualization Host Extensions) is implemented.

Definition at line 137 of file system.hh.

Referenced by haveVHE().

◆ _haveVirtualization

const bool gem5::ArmSystem::_haveVirtualization
protected

True if this system implements the virtualization Extensions.

Definition at line 78 of file system.hh.

Referenced by haveVirtualization(), and highestEL().

◆ _highestELIs64

bool gem5::ArmSystem::_highestELIs64
protected

True if the register width of the highest implemented exception level is 64 bits (ARMv8)

Definition at line 105 of file system.hh.

Referenced by ArmSystem(), highestELIs64(), and physAddrRange().

◆ _physAddrRange64

const uint8_t gem5::ArmSystem::_physAddrRange64
protected

Supported physical address range in bits if the highest implemented exception level is 64 bits (ARMv8)

Definition at line 111 of file system.hh.

Referenced by ArmSystem(), physAddrRange(), and physAddrRange64().

◆ _pwrCtrl

FVPBasePwrCtrl* gem5::ArmSystem::_pwrCtrl
protected

Pointer to the Power Controller (if any)

Definition at line 94 of file system.hh.

Referenced by getPowerController(), and setPowerController().

◆ _resetAddr

Addr gem5::ArmSystem::_resetAddr
protected

Reset address (ARMv8)

Definition at line 99 of file system.hh.

Referenced by ArmSystem(), resetAddr(), and setResetAddr().

◆ _sveVL

const unsigned gem5::ArmSystem::_sveVL
protected

SVE vector length at reset, in quadwords.

Definition at line 129 of file system.hh.

Referenced by sveVL().

◆ multiProc

bool gem5::ArmSystem::multiProc

true if this a multiprocessor system

Definition at line 159 of file system.hh.

Referenced by gem5::ArmISA::getMPIDR().

◆ PageBytes

constexpr Addr gem5::ArmSystem::PageBytes = ArmISA::PageBytes
staticconstexpr

Definition at line 151 of file system.hh.

Referenced by gem5::GenericTimerMem::validateFrameRange().

◆ PageShift

constexpr Addr gem5::ArmSystem::PageShift = ArmISA::PageShift
staticconstexpr

Definition at line 152 of file system.hh.

◆ semihosting

ArmSemihosting* const gem5::ArmSystem::semihosting
protected

True if the Semihosting interface is enabled.

Definition at line 148 of file system.hh.

Referenced by callSemihosting32(), callSemihosting64(), and haveSemihosting().


The documentation for this class was generated from the following files:

Generated on Tue Sep 21 2021 12:27:14 for gem5 by doxygen 1.8.17