gem5  v21.1.0.2
tlm_to_gem5.cc
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37  * 2. Redistributions in binary form must reproduce the above copyright
38  * notice, this list of conditions and the following disclaimer in the
39  * documentation and/or other materials provided with the distribution.
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41  * 3. Neither the name of the copyright holder nor the names of its
42  * contributors may be used to endorse or promote products derived from
43  * this software without specific prior written permission.
44  *
45  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
46  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
47  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
48  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
49  * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
50  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
51  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
52  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
53  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
54  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
55  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56  */
57 
59 
60 #include <utility>
61 
62 #include "params/TlmToGem5Bridge32.hh"
63 #include "params/TlmToGem5Bridge64.hh"
64 #include "params/TlmToGem5Bridge128.hh"
65 #include "params/TlmToGem5Bridge256.hh"
66 #include "params/TlmToGem5Bridge512.hh"
67 #include "sim/core.hh"
68 #include "sim/system.hh"
71 
72 using namespace gem5;
73 
74 namespace sc_gem5
75 {
76 
77 namespace
78 {
82 std::vector<PayloadToPacketConversionStep> extraPayloadToPacketSteps;
83 } // namespace
84 
92 void
94 {
95  extraPayloadToPacketSteps.push_back(std::move(step));
96 }
97 
100 {
101  MemCmd cmd;
102  RequestPtr req;
103 
104  Gem5SystemC::AtomicExtension *atomic_ex = nullptr;
105  trans.get_extension(atomic_ex);
106  if (atomic_ex) {
107  cmd = MemCmd::SwapReq;
108  Request::Flags flags = (atomic_ex->needReturn() ?
112  atomic_ex->getAtomicOpFunctor()->clone());
113  // FIXME: correct the context_id and pc state.
114  req = std::make_shared<Request>(
115  trans.get_address(), trans.get_data_length(), flags, _id,
116  0, 0, std::move(amo_op));
117  req->setPaddr(trans.get_address());
118  } else {
119  switch (trans.get_command()) {
121  cmd = MemCmd::ReadReq;
122  break;
124  cmd = MemCmd::WriteReq;
125  break;
127  return nullptr;
128  default:
129  SC_REPORT_FATAL("TlmToGem5Bridge",
130  "received transaction with unsupported "
131  "command");
132  }
133  Request::Flags flags;
134  req = std::make_shared<Request>(
135  trans.get_address(), trans.get_data_length(), flags, _id);
136  }
137 
138 
139  /*
140  * Allocate a new Packet. The packet will be deleted when it returns from
141  * the gem5 world as a response.
142  */
143  auto pkt = new Packet(req, cmd);
144  pkt->dataStatic(trans.get_data_ptr());
145 
146  // Apply all conversion steps necessary in this specific setup.
147  for (auto &step : extraPayloadToPacketSteps) {
148  step(pkt, trans);
149  }
150 
151  return pkt;
152 }
153 
154 template <unsigned int BITWIDTH>
155 void
157 {
159  auto delay = sc_core::SC_ZERO_TIME;
160 
161  auto status = socket->nb_transport_bw(trans, phase, delay);
163  "Unexpected status after sending END_REQ");
164 }
165 
166 template <unsigned int BITWIDTH>
167 void
169  sc_core::sc_time &delay)
170 {
172 
174 
175  auto status = socket->nb_transport_bw(trans, phase, delay);
176 
177  if (status == tlm::TLM_COMPLETED ||
178  (status == tlm::TLM_UPDATED && phase == tlm::END_RESP)) {
179  // transaction completed -> no need to wait for tlm::END_RESP
180  responseInProgress = false;
181  } else if (status == tlm::TLM_ACCEPTED) {
182  // we need to wait for tlm::END_RESP
183  responseInProgress = true;
184  } else {
185  panic("Unexpected status after sending BEGIN_RESP");
186  }
187 }
188 
189 template <unsigned int BITWIDTH>
190 void
192 {
193  sc_assert(!waitForRetry);
194  sc_assert(pendingRequest == nullptr);
195  sc_assert(pendingPacket == nullptr);
196 
197  trans.acquire();
198 
199  PacketPtr pkt = nullptr;
200 
201  Gem5SystemC::Gem5Extension *extension = nullptr;
202  trans.get_extension(extension);
203 
204  // If there is an extension, this transaction was initiated by the gem5
205  // world and we can pipe through the original packet. Otherwise, we
206  // generate a new packet based on the transaction.
207  if (extension != nullptr) {
208  pkt = extension->getPacket();
209  } else {
210  pkt = payload2packet(_id, trans);
211  }
212 
213  auto tlmSenderState = new TlmSenderState(trans);
214  pkt->pushSenderState(tlmSenderState);
215 
216  // If the packet doesn't need a response, we should send BEGIN_RESP by
217  // ourselves.
218  bool needsResponse = pkt->needsResponse();
219  if (bmp.sendTimingReq(pkt)) { // port is free -> send END_REQ immediately
220  sendEndReq(trans);
221  if (!needsResponse) {
222  auto delay = sc_core::SC_ZERO_TIME;
223  sendBeginResp(trans, delay);
224  }
225  trans.release();
226  } else { // port is blocked -> wait for retry before sending END_REQ
227  waitForRetry = true;
228  pendingRequest = &trans;
229  pendingPacket = pkt;
230  }
231 }
232 
233 template <unsigned int BITWIDTH>
234 void
236 {
237  sc_assert(responseInProgress);
238 
239  responseInProgress = false;
240 
241  checkTransaction(trans);
242 
243  if (needToSendRetry) {
244  bmp.sendRetryResp();
245  needToSendRetry = false;
246  }
247 }
248 
249 template <unsigned int BITWIDTH>
250 void
252 {
253  delete pkt;
254 }
255 
256 template <unsigned int BITWIDTH>
257 void
259 {
260  if (trans.is_response_error()) {
261  std::stringstream ss;
262  ss << "Transaction returned with error, response status = "
263  << trans.get_response_string();
264  SC_REPORT_ERROR("TLM-2", ss.str().c_str());
265  }
266 }
267 
268 template <unsigned int BITWIDTH>
269 void
271 {
272  socket->invalidate_direct_mem_ptr(
273  backdoor.range().start(), backdoor.range().end());
274 }
275 
276 template <unsigned int BITWIDTH>
277 void
279  const tlm::tlm_phase &phase)
280 {
281  switch (phase) {
282  case tlm::BEGIN_REQ:
283  handleBeginReq(trans);
284  break;
285  case tlm::END_RESP:
286  handleEndResp(trans);
287  break;
288  default:
289  panic("unimplemented phase in callback");
290  }
291 }
292 
293 template <unsigned int BITWIDTH>
297  sc_core::sc_time &delay)
298 {
299  unsigned len = trans.get_data_length();
300  unsigned char *byteEnable = trans.get_byte_enable_ptr();
301  unsigned width = trans.get_streaming_width();
302 
303  // check the transaction attributes for unsupported features ...
304  if (byteEnable != 0) {
306  return tlm::TLM_COMPLETED;
307  }
308  if (width < len) { // is this a burst request?
310  return tlm::TLM_COMPLETED;
311  }
312 
313  // ... and queue the valid transaction
314  trans.acquire();
315  peq.notify(trans, phase, delay);
316  return tlm::TLM_ACCEPTED;
317 }
318 
319 template <unsigned int BITWIDTH>
320 void
323 {
324  Gem5SystemC::Gem5Extension *extension = nullptr;
325  trans.get_extension(extension);
326 
327  PacketPtr pkt = nullptr;
328 
329  // If there is an extension, this transaction was initiated by the gem5
330  // world and we can pipe through the original packet.
331  if (extension != nullptr) {
332  pkt = extension->getPacket();
333  } else {
334  pkt = payload2packet(_id, trans);
335  }
336 
337  MemBackdoorPtr backdoor = nullptr;
338  Tick ticks = bmp.sendAtomicBackdoor(pkt, backdoor);
339  if (backdoor)
340  trans.set_dmi_allowed(true);
341 
342  // send an atomic request to gem5
343  panic_if(pkt->needsResponse() && !pkt->isResponse(),
344  "Packet sending failed!\n");
345 
346  auto delay =
347  sc_core::sc_time((double)(ticks / sim_clock::as_int::ps),
349 
350  // update time
351  t += delay;
352 
353  if (extension == nullptr)
354  destroyPacket(pkt);
355 
357 }
358 
359 template <unsigned int BITWIDTH>
360 unsigned int
362 {
363  Gem5SystemC::Gem5Extension *extension = nullptr;
364  trans.get_extension(extension);
365 
366  // If there is an extension, this transaction was initiated by the gem5
367  // world and we can pipe through the original packet.
368  if (extension != nullptr) {
369  bmp.sendFunctional(extension->getPacket());
370  } else {
371  auto pkt = payload2packet(_id, trans);
372  if (pkt) {
373  bmp.sendFunctional(pkt);
374  destroyPacket(pkt);
375  }
376  }
377 
378  return trans.get_data_length();
379 }
380 
381 template <unsigned int BITWIDTH>
382 bool
384  tlm::tlm_dmi &dmi_data)
385 {
386  Gem5SystemC::Gem5Extension *extension = nullptr;
387  trans.get_extension(extension);
388 
389  PacketPtr pkt = nullptr;
390 
391  // If there is an extension, this transaction was initiated by the gem5
392  // world and we can pipe through the original packet.
393  if (extension != nullptr) {
394  pkt = extension->getPacket();
395  } else {
396  pkt = payload2packet(_id, trans);
397  pkt->req->setFlags(Request::NO_ACCESS);
398  }
399 
400  MemBackdoorPtr backdoor = nullptr;
401  bmp.sendAtomicBackdoor(pkt, backdoor);
402  if (backdoor) {
403  trans.set_dmi_allowed(true);
404  dmi_data.set_dmi_ptr(backdoor->ptr());
405  dmi_data.set_start_address(backdoor->range().start());
406  dmi_data.set_end_address(backdoor->range().end());
407 
408  typedef tlm::tlm_dmi::dmi_access_e access_t;
409  access_t access = tlm::tlm_dmi::DMI_ACCESS_NONE;
410  if (backdoor->readable())
411  access = (access_t)(access | tlm::tlm_dmi::DMI_ACCESS_READ);
412  if (backdoor->writeable())
413  access = (access_t)(access | tlm::tlm_dmi::DMI_ACCESS_WRITE);
414  dmi_data.set_granted_access(access);
415 
416  backdoor->addInvalidationCallback(
417  [this](const MemBackdoor &backdoor)
418  {
419  invalidateDmi(backdoor);
420  }
421  );
422  }
423 
424  if (extension == nullptr)
425  destroyPacket(pkt);
426 
428 
429  return backdoor != nullptr;
430 }
431 
432 template <unsigned int BITWIDTH>
433 bool
435 {
436  // exclusion rule
437  // We need to Wait for END_RESP before sending next BEGIN_RESP
438  if (responseInProgress) {
439  sc_assert(!needToSendRetry);
440  needToSendRetry = true;
441  return false;
442  }
443 
444  sc_assert(pkt->isResponse());
445 
446  /*
447  * Pay for annotated transport delays.
448  *
449  * See recvTimingReq in sc_slave_port.cc for a detailed description.
450  */
451  auto delay = sc_core::sc_time::from_value(pkt->payloadDelay);
452  // reset the delays
453  pkt->payloadDelay = 0;
454  pkt->headerDelay = 0;
455 
456  auto tlmSenderState = dynamic_cast<TlmSenderState*>(pkt->popSenderState());
457  sc_assert(tlmSenderState != nullptr);
458 
459  auto &trans = tlmSenderState->trans;
460 
461  Gem5SystemC::Gem5Extension *extension = nullptr;
462  trans.get_extension(extension);
463 
464  // clean up
465  delete tlmSenderState;
466 
467  // If there is an extension the packet was piped through and we must not
468  // delete it. The packet travels back with the transaction.
469  if (extension == nullptr)
470  destroyPacket(pkt);
471 
472  sendBeginResp(trans, delay);
473  trans.release();
474 
475  return true;
476 }
477 
478 template <unsigned int BITWIDTH>
479 void
481 {
482  sc_assert(waitForRetry);
483  sc_assert(pendingRequest != nullptr);
484  sc_assert(pendingPacket != nullptr);
485 
486  // If the packet doesn't need a response, we should send BEGIN_RESP by
487  // ourselves.
488  bool needsResponse = pendingPacket->needsResponse();
489  if (bmp.sendTimingReq(pendingPacket)) {
490  waitForRetry = false;
491  pendingPacket = nullptr;
492 
493  auto &trans = *pendingRequest;
494  sendEndReq(trans);
495  if (!needsResponse) {
496  auto delay = sc_core::SC_ZERO_TIME;
497  sendBeginResp(trans, delay);
498  }
499  trans.release();
500 
501  pendingRequest = nullptr;
502  }
503 }
504 
505 template <unsigned int BITWIDTH>
506 void
508 {
509  SC_REPORT_WARNING("TlmToGem5Bridge",
510  "received address range change but ignored it");
511 }
512 
513 template <unsigned int BITWIDTH>
514 gem5::Port &
515 TlmToGem5Bridge<BITWIDTH>::gem5_getPort(const std::string &if_name, int idx)
516 {
517  if (if_name == "gem5")
518  return bmp;
519  else if (if_name == "tlm")
520  return wrapper;
521 
522  return sc_core::sc_module::gem5_getPort(if_name, idx);
523 }
524 
525 template <unsigned int BITWIDTH>
527  const Params &params, const sc_core::sc_module_name &mn) :
528  TlmToGem5BridgeBase(mn), peq(this, &TlmToGem5Bridge<BITWIDTH>::peq_cb),
529  waitForRetry(false), pendingRequest(nullptr), pendingPacket(nullptr),
530  needToSendRetry(false), responseInProgress(false),
531  bmp(std::string(name()) + "master", *this), socket("tlm_socket"),
532  wrapper(socket, std::string(name()) + ".tlm", InvalidPortID),
533  system(params.system),
534  _id(params.system->getGlobalRequestorId(
535  std::string("[systemc].") + name()))
536 {
537 }
538 
539 template <unsigned int BITWIDTH>
540 void
542 {
543  /*
544  * Register the TLM non-blocking interface when using gem5 Timing mode and
545  * the TLM blocking interface when using the gem5 Atomic mode.
546  * Then the magic (TM) in simple_target_socket automatically transforms
547  * non-blocking in blocking transactions and vice versa.
548  *
549  * NOTE: The mode may change during execution.
550  */
551  if (system->isTimingMode()) {
552  SC_REPORT_INFO("TlmToGem5Bridge", "register non-blocking interface");
553  socket.register_nb_transport_fw(
555  } else if (system->isAtomicMode()) {
556  SC_REPORT_INFO("TlmToGem5Bridge", "register blocking interface");
557  socket.register_b_transport(
559  socket.register_get_direct_mem_ptr(
561  } else {
562  panic("gem5 operates neither in Timing nor in Atomic mode");
563  }
564 
565  socket.register_transport_dbg(
567 
569 }
570 
571 } // namespace sc_gem5
572 
574 gem5::TlmToGem5Bridge32Params::create() const
575 {
576  return new sc_gem5::TlmToGem5Bridge<32>(
577  *this, sc_core::sc_module_name(name.c_str()));
578 }
579 
581 gem5::TlmToGem5Bridge64Params::create() const
582 {
583  return new sc_gem5::TlmToGem5Bridge<64>(
584  *this, sc_core::sc_module_name(name.c_str()));
585 }
586 
588 gem5::TlmToGem5Bridge128Params::create() const
589 {
591  *this, sc_core::sc_module_name(name.c_str()));
592 }
593 
595 gem5::TlmToGem5Bridge256Params::create() const
596 {
598  *this, sc_core::sc_module_name(name.c_str()));
599 }
600 
602 gem5::TlmToGem5Bridge512Params::create() const
603 {
605  *this, sc_core::sc_module_name(name.c_str()));
606 }
sc_core::sc_time::from_value
static sc_time from_value(sc_dt::uint64)
Definition: sc_time.cc:210
sc_gem5::payload2packet
PacketPtr payload2packet(RequestorID _id, tlm::tlm_generic_payload &trans)
Definition: tlm_to_gem5.cc:99
gem5::ArmISA::len
Bitfield< 18, 16 > len
Definition: misc_types.hh:444
gem5::AddrRange::start
Addr start() const
Get the start address of the range.
Definition: addr_range.hh:317
system.hh
tlm_to_gem5.hh
gem5::MemCmd::SwapReq
@ SwapReq
Definition: packet.hh:115
gem5::AtomicOpFunctor::clone
virtual AtomicOpFunctor * clone()=0
tlm::tlm_phase
Definition: phase.hh:47
Gem5SystemC::AtomicExtension::needReturn
bool needReturn() const
Definition: sc_ext.cc:117
gem5::Packet::pushSenderState
void pushSenderState(SenderState *sender_state)
Push a new sender state to the packet and make the current sender state the predecessor of the new on...
Definition: packet.cc:316
tlm::TLM_COMPLETED
@ TLM_COMPLETED
Definition: fw_bw_ifs.hh:65
gem5::Packet::req
RequestPtr req
A pointer to the original request.
Definition: packet.hh:366
tlm::tlm_generic_payload::get_streaming_width
unsigned int get_streaming_width() const
Definition: gp.hh:228
sc_module_name.hh
tlm::tlm_dmi
Definition: dmi.hh:46
tlm::TLM_WRITE_COMMAND
@ TLM_WRITE_COMMAND
Definition: gp.hh:102
tlm::TLM_UPDATED
@ TLM_UPDATED
Definition: fw_bw_ifs.hh:65
tlm::TLM_OK_RESPONSE
@ TLM_OK_RESPONSE
Definition: gp.hh:108
tlm::END_REQ
@ END_REQ
Definition: phase.hh:42
tlm::TLM_BYTE_ENABLE_ERROR_RESPONSE
@ TLM_BYTE_ENABLE_ERROR_RESPONSE
Definition: gp.hh:114
sc_core::SC_ZERO_TIME
const sc_time SC_ZERO_TIME
Definition: sc_time.cc:290
SC_REPORT_FATAL
#define SC_REPORT_FATAL(msg_type, msg)
Definition: sc_report_handler.hh:131
tlm::tlm_dmi::DMI_ACCESS_READ
@ DMI_ACCESS_READ
Definition: dmi.hh:90
gem5::MemBackdoor::readable
bool readable() const
Definition: backdoor.hh:69
gem5::X86ISA::system
Bitfield< 15 > system
Definition: misc.hh:1003
std::vector
STL vector class.
Definition: stl.hh:37
Gem5SystemC::Gem5Extension::getPacket
gem5::PacketPtr getPacket()
Definition: sc_ext.cc:64
gem5::MemBackdoor::addInvalidationCallback
void addInvalidationCallback(CbFunction func)
Definition: backdoor.hh:103
tlm::tlm_generic_payload::release
void release()
Definition: gp.hh:147
gem5::InvalidPortID
const PortID InvalidPortID
Definition: types.hh:253
gem5::Packet::headerDelay
uint32_t headerDelay
The extra delay from seeing the packet until the header is transmitted.
Definition: packet.hh:420
sc_assert
#define sc_assert(expr)
Definition: sc_report_handler.hh:135
tlm::tlm_generic_payload::set_dmi_allowed
void set_dmi_allowed(bool dmi_allowed)
Definition: gp.hh:256
tlm::tlm_generic_payload::get_response_string
std::string get_response_string() const
Definition: gp.cc:292
gem5::MemCmd
Definition: packet.hh:75
gem5::Request::ATOMIC_RETURN_OP
@ ATOMIC_RETURN_OP
The request is an atomic that returns data.
Definition: request.hh:173
gem5::Packet::payloadDelay
uint32_t payloadDelay
The extra pipelining delay from seeing the packet until the end of payload is transmitted by the comp...
Definition: packet.hh:438
tlm::TLM_BURST_ERROR_RESPONSE
@ TLM_BURST_ERROR_RESPONSE
Definition: gp.hh:113
tlm::tlm_dmi::set_end_address
void set_end_address(sc_dt::uint64 addr)
Definition: dmi.hh:117
gem5::Flags< FlagsType >
tlm::tlm_generic_payload::get_command
tlm_command get_command() const
Definition: gp.hh:197
tlm::tlm_generic_payload::get_byte_enable_ptr
unsigned char * get_byte_enable_ptr() const
Definition: gp.hh:236
gem5::Request::ATOMIC_NO_RETURN_OP
@ ATOMIC_NO_RETURN_OP
The request is an atomic that does not return data.
Definition: request.hh:175
SC_REPORT_ERROR
#define SC_REPORT_ERROR(msg_type, msg)
Definition: sc_report_handler.hh:127
tlm::tlm_generic_payload::get_data_length
unsigned int get_data_length() const
Definition: gp.hh:209
sc_gem5::TlmToGem5BridgeBase
Definition: tlm_to_gem5.hh:84
gem5::ArmISA::width
Bitfield< 4 > width
Definition: misc_types.hh:71
sc_gem5::TlmToGem5Bridge::before_end_of_elaboration
void before_end_of_elaboration() override
Definition: tlm_to_gem5.cc:541
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::sim_clock::as_int::ps
Tick ps
picosecond
Definition: core.cc:72
gem5::probing::Packet
ProbePointArg< PacketInfo > Packet
Packet probe point.
Definition: mem.hh:109
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::RequestPtr
std::shared_ptr< Request > RequestPtr
Definition: request.hh:92
sc_core::sc_time
Definition: sc_time.hh:49
gem5::MemCmd::ReadReq
@ ReadReq
Definition: packet.hh:86
sc_gem5::TlmToGem5Bridge::TlmSenderState
Definition: tlm_to_gem5.hh:94
tlm::TLM_READ_COMMAND
@ TLM_READ_COMMAND
Definition: gp.hh:101
gem5::AddrRange::end
Addr end() const
Get the end address of the range.
Definition: addr_range.hh:324
sc_core::sc_module_name
Definition: sc_module_name.hh:41
ss
std::stringstream ss
Definition: trace.test.cc:45
tlm::tlm_generic_payload::acquire
void acquire()
Definition: gp.hh:140
tlm::tlm_generic_payload::get_extension
void get_extension(T *&ext) const
Definition: gp.hh:381
gem5::ArmISA::t
Bitfield< 5 > t
Definition: misc_types.hh:70
gem5::Packet::needsResponse
bool needsResponse() const
Definition: packet.hh:597
tlm::END_RESP
@ END_RESP
Definition: phase.hh:44
core.hh
tlm::TLM_IGNORE_COMMAND
@ TLM_IGNORE_COMMAND
Definition: gp.hh:103
name
const std::string & name()
Definition: trace.cc:49
SC_REPORT_INFO
#define SC_REPORT_INFO(msg_type, msg)
Definition: sc_report_handler.hh:119
gem5::MemBackdoor
Definition: backdoor.hh:41
sc_gem5::addPayloadToPacketConversionStep
void addPayloadToPacketConversionStep(PayloadToPacketConversionStep step)
Notify the Tlm2Gem5 bridge that we need an extra step to properly convert a tlm payload to gem5 packe...
Definition: tlm_to_gem5.cc:93
sc_gem5::TlmToGem5Bridge::Params
gem5::TlmToGem5BridgeBaseParams Params
Definition: tlm_to_gem5.hh:171
gem5::Packet::popSenderState
SenderState * popSenderState()
Pop the top of the state stack and return a pointer to it.
Definition: packet.cc:324
SC_REPORT_WARNING
#define SC_REPORT_WARNING(msg_type, msg)
Definition: sc_report_handler.hh:123
tlm::BEGIN_REQ
@ BEGIN_REQ
Definition: phase.hh:41
gem5::MemBackdoor::writeable
bool writeable() const
Definition: backdoor.hh:79
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:203
sc_gem5::PayloadToPacketConversionStep
std::function< void(gem5::PacketPtr pkt, tlm::tlm_generic_payload &trans)> PayloadToPacketConversionStep
Definition: tlm_to_gem5.hh:77
sc_core::SC_PS
@ SC_PS
Definition: sc_time.hh:42
tlm::tlm_generic_payload
Definition: gp.hh:133
gem5::MemBackdoor::ptr
uint8_t * ptr() const
Definition: backdoor.hh:62
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
std
Overload hash function for BasicBlockRange type.
Definition: types.hh:111
sc_gem5::TlmToGem5Bridge
Definition: tlm_to_gem5.hh:91
Gem5SystemC::AtomicExtension
Definition: sc_ext.hh:64
gem5::MemBackdoor::range
const AddrRange & range() const
Definition: backdoor.hh:58
sc_core::sc_module::gem5_getPort
virtual gem5::Port & gem5_getPort(const std::string &if_name, int idx=-1)
Definition: sc_module.cc:117
sc_core::sc_module::before_end_of_elaboration
virtual void before_end_of_elaboration()
Definition: sc_module.hh:249
gem5::MemCmd::WriteReq
@ WriteReq
Definition: packet.hh:89
gem5::Request::NO_ACCESS
@ NO_ACCESS
The request should not cause a memory access.
Definition: request.hh:146
tlm::tlm_sync_enum
tlm_sync_enum
Definition: fw_bw_ifs.hh:48
tlm::tlm_generic_payload::is_response_error
bool is_response_error() const
Definition: gp.hh:214
tlm::tlm_dmi::set_dmi_ptr
void set_dmi_ptr(unsigned char *p)
Definition: dmi.hh:115
tlm::tlm_dmi::DMI_ACCESS_NONE
@ DMI_ACCESS_NONE
Definition: dmi.hh:89
sc_gem5
Definition: sc_clock.cc:41
gem5::RequestorID
uint16_t RequestorID
Definition: request.hh:95
Gem5SystemC::Gem5Extension
Definition: sc_ext.hh:46
tlm::tlm_dmi::set_start_address
void set_start_address(sc_dt::uint64 addr)
Definition: dmi.hh:116
tlm::tlm_dmi::dmi_access_e
dmi_access_e
Definition: dmi.hh:71
Gem5SystemC::AtomicExtension::getAtomicOpFunctor
gem5::AtomicOpFunctor * getAtomicOpFunctor() const
Definition: sc_ext.cc:123
gem5::AtomicOpFunctorPtr
std::unique_ptr< AtomicOpFunctor > AtomicOpFunctorPtr
Definition: amo.hh:242
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
sc_time.hh
tlm::tlm_dmi::DMI_ACCESS_WRITE
@ DMI_ACCESS_WRITE
Definition: dmi.hh:91
tlm::tlm_generic_payload::get_address
sc_dt::uint64 get_address() const
Definition: gp.hh:201
tlm::tlm_generic_payload::get_data_ptr
unsigned char * get_data_ptr() const
Definition: gp.hh:205
gem5::Packet::isResponse
bool isResponse() const
Definition: packet.hh:587
tlm::BEGIN_RESP
@ BEGIN_RESP
Definition: phase.hh:43
tlm::tlm_dmi::set_granted_access
void set_granted_access(dmi_access_e a)
Definition: dmi.hh:120
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:177
gem5::ArmISA::status
Bitfield< 5, 0 > status
Definition: misc_types.hh:422
tlm::tlm_generic_payload::set_response_status
void set_response_status(const tlm_response_status response_status)
Definition: gp.hh:221
tlm::TLM_ACCEPTED
@ TLM_ACCEPTED
Definition: fw_bw_ifs.hh:65

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