50 #include "debug/MemTest.hh" 62 memtest.completeRequest(pkt);
78 if (!port.sendTimingReq(pkt)) {
88 tickEvent([this]{
tick(); },
name()),
105 atomic(
p->system->isAtomicMode()),
128 if (if_name ==
"port")
138 assert(req->getSize() == 1);
146 pkt->
isWrite() ?
"write" :
"read",
148 pkt->
isError() ?
"error" :
"success");
150 const uint8_t *pkt_data = pkt->
getConstPtr<uint8_t>();
154 warn(
"%s access failed at %#x\n",
155 pkt->
isWrite() ?
"Write" :
"Read", req->getPaddr());
160 if (pkt_data[0] != ref_data) {
161 panic(
"%s: read of %x (blk %x) @ cycle %d " 162 "returns %x, expected %x\n",
name(),
164 pkt_data[0], ref_data);
171 ccprintf(cerr,
"%s: completed %d read, %d write accesses @%d\n",
204 using namespace Stats;
208 .
desc(
"number of read accesses completed")
213 .
desc(
"number of write accesses completed")
256 "Tester %s has more than 100 outstanding requests\n",
name());
259 uint8_t *pkt_data =
new uint8_t[1];
269 ref_data = ref->second;
273 "Initiating %sread at addr %x (blk %x) expecting %x\n",
274 do_functional ?
"functional " :
"", req->getPaddr(),
278 pkt->dataDynamic(pkt_data);
280 DPRINTF(
MemTest,
"Initiating %swrite at addr %x (blk %x) value %x\n",
281 do_functional ?
"functional " :
"", req->getPaddr(),
285 pkt->dataDynamic(pkt_data);
290 bool keep_ticking =
true;
292 pkt->setSuppressFuncError();
342 MemTestParams::create()
#define panic(...)
This implements a cprintf based panic() function.
void ccprintf(cp::Print &print)
bool sendPkt(PacketPtr pkt)
The request is to an uncacheable address.
Ports are used to interface objects to each other.
EventFunctionWrapper noResponseEvent
virtual Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
Get a port with a given name and index.
EventFunctionWrapper tickEvent
Bitfield< 23, 20 > atomic
const unsigned percentFunctional
void recvReqRetry()
Called by the peer if sendTimingReq was called on this peer (causing recvTimingReq to be called on th...
const unsigned progressInterval
std::shared_ptr< Request > RequestPtr
Addr blockAlign(Addr addr) const
Get the block aligned address.
virtual void regStats()
Callback to set stat parameters.
std::unordered_map< Addr, uint8_t > referenceData
Overload hash function for BasicBlockRange type.
bool sendTimingReq(PacketPtr pkt)
Attempt to send a timing request to the slave port by calling its corresponding receive function...
void regStats() override
Callback to set stat parameters.
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Declaration of Statistics objects.
EventFunctionWrapper noRequestEvent
void deschedule(Event &event)
std::enable_if< std::is_integral< T >::value, T >::type random()
Use the SFINAE idiom to choose an implementation based on whether the type is integral or floating po...
RequestPtr req
A pointer to the original request.
MasterID masterId
Request id for all generated traffic.
Tick curTick()
The current simulated tick.
bool scheduled() const
Determine if the current event is scheduled.
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
The MemTest class tests a cache coherent memory system by generating false sharing and verifying the ...
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
virtual const std::string name() const
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Tick clockEdge(Cycles cycles=Cycles(0)) const
Determine the tick when a cycle begins, by default the current one, but the argument also enables the...
Stats::Scalar numReadsStat
unsigned int TESTER_ALLOCATOR
std::set< Addr > outstandingAddrs
Derived & name(const std::string &name)
Set the name and marks this stat to print at the end of simulation.
void reschedule(Event &event, Tick when, bool always=false)
void exitSimLoop(const std::string &message, int exit_code, Tick when, Tick repeat, bool serialize)
Schedule an event to exit the simulation loop (returning to Python) at the end of the current cycle (...
const unsigned percentUncacheable
const bool suppressFuncWarnings
const Cycles progressCheck
const unsigned percentReads
void schedule(Event &event, Tick when)
const T * getConstPtr() const
void sendFunctional(PacketPtr pkt) const
Send a functional request packet, where the data is instantly updated everywhere in the memory system...
Stats::Scalar numWritesStat
Derived & desc(const std::string &_desc)
Set the description and marks this stat to print at the end of simulation.
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
void completeRequest(PacketPtr pkt, bool functional=false)
Complete a request by checking the response.
static const int NumArgumentRegs M5_VAR_USED
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
ProbePointArg< PacketInfo > Packet
Packet probe point.