The base crossbar contains the common elements of the non-coherent and coherent crossbar. More...

#include <xbar.hh>

Inheritance diagram for gem5::BaseXBar:

Classes
class	Layer
	A layer is an internal crossbar arbitration point with its own flow control. More...

class	ReqLayer

class	RespLayer

class	SnoopRespLayer

Public Member Functions
virtual	~BaseXBar ()

Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	A function used to return the port associated with this object.

void	regStats () override
	Callback to set stat parameters.

Public Member Functions inherited from gem5::ClockedObject
	ClockedObject (const ClockedObjectParams &p)

void	serialize (CheckpointOut &cp) const override
	Serialize an object.

void	unserialize (CheckpointIn &cp) override
	Unserialize an object.

Public Member Functions inherited from gem5::SimObject
const Params &	params () const

	SimObject (const Params &p)

virtual	~SimObject ()

virtual void	init ()
	init() is called after all C++ SimObjects have been created and all ports are connected.

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint.

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint.

virtual void	regProbePoints ()
	Register probe points for this object.

virtual void	regProbeListeners ()
	Register probe listeners for this object.

ProbeManager *	getProbeManager ()
	Get the probe manager for this object.

virtual void	startup ()
	startup() is the final initialization call before simulation.

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining.

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes.

virtual void	memInvalidate ()
	Invalidate the contents of memory buffers.

void	serialize (CheckpointOut &cp) const override
	Serialize an object.

void	unserialize (CheckpointIn &cp) override
	Unserialize an object.

Public Member Functions inherited from gem5::EventManager
EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers.

void	setCurTick (Tick newVal)

	EventManager (EventManager &em)
	Event manger manages events in the event queue.

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

Public Member Functions inherited from gem5::Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section.

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object.

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from gem5::Drainable
DrainState	drainState () const
	Return the current drain state of an object.

virtual void	notifyFork ()
	Notify a child process of a fork.

Public Member Functions inherited from gem5::statistics::Group
	Group (Group parent, const char name=nullptr)
	Construct a new statistics group.

virtual	~Group ()

virtual void	resetStats ()
	Callback to reset stats.

virtual void	preDumpStats ()
	Callback before stats are dumped.

void	addStat (statistics::Info *info)
	Register a stat with this group.

const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object.

const std::vector< Info * > &	getStats () const
	Get all stats associated with this object.

void	addStatGroup (const char name, Group block)
	Add a stat block as a child of this block.

const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group.

void	mergeStatGroup (Group *block)
	Merge the contents (stats & children) of a block to this block.

	Group ()=delete

	Group (const Group &)=delete

Group &	operator= (const Group &)=delete

Public Member Functions inherited from gem5::Named
	Named (const std::string &name_)

virtual	~Named ()=default

virtual std::string	name () const

Public Member Functions inherited from gem5::Clocked
void	updateClockPeriod ()
	Update the tick to the current tick.

Tick	clockEdge (Cycles cycles=Cycles(0)) const
	Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle.

Cycles	curCycle () const
	Determine the current cycle, corresponding to a tick aligned to a clock edge.

Tick	nextCycle () const
	Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future.

uint64_t	frequency () const

Tick	clockPeriod () const

double	voltage () const

Cycles	ticksToCycles (Tick t) const

Tick	cyclesToTicks (Cycles c) const

Protected Member Functions
virtual void	recvRangeChange (PortID mem_side_port_id)
	Function called by the port when the crossbar is recieving a range change.

PortID	findPort (AddrRange addr_range, PacketPtr pkt=nullptr)
	Find which port connected to this crossbar (if any) should be given a packet with this address range.

PortID	findPort (PacketPtr pkt)

AddrRangeList	getAddrRanges () const
	Return the address ranges the crossbar is responsible for.

void	calcPacketTiming (PacketPtr pkt, Tick header_delay)
	Calculate the timing parameters for the packet.

	BaseXBar (const BaseXBarParams &p)

Protected Member Functions inherited from gem5::Drainable
	Drainable ()

virtual	~Drainable ()

virtual void	drainResume ()
	Resume execution after a successful drain.

void	signalDrainDone () const
	Signal that an object is drained.

Protected Member Functions inherited from gem5::Clocked
	Clocked (ClockDomain &clk_domain)
	Create a clocked object and set the clock domain based on the parameters.

	Clocked (Clocked &)=delete

Clocked &	operator= (Clocked &)=delete

virtual	~Clocked ()
	Virtual destructor due to inheritance.

void	resetClock () const
	Reset the object's clock using the current global tick value.

virtual void	clockPeriodUpdated ()
	A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed.

Protected Attributes
const Cycles	frontendLatency
	Cycles of front-end pipeline including the delay to accept the request and to decode the address.

const Cycles	forwardLatency

const Cycles	responseLatency

const Cycles	headerLatency
	Cycles the layer is occupied processing the packet header.

const uint32_t	width
	the width of the xbar in bytes

AddrRangeMap< PortID, 3 >	portMap

std::unordered_map< RequestPtr, PortID >	routeTo
	Remember where request packets came from so that we can route responses to the appropriate port.

AddrRangeList	xbarRanges
	all contigous ranges seen by this crossbar

AddrRange	defaultRange

std::vector< bool >	gotAddrRanges
	Remember for each of the memory-side ports of the crossbar if we got an address range from the connected CPU-side ports.

bool	gotAllAddrRanges

std::vector< QueuedResponsePort * >	cpuSidePorts
	The memory-side ports and CPU-side ports of the crossbar.

std::vector< RequestPort * >	memSidePorts

PortID	defaultPortID
	Port that handles requests that don't match any of the interfaces.

const bool	useDefaultRange
	If true, use address range provided by default device.

statistics::Vector	transDist
	Stats for transaction distribution and data passing through the crossbar.

statistics::Vector2d	pktCount

statistics::Vector2d	pktSize

Protected Attributes inherited from gem5::SimObject
const SimObjectParams &	_params
	Cached copy of the object parameters.

Protected Attributes inherited from gem5::EventManager
EventQueue *	eventq
	A pointer to this object's event queue.

Additional Inherited Members
Public Types inherited from gem5::ClockedObject
using	Params = ClockedObjectParams
	Parameters of ClockedObject.

Public Types inherited from gem5::SimObject
typedef SimObjectParams	Params

Static Public Member Functions inherited from gem5::SimObject
static void	serializeAll (const std::string &cpt_dir)
	Create a checkpoint by serializing all SimObjects in the system.

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it.

static void	setSimObjectResolver (SimObjectResolver *resolver)
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

static SimObjectResolver *	getSimObjectResolver ()
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

Static Public Member Functions inherited from gem5::Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section.

static void	generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
	Generate a checkpoint file so that the serialization can be routed to it.

Public Attributes inherited from gem5::ClockedObject
PowerState *	powerState

Detailed Description

The base crossbar contains the common elements of the non-coherent and coherent crossbar.

It is an abstract class that does not have any of the functionality relating to the actual reception and transmission of packets, as this is left for the subclasses.

The BaseXBar is responsible for the basic flow control (busy or not), the administration of retries, and the address decoding.

Definition at line 71 of file xbar.hh.

Constructor & Destructor Documentation

◆ BaseXBar()

gem5::BaseXBar::BaseXBar ( const BaseXBarParams & p )

protected

Definition at line 60 of file xbar.cc.

◆ ~BaseXBar()

gem5::BaseXBar::~BaseXBar ( )

virtual

Definition at line 81 of file xbar.cc.

References cpuSidePorts, and memSidePorts.

Member Function Documentation

◆ calcPacketTiming()

void gem5::BaseXBar::calcPacketTiming	(	PacketPtr	pkt,
		Tick	header_delay )

protected

Calculate the timing parameters for the packet.

Updates the headerDelay and payloadDelay fields of the packet object with the relative number of ticks required to transmit the header and the payload, respectively.

Parameters

pkt	Packet to populate with timings
header_delay	Header delay to be added

Definition at line 108 of file xbar.cc.

References gem5::Clocked::clockEdge(), gem5::curTick(), and gem5::ArmISA::offset.

Referenced by gem5::CoherentXBar::recvTimingReq(), gem5::HMCController::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), gem5::CoherentXBar::recvTimingResp(), gem5::NoncoherentXBar::recvTimingResp(), gem5::CoherentXBar::recvTimingSnoopReq(), and gem5::CoherentXBar::recvTimingSnoopResp().

◆ findPort() [1/2]

PortID gem5::BaseXBar::findPort	(	AddrRange	addr_range,
		PacketPtr	pkt = nullptr )

protected

Find which port connected to this crossbar (if any) should be given a packet with this address range.

Parameters

addr_range	Address range to find port for.
pkt	Packet that containing the address range.

Returns: id of port that the packet should be sent ou of.

Definition at line 334 of file xbar.cc.

References gem5::AddrRangeMap< V, max_cache_size >::contains(), defaultPortID, defaultRange, DPRINTF, gem5::AddrRangeMap< V, max_cache_size >::end(), gem5::ArmISA::ext, fatal, gem5::Extensible< Target >::getExtension(), gem5::TracingExtension::getTraceInString(), gotAllAddrRanges, gem5::ArmISA::i, gem5::InvalidPortID, gem5::AddrRange::isSubset(), gem5::Named::name(), portMap, gem5::AddrRange::to_string(), and useDefaultRange.

Referenced by findPort(), gem5::CoherentXBar::recvAtomicBackdoor(), gem5::NoncoherentXBar::recvAtomicBackdoor(), gem5::CoherentXBar::recvFunctional(), gem5::NoncoherentXBar::recvFunctional(), gem5::CoherentXBar::recvMemBackdoorReq(), gem5::NoncoherentXBar::recvMemBackdoorReq(), gem5::CoherentXBar::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), and gem5::CoherentXBar::recvTimingSnoopReq().

◆ findPort() [2/2]

PortID gem5::BaseXBar::findPort ( PacketPtr pkt )

inlineprotected

Definition at line 353 of file xbar.hh.

References findPort(), and gem5::Packet::getAddrRange().

◆ getAddrRanges()

AddrRangeList gem5::BaseXBar::getAddrRanges ( ) const

protected

Return the address ranges the crossbar is responsible for.

Returns: a list of non-overlapping address ranges

Definition at line 536 of file xbar.cc.

References DPRINTF, gotAllAddrRanges, and xbarRanges.

Referenced by gem5::CoherentXBar::CoherentXBarResponsePort::getAddrRanges(), gem5::NoncoherentXBar::NoncoherentXBarResponsePort::getAddrRanges(), and recvRangeChange().

◆ getPort()

Port & gem5::BaseXBar::getPort	(	const std::string &	if_name,
		PortID	idx = InvalidPortID )

overridevirtual

A function used to return the port associated with this object.

Reimplemented from gem5::SimObject.

Definition at line 91 of file xbar.cc.

References cpuSidePorts, defaultPortID, gem5::SimObject::getPort(), and memSidePorts.

◆ recvRangeChange()

void gem5::BaseXBar::recvRangeChange ( PortID mem_side_port_id )

protectedvirtual

Function called by the port when the crossbar is recieving a range change.

Function called by the port when the crossbar is receiving a range change.

Parameters

mem_side_port_id id of the port that received the change

Reimplemented in gem5::HMCController.

Definition at line 374 of file xbar.cc.

References gem5::AddrRangeMap< V, max_cache_size >::begin(), cpuSidePorts, defaultPortID, defaultRange, DPRINTF, gem5::AddrRangeMap< V, max_cache_size >::end(), gem5::AddrRangeMap< V, max_cache_size >::erase(), fatal, getAddrRanges(), gotAddrRanges, gotAllAddrRanges, gem5::AddrRangeMap< V, max_cache_size >::insert(), gem5::AddrRangeMap< V, max_cache_size >::intersects(), gem5::AddrRange::isSubset(), memSidePorts, gem5::Named::name(), gem5::MipsISA::p, portMap, gem5::MipsISA::r, gem5::AddrRange::to_string(), useDefaultRange, and xbarRanges.

Referenced by gem5::CoherentXBar::CoherentXBarRequestPort::recvRangeChange(), gem5::HMCController::recvRangeChange(), and gem5::NoncoherentXBar::NoncoherentXBarRequestPort::recvRangeChange().

◆ regStats()

void gem5::BaseXBar::regStats ( )

overridevirtual

Callback to set stat parameters.

This callback is typically used for complex stats (e.g., distributions) that need parameters in addition to a name and a description. Stat names and descriptions should typically be set from the constructor usingo from the constructor using the ADD_STAT macro.

Reimplemented from gem5::statistics::Group.

Reimplemented in gem5::CoherentXBar.

Definition at line 554 of file xbar.cc.

Referenced by gem5::CoherentXBar::regStats().

Member Data Documentation

◆ cpuSidePorts

std::vector<QueuedResponsePort*> gem5::BaseXBar::cpuSidePorts

protected

◆ defaultPortID

PortID gem5::BaseXBar::defaultPortID

protected

Port that handles requests that don't match any of the interfaces.

Definition at line 390 of file xbar.hh.

Referenced by gem5::CoherentXBar::CoherentXBar(), findPort(), getPort(), gem5::NoncoherentXBar::NoncoherentXBar(), and recvRangeChange().

◆ defaultRange

AddrRange gem5::BaseXBar::defaultRange

protected

Definition at line 332 of file xbar.hh.

Referenced by findPort(), and recvRangeChange().

◆ forwardLatency

const Cycles gem5::BaseXBar::forwardLatency

protected

Definition at line 312 of file xbar.hh.

Referenced by gem5::CoherentXBar::recvTimingReq(), gem5::HMCController::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), and gem5::CoherentXBar::recvTimingSnoopReq().

◆ frontendLatency

const Cycles gem5::BaseXBar::frontendLatency

protected

Cycles of front-end pipeline including the delay to accept the request and to decode the address.

Definition at line 311 of file xbar.hh.

Referenced by gem5::CoherentXBar::recvTimingReq(), gem5::HMCController::recvTimingReq(), and gem5::NoncoherentXBar::recvTimingReq().

◆ gotAddrRanges

std::vector<bool> gem5::BaseXBar::gotAddrRanges

protected

Remember for each of the memory-side ports of the crossbar if we got an address range from the connected CPU-side ports.

For convenience, also keep track of if we got ranges from all the CPU-side-port modules or not.

Definition at line 382 of file xbar.hh.

Referenced by recvRangeChange(), and gem5::HMCController::recvRangeChange().

◆ gotAllAddrRanges

bool gem5::BaseXBar::gotAllAddrRanges

protected

Definition at line 383 of file xbar.hh.

Referenced by findPort(), getAddrRanges(), recvRangeChange(), and gem5::HMCController::recvRangeChange().

◆ headerLatency

const Cycles gem5::BaseXBar::headerLatency

protected

Cycles the layer is occupied processing the packet header.

Definition at line 315 of file xbar.hh.

Referenced by gem5::CoherentXBar::recvTimingReq(), gem5::CoherentXBar::recvTimingResp(), and gem5::CoherentXBar::recvTimingSnoopResp().

◆ memSidePorts

std::vector<RequestPort*> gem5::BaseXBar::memSidePorts

protected

Definition at line 387 of file xbar.hh.

◆ pktCount

statistics::Vector2d gem5::BaseXBar::pktCount

protected

Definition at line 410 of file xbar.hh.

Referenced by gem5::CoherentXBar::recvAtomicBackdoor(), gem5::NoncoherentXBar::recvAtomicBackdoor(), gem5::CoherentXBar::recvTimingReq(), gem5::HMCController::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), gem5::CoherentXBar::recvTimingResp(), gem5::NoncoherentXBar::recvTimingResp(), gem5::CoherentXBar::recvTimingSnoopResp(), and regStats().

◆ pktSize

statistics::Vector2d gem5::BaseXBar::pktSize

protected

Definition at line 411 of file xbar.hh.

Referenced by gem5::CoherentXBar::recvAtomicBackdoor(), gem5::NoncoherentXBar::recvAtomicBackdoor(), gem5::CoherentXBar::recvTimingReq(), gem5::HMCController::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), gem5::CoherentXBar::recvTimingResp(), gem5::NoncoherentXBar::recvTimingResp(), gem5::CoherentXBar::recvTimingSnoopResp(), and regStats().

◆ portMap

AddrRangeMap<PortID, 3> gem5::BaseXBar::portMap

protected

Definition at line 319 of file xbar.hh.

Referenced by findPort(), and recvRangeChange().

◆ responseLatency

const Cycles gem5::BaseXBar::responseLatency

protected

Definition at line 313 of file xbar.hh.

Referenced by gem5::CoherentXBar::recvTimingResp(), gem5::NoncoherentXBar::recvTimingResp(), and gem5::CoherentXBar::recvTimingSnoopResp().

◆ routeTo

std::unordered_map<RequestPtr, PortID> gem5::BaseXBar::routeTo

protected

Remember where request packets came from so that we can route responses to the appropriate port.

This relies on the fact that the underlying Request pointer inside the Packet stays constant.

Definition at line 327 of file xbar.hh.

Referenced by gem5::CoherentXBar::recvTimingReq(), gem5::HMCController::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), gem5::CoherentXBar::recvTimingResp(), gem5::NoncoherentXBar::recvTimingResp(), gem5::CoherentXBar::recvTimingSnoopReq(), and gem5::CoherentXBar::recvTimingSnoopResp().

◆ transDist

statistics::Vector gem5::BaseXBar::transDist

protected

Stats for transaction distribution and data passing through the crossbar.

The transaction distribution is globally counting different types of commands. The packet count and total packet size are two-dimensional vectors that are indexed by the CPU-side port and memory-side port id (thus the neighbouring memory-side ports and neighbouring CPU-side ports), summing up both directions (request and response).

Definition at line 409 of file xbar.hh.

Referenced by gem5::CoherentXBar::recvAtomicBackdoor(), gem5::NoncoherentXBar::recvAtomicBackdoor(), gem5::CoherentXBar::recvTimingReq(), gem5::HMCController::recvTimingReq(), gem5::NoncoherentXBar::recvTimingReq(), gem5::CoherentXBar::recvTimingResp(), gem5::NoncoherentXBar::recvTimingResp(), gem5::CoherentXBar::recvTimingSnoopReq(), gem5::CoherentXBar::recvTimingSnoopResp(), and regStats().

◆ useDefaultRange

const bool gem5::BaseXBar::useDefaultRange

protected

If true, use address range provided by default device.

Any address not handled by another port and not in default device's range will cause a fatal error. If false, just send all addresses not handled by another port to default device.

Definition at line 396 of file xbar.hh.

Referenced by findPort(), and recvRangeChange().

◆ width

const uint32_t gem5::BaseXBar::width

protected

the width of the xbar in bytes

Definition at line 317 of file xbar.hh.

◆ xbarRanges

AddrRangeList gem5::BaseXBar::xbarRanges

protected

all contigous ranges seen by this crossbar

Definition at line 330 of file xbar.hh.

Referenced by getAddrRanges(), and recvRangeChange().

The documentation for this class was generated from the following files:

mem/xbar.hh
mem/xbar.cc

Classes

Public Member Functions

Protected Member Functions

Protected Attributes

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

◆ BaseXBar()

◆ ~BaseXBar()

Member Function Documentation

◆ calcPacketTiming()

◆ findPort() [1/2]

◆ findPort() [2/2]

◆ getAddrRanges()

◆ getPort()

◆ recvRangeChange()

◆ regStats()

Member Data Documentation

◆ cpuSidePorts

◆ defaultPortID

◆ defaultRange

◆ forwardLatency

◆ frontendLatency

◆ gotAddrRanges

◆ gotAllAddrRanges

◆ headerLatency

◆ memSidePorts

◆ pktCount

◆ pktSize

◆ portMap

◆ responseLatency

◆ routeTo

◆ transDist

◆ useDefaultRange

◆ width

◆ xbarRanges