gem5
v22.1.0.0
arch
riscv
remote_gdb.hh
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2021 Huawei International
3
* Copyright (c) 2017 The University of Virginia
4
* Copyright 2015 LabWare
5
* Copyright 2014 Google, Inc.
6
* Copyright (c) 2007 The Regents of The University of Michigan
7
* All rights reserved.
8
*
9
* Redistribution and use in source and binary forms, with or without
10
* modification, are permitted provided that the following conditions are
11
* met: redistributions of source code must retain the above copyright
12
* notice, this list of conditions and the following disclaimer;
13
* redistributions in binary form must reproduce the above copyright
14
* notice, this list of conditions and the following disclaimer in the
15
* documentation and/or other materials provided with the distribution;
16
* neither the name of the copyright holders nor the names of its
17
* contributors may be used to endorse or promote products derived from
18
* this software without specific prior written permission.
19
*
20
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31
*/
32
33
#ifndef __ARCH_RISCV_REMOTE_GDB_HH__
34
#define __ARCH_RISCV_REMOTE_GDB_HH__
35
36
#include <string>
37
38
#include "
arch/riscv/regs/float.hh
"
39
#include "
arch/riscv/regs/int.hh
"
40
#include "
base/remote_gdb.hh
"
41
42
namespace
gem5
43
{
44
45
class
System;
46
class
ThreadContext;
47
48
namespace
RiscvISA
49
{
50
51
class
RemoteGDB
:
public
BaseRemoteGDB
52
{
53
protected
:
54
static
const
int
NumGDBRegs
= 4162;
55
static
const
int
NumCSRs
= 4096;
56
57
bool
acc
(
Addr
addr
,
size_t
len
)
override
;
58
// A breakpoint will be 2 bytes if it is compressed and 4 if not
59
bool
checkBpKind
(
size_t
kind)
override
{
return
kind == 2 || kind == 4; }
60
61
class
RiscvGdbRegCache
:
public
BaseGdbRegCache
62
{
63
using
BaseGdbRegCache::BaseGdbRegCache
;
64
private
:
73
struct
74
{
75
uint64_t
gpr
[
int_reg::NumArchRegs
];
76
uint64_t
pc
;
77
uint64_t
fpu
[
float_reg::NumRegs
];
78
uint32_t
fflags
;
79
uint32_t
frm
;
80
uint32_t
fcsr
;
81
// Placeholder for byte alignment
82
uint32_t
placeholder
;
83
uint64_t
cycle
;
84
uint64_t
time
;
85
uint64_t
ustatus
;
86
uint64_t
uie
;
87
uint64_t
utvec
;
88
uint64_t
uscratch
;
89
uint64_t
uepc
;
90
uint64_t
ucause
;
91
uint64_t
utval
;
92
uint64_t
uip
;
93
uint64_t
sstatus
;
94
uint64_t
sedeleg
;
95
uint64_t
sideleg
;
96
uint64_t
sie
;
97
uint64_t
stvec
;
98
uint64_t
scounteren
;
99
uint64_t
sscratch
;
100
uint64_t
sepc
;
101
uint64_t
scause
;
102
uint64_t
stval
;
103
uint64_t
sip
;
104
uint64_t
satp
;
105
uint64_t
mvendorid
;
106
uint64_t
marchid
;
107
uint64_t
mimpid
;
108
uint64_t
mhartid
;
109
uint64_t
mstatus
;
110
uint64_t
misa
;
111
uint64_t
medeleg
;
112
uint64_t
mideleg
;
113
uint64_t
mie
;
114
uint64_t
mtvec
;
115
uint64_t
mcounteren
;
116
uint64_t
mscratch
;
117
uint64_t
mepc
;
118
uint64_t
mcause
;
119
uint64_t
mtval
;
120
uint64_t
mip
;
121
uint64_t
hstatus
;
122
uint64_t
hedeleg
;
123
uint64_t
hideleg
;
124
uint64_t
hie
;
125
uint64_t
htvec
;
126
uint64_t
hscratch
;
127
uint64_t
hepc
;
128
uint64_t
hcause
;
129
uint64_t
hbadaddr
;
130
uint64_t
hip
;
131
}
r
;
132
public
:
133
char
*
data
()
const
{
return
(
char
*)&
r
; }
134
size_t
size
()
const
{
return
sizeof
(
r
); }
135
void
getRegs
(
ThreadContext
*);
136
void
setRegs
(
ThreadContext
*)
const
;
137
138
const
std::string
139
name
()
const
140
{
141
return
gdb
->
name
() +
".RiscvGdbRegCache"
;
142
}
143
};
144
145
RiscvGdbRegCache
regCache
;
146
147
public
:
148
RemoteGDB
(
System
*_system,
int
_port
);
149
BaseGdbRegCache
*
gdbRegs
()
override
;
154
std::vector<std::string>
155
availableFeatures
()
const override
156
{
157
return
{
"qXfer:features:read+"
};
158
};
162
bool
getXferFeaturesRead
(
const
std::string &annex,
163
std::string &
output
)
override
;
164
};
165
166
}
// namespace RiscvISA
167
}
// namespace gem5
168
169
#endif
/* __ARCH_RISCV_REMOTE_GDB_H__ */
remote_gdb.hh
gem5::BaseGdbRegCache
Concrete subclasses of this abstract class represent how the register values are transmitted on the w...
Definition:
remote_gdb.hh:86
gem5::BaseGdbRegCache::gdb
BaseRemoteGDB * gdb
Definition:
remote_gdb.hh:140
gem5::BaseRemoteGDB
Definition:
remote_gdb.hh:49
gem5::BaseRemoteGDB::_port
int _port
Definition:
remote_gdb.hh:235
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache
Definition:
remote_gdb.hh:62
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::scause
uint64_t scause
Definition:
remote_gdb.hh:101
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::sip
uint64_t sip
Definition:
remote_gdb.hh:103
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::mtval
uint64_t mtval
Definition:
remote_gdb.hh:119
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::utval
uint64_t utval
Definition:
remote_gdb.hh:91
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::hcause
uint64_t hcause
Definition:
remote_gdb.hh:128
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::name
const std::string name() const
Return the name to use in places like DPRINTF.
Definition:
remote_gdb.hh:139
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::frm
uint32_t frm
Definition:
remote_gdb.hh:79
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::mie
uint64_t mie
Definition:
remote_gdb.hh:113
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::gpr
uint64_t gpr[int_reg::NumArchRegs]
Definition:
remote_gdb.hh:75
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::utvec
uint64_t utvec
Definition:
remote_gdb.hh:87
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::medeleg
uint64_t medeleg
Definition:
remote_gdb.hh:111
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::ucause
uint64_t ucause
Definition:
remote_gdb.hh:90
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs
void setRegs(ThreadContext *) const
Set the ThreadContext's registers from the values in the raw buffer.
Definition:
remote_gdb.cc:297
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::sstatus
uint64_t sstatus
Definition:
remote_gdb.hh:93
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::mip
uint64_t mip
Definition:
remote_gdb.hh:120
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::misa
uint64_t misa
Definition:
remote_gdb.hh:110
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::r
struct gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::@21 r
RISC-V Register Cache Order and sizes of registers found in ext/gdb-xml/riscv.xml To add support for ...
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::fflags
uint32_t fflags
Definition:
remote_gdb.hh:78
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::uie
uint64_t uie
Definition:
remote_gdb.hh:86
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::mscratch
uint64_t mscratch
Definition:
remote_gdb.hh:116
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::cycle
uint64_t cycle
Definition:
remote_gdb.hh:83
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::size
size_t size() const
Return the size of the raw buffer, in bytes (i.e., half of the number of digits in the g/G packet).
Definition:
remote_gdb.hh:134
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::sepc
uint64_t sepc
Definition:
remote_gdb.hh:100
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::mideleg
uint64_t mideleg
Definition:
remote_gdb.hh:112
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::marchid
uint64_t marchid
Definition:
remote_gdb.hh:106
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::mstatus
uint64_t mstatus
Definition:
remote_gdb.hh:109
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::ustatus
uint64_t ustatus
Definition:
remote_gdb.hh:85
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::sedeleg
uint64_t sedeleg
Definition:
remote_gdb.hh:94
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::scounteren
uint64_t scounteren
Definition:
remote_gdb.hh:98
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::mhartid
uint64_t mhartid
Definition:
remote_gdb.hh:108
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::htvec
uint64_t htvec
Definition:
remote_gdb.hh:125
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::hie
uint64_t hie
Definition:
remote_gdb.hh:124
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::time
uint64_t time
Definition:
remote_gdb.hh:84
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::hideleg
uint64_t hideleg
Definition:
remote_gdb.hh:123
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::mtvec
uint64_t mtvec
Definition:
remote_gdb.hh:114
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::mimpid
uint64_t mimpid
Definition:
remote_gdb.hh:107
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::hstatus
uint64_t hstatus
Definition:
remote_gdb.hh:121
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::stvec
uint64_t stvec
Definition:
remote_gdb.hh:97
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::hbadaddr
uint64_t hbadaddr
Definition:
remote_gdb.hh:129
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::hscratch
uint64_t hscratch
Definition:
remote_gdb.hh:126
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs
void getRegs(ThreadContext *)
Fill the raw buffer from the registers in the ThreadContext.
Definition:
remote_gdb.cc:189
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::placeholder
uint32_t placeholder
Definition:
remote_gdb.hh:82
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::uepc
uint64_t uepc
Definition:
remote_gdb.hh:89
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::mcause
uint64_t mcause
Definition:
remote_gdb.hh:118
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::mepc
uint64_t mepc
Definition:
remote_gdb.hh:117
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::data
char * data() const
Return the pointer to the raw bytes buffer containing the register values.
Definition:
remote_gdb.hh:133
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::hip
uint64_t hip
Definition:
remote_gdb.hh:130
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::uip
uint64_t uip
Definition:
remote_gdb.hh:92
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::fpu
uint64_t fpu[float_reg::NumRegs]
Definition:
remote_gdb.hh:77
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::hedeleg
uint64_t hedeleg
Definition:
remote_gdb.hh:122
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::mcounteren
uint64_t mcounteren
Definition:
remote_gdb.hh:115
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::sscratch
uint64_t sscratch
Definition:
remote_gdb.hh:99
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::satp
uint64_t satp
Definition:
remote_gdb.hh:104
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::uscratch
uint64_t uscratch
Definition:
remote_gdb.hh:88
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::stval
uint64_t stval
Definition:
remote_gdb.hh:102
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::pc
uint64_t pc
Definition:
remote_gdb.hh:76
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::mvendorid
uint64_t mvendorid
Definition:
remote_gdb.hh:105
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::sie
uint64_t sie
Definition:
remote_gdb.hh:96
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::sideleg
uint64_t sideleg
Definition:
remote_gdb.hh:95
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::hepc
uint64_t hepc
Definition:
remote_gdb.hh:127
gem5::RiscvISA::RemoteGDB::RiscvGdbRegCache::fcsr
uint32_t fcsr
Definition:
remote_gdb.hh:80
gem5::RiscvISA::RemoteGDB
Definition:
remote_gdb.hh:52
gem5::RiscvISA::RemoteGDB::NumCSRs
static const int NumCSRs
Definition:
remote_gdb.hh:55
gem5::RiscvISA::RemoteGDB::availableFeatures
std::vector< std::string > availableFeatures() const override
Informs GDB remote serial protocol that XML features are supported GDB then queries for xml blobs usi...
Definition:
remote_gdb.hh:155
gem5::RiscvISA::RemoteGDB::getXferFeaturesRead
bool getXferFeaturesRead(const std::string &annex, std::string &output) override
Reply to qXfer:features:read:xxx.xml qeuries.
gem5::RiscvISA::RemoteGDB::gdbRegs
BaseGdbRegCache * gdbRegs() override
gem5::RiscvISA::RemoteGDB::acc
bool acc(Addr addr, size_t len) override
gem5::RiscvISA::RemoteGDB::NumGDBRegs
static const int NumGDBRegs
Definition:
remote_gdb.hh:54
gem5::RiscvISA::RemoteGDB::checkBpKind
bool checkBpKind(size_t kind) override
Definition:
remote_gdb.hh:59
gem5::RiscvISA::RemoteGDB::RemoteGDB
RemoteGDB(System *_system, int _port)
gem5::RiscvISA::RemoteGDB::regCache
RiscvGdbRegCache regCache
Definition:
remote_gdb.hh:145
gem5::System
Definition:
system.hh:75
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition:
thread_context.hh:89
std::vector< std::string >
gem5::BaseGdbRegCache::BaseGdbRegCache
BaseGdbRegCache(BaseRemoteGDB *g)
Definition:
remote_gdb.hh:134
gem5::BaseRemoteGDB::name
std::string name()
Definition:
remote_gdb.cc:407
len
uint16_t len
Definition:
helpers.cc:62
gem5::RiscvISA::float_reg::NumRegs
@ NumRegs
Definition:
float.hh:152
gem5::RiscvISA::int_reg::NumArchRegs
@ NumArchRegs
Definition:
int.hh:75
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition:
types.hh:84
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition:
gpu_translation_state.hh:38
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition:
types.hh:147
gem5::output
static void output(const char *filename)
Definition:
debug.cc:60
float.hh
int.hh
Generated on Wed Dec 21 2022 10:22:25 for gem5 by
doxygen
1.9.1