gem5 v24.0.0.0
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#include <tarmac_parser.hh>
Classes | |
struct | ParserInstEntry |
struct | ParserMemEntry |
struct | ParserRegEntry |
struct | TarmacParserRecordEvent |
Event triggered to check the value of the destination registers. More... | |
Public Member Functions | |
TarmacParserRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, TarmacParser &_parent, const StaticInstPtr _macroStaticInst=NULL) | |
void | dump () override |
bool | readMemNoEffect (Addr addr, uint8_t *data, unsigned size, unsigned flags) |
Performs a memory access to read the value written by a previous write. | |
Public Member Functions inherited from gem5::trace::TarmacBaseRecord | |
TarmacBaseRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, const StaticInstPtr _macroStaticInst=nullptr) | |
Public Member Functions inherited from gem5::trace::InstRecord | |
InstRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, const StaticInstPtr _macroStaticInst=nullptr) | |
virtual | ~InstRecord () |
void | setWhen (Tick new_when) |
void | setMem (Addr a, Addr s, unsigned f) |
template<typename T , size_t N> | |
void | setData (std::array< T, N > d) |
void | setData (uint64_t d) |
void | setData (uint32_t d) |
void | setData (uint16_t d) |
void | setData (uint8_t d) |
void | setData (int64_t d) |
void | setData (int32_t d) |
void | setData (int16_t d) |
void | setData (int8_t d) |
void | setData (double d) |
void | setData (const RegClass ®_class, RegVal val) |
void | setData (const RegClass ®_class, const void *val) |
void | setFetchSeq (InstSeqNum seq) |
void | setCPSeq (InstSeqNum seq) |
void | setPredicate (bool val) |
void | setFaulting (bool val) |
Tick | getWhen () const |
ThreadContext * | getThread () const |
StaticInstPtr | getStaticInst () const |
const PCStateBase & | getPCState () const |
StaticInstPtr | getMacroStaticInst () const |
Addr | getAddr () const |
Addr | getSize () const |
unsigned | getFlags () const |
bool | getMemValid () const |
uint64_t | getIntData () const |
double | getFloatData () const |
int | getDataStatus () const |
InstSeqNum | getFetchSeq () const |
bool | getFetchSeqValid () const |
InstSeqNum | getCpSeq () const |
bool | getCpSeqValid () const |
bool | getFaulting () const |
Static Public Member Functions | |
static void | printMismatchHeader (const StaticInstPtr inst, const PCStateBase &pc) |
Print a mismatch header containing the instruction fields as reported by gem5. | |
Static Public Member Functions inherited from gem5::trace::TarmacBaseRecord | |
static ISetState | pcToISetState (const PCStateBase &pc) |
Returns the Instruction Set State according to the current PCState. | |
Static Public Attributes | |
static const int | MaxLineLength = 256 |
Protected Attributes | |
TarmacParser & | parent |
Protected Attributes inherited from gem5::trace::InstRecord | |
Tick | when |
ThreadContext * | thread |
StaticInstPtr | staticInst |
std::unique_ptr< PCStateBase > | pc |
StaticInstPtr | macroStaticInst |
Addr | addr = 0 |
The address that was accessed. | |
Addr | size = 0 |
The size of the memory request. | |
unsigned | flags = 0 |
The flags that were assigned to the request. | |
union gem5::trace::InstRecord::Data | data |
InstSeqNum | fetch_seq = 0 |
InstSeqNum | cp_seq = 0 |
enum gem5::trace::InstRecord::DataStatus | dataStatus = DataInvalid |
bool | mem_valid = false |
Are the memory fields in the record valid? | |
bool | fetch_seq_valid = false |
Are the fetch sequence number fields valid? | |
bool | cp_seq_valid = false |
Are the commit sequence number fields valid? | |
bool | predicate = true |
is the predicate for execution this inst true or false (not execed)? | |
bool | faulting = false |
Did the execution of this instruction fault? (requires ExecFaulting to be enabled) | |
Private Types | |
using | MiscRegMap = std::unordered_map<std::string, RegIndex> |
Map from misc. | |
Private Member Functions | |
bool | advanceTrace () |
Advances the TARMAC trace up to the next instruction, register, or memory access record. | |
const char * | iSetStateToStr (ISetState isetstate) const |
Returns the string representation of an instruction set state. | |
Private Attributes | |
bool | parsingStarted |
True if a TARMAC instruction record has already been parsed for this instruction. | |
bool | mismatch |
True if a mismatch has been detected for this instruction. | |
bool | mismatchOnPcOrOpcode |
True if a mismatch has been detected for this instruction on PC or opcode. | |
RequestPtr | memReq |
Request for memory write checks. | |
Static Private Attributes | |
static ParserInstEntry | instRecord |
Buffer for instruction trace records. | |
static ParserRegEntry | regRecord |
Buffer for register trace records. | |
static ParserMemEntry | memRecord |
Buffer for memory access trace records (stores only). | |
static TarmacRecordType | currRecordType |
Type of last parsed record. | |
static char | buf [MaxLineLength] |
Buffer used for trace file parsing. | |
static std::list< ParserRegEntry > | destRegRecords |
List of records of destination registers. | |
static MiscRegMap | miscRegMap |
static int8_t | maxVectorLength = 0 |
Max. | |
Additional Inherited Members | |
Public Types inherited from gem5::trace::TarmacBaseRecord | |
enum | TarmacRecordType { TARMAC_INST , TARMAC_REG , TARMAC_MEM , TARMAC_UNSUPPORTED } |
TARMAC trace record type. More... | |
enum | ISetState { ISET_ARM , ISET_THUMB , ISET_A64 , ISET_UNSUPPORTED } |
ARM instruction set state. More... | |
enum | RegType { REG_R , REG_X , REG_S , REG_D , REG_P , REG_Q , REG_Z , REG_MISC } |
ARM register type. More... | |
Protected Types inherited from gem5::trace::InstRecord | |
enum | DataStatus { DataInvalid = 0 , DataInt8 = 1 , DataInt16 = 2 , DataInt32 = 4 , DataInt64 = 8 , DataDouble = 3 , DataReg = 5 } |
What size of data was written? More... | |
Definition at line 67 of file tarmac_parser.hh.
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gem5::trace::TarmacParserRecord::TarmacParserRecord | ( | Tick | _when, |
ThreadContext * | _thread, | ||
const StaticInstPtr | _staticInst, | ||
const PCStateBase & | _pc, | ||
TarmacParser & | _parent, | ||
const StaticInstPtr | _macroStaticInst = NULL ) |
Definition at line 947 of file tarmac_parser.cc.
References gem5::ArmISA::ArmStaticInst::getCurSveVecLen(), maxVectorLength, and memReq.
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Advances the TARMAC trace up to the next instruction, register, or memory access record.
The collected data is stored in one of {inst/reg/mem}_record.
Definition at line 1071 of file tarmac_parser.cc.
References gem5::ArmISA::int_reg::abt(), gem5::trace::TarmacBaseRecord::InstEntry::addr, gem5::trace::TarmacBaseRecord::MemEntry::addr, buf, gem5::ArmISA::c, gem5::trace::TarmacParser::cpuId, currRecordType, gem5::trace::InstRecord::data, gem5::trace::TarmacBaseRecord::MemEntry::data, gem5::ArmISA::int_reg::fiq(), gem5::ArmISA::int_reg::hyp(), gem5::ArmISA::i, gem5::trace::TarmacBaseRecord::RegEntry::index, instRecord, gem5::ArmISA::int_reg::irq(), gem5::trace::TarmacBaseRecord::ISET_A64, gem5::trace::TarmacBaseRecord::ISET_ARM, gem5::trace::TarmacBaseRecord::ISET_THUMB, gem5::trace::TarmacBaseRecord::ISET_UNSUPPORTED, gem5::trace::TarmacBaseRecord::InstEntry::isetstate, gem5::ArmISA::lo, MaxLineLength, maxVectorLength, memRecord, gem5::trace::TarmacParser::memWrCheck, miscRegMap, gem5::ArmISA::int_reg::mon(), gem5::trace::TarmacBaseRecord::InstEntry::opcode, parent, parsingStarted, gem5::trace::TarmacBaseRecord::REG_D, gem5::trace::TarmacBaseRecord::REG_MISC, gem5::trace::TarmacBaseRecord::REG_P, gem5::trace::TarmacBaseRecord::REG_Q, gem5::trace::TarmacBaseRecord::REG_R, gem5::trace::TarmacBaseRecord::REG_S, gem5::trace::TarmacBaseRecord::REG_X, gem5::trace::TarmacBaseRecord::REG_Z, regRecord, gem5::trace::TarmacParserRecord::ParserRegEntry::repr, gem5::trace::TarmacParserRecord::ParserInstEntry::seq_num, gem5::trace::TarmacBaseRecord::MemEntry::size, gem5::ArmISA::int_reg::Sp0, gem5::ArmISA::int_reg::svc(), gem5::trace::TarmacBaseRecord::InstEntry::taken, gem5::trace::TarmacBaseRecord::TARMAC_INST, gem5::trace::TarmacBaseRecord::TARMAC_MEM, gem5::trace::TarmacBaseRecord::TARMAC_REG, gem5::trace::TarmacBaseRecord::TARMAC_UNSUPPORTED, gem5::trace::TarmacParser::trace, gem5::trace::TarmacBaseRecord::RegEntry::type, gem5::ArmISA::int_reg::und(), gem5::ArmISA::int_reg::usr(), gem5::ArmISA::v, gem5::trace::TarmacBaseRecord::RegEntry::values, and warn.
Referenced by dump().
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overridevirtual |
Implements gem5::trace::TarmacBaseRecord.
Definition at line 964 of file tarmac_parser.cc.
References gem5::trace::TarmacBaseRecord::InstEntry::addr, gem5::trace::TarmacBaseRecord::MemEntry::addr, advanceTrace(), gem5::ArmISA::MMU::AllowUnaligned, currRecordType, gem5::curTick(), gem5::trace::TarmacBaseRecord::MemEntry::data, destRegRecords, gem5::MipsISA::event, gem5::trace::TarmacParser::exitOnDiff, gem5::trace::TarmacParser::exitOnInsnDiff, gem5::exitSimLoop(), gem5::RefCountingPtr< T >::get(), instRecord, gem5::trace::TarmacBaseRecord::ISET_UNSUPPORTED, gem5::trace::TarmacBaseRecord::InstEntry::isetstate, iSetStateToStr(), gem5::StaticInst::isLastMicroop(), gem5::StaticInst::isMicroop(), gem5::trace::TarmacParser::macroopInProgress, gem5::mainEventQueue, memRecord, mismatch, mismatchOnPcOrOpcode, gem5::trace::TarmacBaseRecord::InstEntry::opcode, gem5::trace::output(), panic, parent, parsingStarted, gem5::trace::InstRecord::pc, gem5::trace::TarmacBaseRecord::pcToISetState(), printMismatchHeader(), readMemNoEffect(), regRecord, gem5::trace::TarmacBaseRecord::MemEntry::size, gem5::trace::InstRecord::staticInst, gem5::trace::TarmacBaseRecord::TARMAC_INST, gem5::trace::TarmacBaseRecord::TARMAC_MEM, gem5::trace::TarmacBaseRecord::TARMAC_REG, gem5::trace::TarmacBaseRecord::TARMAC_UNSUPPORTED, and gem5::trace::InstRecord::thread.
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Returns the string representation of an instruction set state.
Definition at line 1346 of file tarmac_parser.cc.
References gem5::trace::TarmacBaseRecord::ISET_A64, gem5::trace::TarmacBaseRecord::ISET_ARM, and gem5::trace::TarmacBaseRecord::ISET_THUMB.
Referenced by dump().
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Print a mismatch header containing the instruction fields as reported by gem5.
Definition at line 934 of file tarmac_parser.cc.
References gem5::curTick(), gem5::StaticInst::disassemble(), gem5::StaticInst::getEMI(), instRecord, gem5::trace::output(), gem5::trace::InstRecord::pc, gem5::trace::TarmacParserRecord::ParserInstEntry::seq_num, and gem5::trace::InstRecord::staticInst.
Referenced by dump(), and gem5::trace::TarmacParserRecord::TarmacParserRecordEvent::process().
bool gem5::trace::TarmacParserRecord::readMemNoEffect | ( | Addr | addr, |
uint8_t * | data, | ||
unsigned | size, | ||
unsigned | flags ) |
Performs a memory access to read the value written by a previous write.
Definition at line 1274 of file tarmac_parser.cc.
References gem5::trace::InstRecord::addr, gem5::AddrRange::contains(), gem5::trace::InstRecord::data, gem5::trace::InstRecord::flags, gem5::FullSystem, gem5::Request::funcRequestorId, gem5::ThreadContext::getMMUPtr(), gem5::trace::TarmacParser::ignoredAddrRange, gem5::PCStateBase::instAddr(), memReq, gem5::Request::NO_ACCESS, gem5::NoFault, parent, gem5::ThreadContext::pcState(), gem5::BaseMMU::Read, gem5::PortProxy::readBlob(), gem5::trace::InstRecord::size, gem5::trace::InstRecord::thread, and gem5::ArmISA::MMU::translateAtomic().
Referenced by dump().
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Buffer used for trace file parsing.
Definition at line 177 of file tarmac_parser.hh.
Referenced by advanceTrace().
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Type of last parsed record.
Definition at line 174 of file tarmac_parser.hh.
Referenced by advanceTrace(), and dump().
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List of records of destination registers.
Definition at line 180 of file tarmac_parser.hh.
Referenced by dump(), and gem5::trace::TarmacParserRecord::TarmacParserRecordEvent::process().
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Buffer for instruction trace records.
Definition at line 165 of file tarmac_parser.hh.
Referenced by advanceTrace(), dump(), printMismatchHeader(), and gem5::trace::TarmacParserRecord::TarmacParserRecordEvent::process().
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Definition at line 127 of file tarmac_parser.hh.
Referenced by advanceTrace(), and gem5::trace::TarmacParser::advanceTraceToStartPc().
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Max.
vector length (SVE).
Definition at line 205 of file tarmac_parser.hh.
Referenced by advanceTrace(), gem5::trace::TarmacParserRecord::TarmacParserRecordEvent::process(), and TarmacParserRecord().
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Buffer for memory access trace records (stores only).
Definition at line 171 of file tarmac_parser.hh.
Referenced by advanceTrace(), and dump().
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Request for memory write checks.
Definition at line 202 of file tarmac_parser.hh.
Referenced by readMemNoEffect(), and TarmacParserRecord().
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Definition at line 184 of file tarmac_parser.hh.
Referenced by advanceTrace().
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True if a mismatch has been detected for this instruction.
Definition at line 193 of file tarmac_parser.hh.
Referenced by dump().
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True if a mismatch has been detected for this instruction on PC or opcode.
Definition at line 199 of file tarmac_parser.hh.
Referenced by dump().
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Definition at line 208 of file tarmac_parser.hh.
Referenced by advanceTrace(), dump(), and readMemNoEffect().
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True if a TARMAC instruction record has already been parsed for this instruction.
Definition at line 190 of file tarmac_parser.hh.
Referenced by advanceTrace(), and dump().
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Buffer for register trace records.
Definition at line 168 of file tarmac_parser.hh.
Referenced by advanceTrace(), and dump().