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28 #ifndef __ARCH_ARM_FASTMODEL_CORTEXR52_THREAD_CONTEXT_HH__
29 #define __ARCH_ARM_FASTMODEL_CORTEXR52_THREAD_CONTEXT_HH__
53 iris::IrisConnectionInterface *iris_if,
54 const std::string &iris_path);
82 "No mapping for index %#x.", idx);
90 "No mapping for index %#x.", idx);
98 panic(
"%s not implemented.", __FUNCTION__);
104 panic(
"%s not implemented.", __FUNCTION__);
113 panic(
"%s not implemented.", __FUNCTION__);
120 #endif // __ARCH_ARM_FASTMODEL_CORTEXR52_THREAD_CONTEXT_HH__
static IdxNameMap intReg32IdxNameMap
std::map< int, std::string > IdxNameMap
RegVal readIntReg(RegIndex reg_idx) const override
void sendFunctional(PacketPtr pkt) override
bool translateAddress(Addr &paddr, Addr vaddr) override
static IdxNameMap ccRegIdxNameMap
CortexR52TC(gem5::BaseCPU *cpu, int id, System *system, gem5::BaseMMU *mmu, gem5::BaseISA *isa, iris::IrisConnectionInterface *iris_if, const std::string &iris_path)
static IdxNameMap miscRegIdxNameMap
const ArmISA::VecRegContainer & readVecReg(const RegId &) const override
Vector Register Abstraction This generic class is the model in a particularization of MVC,...
static std::vector< iris::MemorySpaceId > bpSpaceIds
RegVal readIntRegFlat(RegIndex idx) const override
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
void setMiscRegNoEffect(RegIndex misc_reg, const RegVal val) override
RegVal readCCRegFlat(RegIndex idx) const override
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
GEM5_DEPRECATED_NAMESPACE(GuestABI, guest_abi)
const std::vector< iris::MemorySpaceId > & getBpSpaceIds() const override
RegVal readMiscRegNoEffect(RegIndex misc_reg) const override
void setIntReg(RegIndex reg_idx, RegVal val) override
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
void initFromIrisInstance(const ResourceMap &resources) override
void setIntRegFlat(RegIndex idx, RegVal val) override
std::map< std::string, iris::ResourceInfo > ResourceMap
void setMiscRegNoEffect(RegIndex idx, const RegVal val) override
RegVal readMiscRegNoEffect(RegIndex idx) const override
void setCCRegFlat(RegIndex idx, RegVal val) override
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Register ID: describe an architectural register with its class and index.
#define panic(...)
This implements a cprintf based panic() function.
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