gem5  v21.1.0.2
Public Member Functions | Static Public Attributes | Protected Types | Protected Member Functions | Protected Attributes | Static Protected Attributes | Friends | List of all members
gem5::Gicv3Distributor Class Reference

#include <gic_v3_distributor.hh>

Inheritance diagram for gem5::Gicv3Distributor:
gem5::Serializable

Public Member Functions

 Gicv3Distributor (Gicv3 *gic, uint32_t it_lines)
 
void sendInt (uint32_t int_id)
 
void clearInt (uint32_t int_id)
 
void deassertSPI (uint32_t int_id)
 
void clearIrqCpuInterface (uint32_t int_id)
 
void init ()
 
uint64_t read (Addr addr, size_t size, bool is_secure_access)
 
void write (Addr addr, uint64_t data, size_t size, bool is_secure_access)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 

Static Public Attributes

static const uint32_t ADDR_RANGE_SIZE = 0x10000
 
static const uint32_t IDBITS = 0xf
 

Protected Types

enum  {
  GICD_CTLR = 0x0000, GICD_TYPER = 0x0004, GICD_IIDR = 0x0008, GICD_TYPER2 = 0x000C,
  GICD_STATUSR = 0x0010, GICD_SETSPI_NSR = 0x0040, GICD_CLRSPI_NSR = 0x0048, GICD_SETSPI_SR = 0x0050,
  GICD_CLRSPI_SR = 0x0058, GICD_SGIR = 0x0f00, GICD_PIDR0 = 0xffe0, GICD_PIDR1 = 0xffe4,
  GICD_PIDR2 = 0xffe8, GICD_PIDR3 = 0xffec, GICD_PIDR4 = 0xffd0, GICD_PIDR5 = 0xffd4,
  GICD_PIDR6 = 0xffd8, GICD_PIDR7 = 0xffdc
}
 

Protected Member Functions

 BitUnion64 (IROUTER) Bitfield< 63
 
 EndBitUnion (IROUTER) static const uint32_t GICD_CTLR_ENABLEGRP0
 
void activateIRQ (uint32_t int_id)
 
void deactivateIRQ (uint32_t int_id)
 
void fullUpdate ()
 
Gicv3::GroupId getIntGroup (int int_id) const
 
bool groupEnabled (Gicv3::GroupId group) const
 
Gicv3::IntStatus intStatus (uint32_t int_id) const
 
bool isNotSPI (uint32_t int_id) const
 
bool isLevelSensitive (uint32_t int_id) const
 
bool treatAsEdgeTriggered (uint32_t int_id) const
 This helper is used to check if an interrupt should be treated as edge triggered in the following scenarios: More...
 
bool nsAccessToSecInt (uint32_t int_id, bool is_secure_access) const
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
void update ()
 
Gicv3CPUInterfaceroute (uint32_t int_id)
 

Protected Attributes

Gicv3gic
 
const uint32_t itLines
 
 res0_1
 
Bitfield< 39, 32 > Aff3
 
Bitfield< 31 > IRM
 
Bitfield< 30, 24 > res0_2
 
Bitfield< 23, 16 > Aff2
 
Bitfield< 15, 8 > Aff1
 
Bitfield< 7, 0 > Aff0
 
bool ARE
 
bool DS
 
bool EnableGrp1S
 
bool EnableGrp1NS
 
bool EnableGrp0
 
std::vector< uint8_t > irqGroup
 
std::vector< bool > irqEnabled
 
std::vector< bool > irqPending
 
std::vector< bool > irqPendingIspendr
 
std::vector< bool > irqActive
 
std::vector< uint8_t > irqPriority
 
std::vector< Gicv3::IntTriggerTypeirqConfig
 
std::vector< uint8_t > irqGrpmod
 
std::vector< uint8_t > irqNsacr
 
std::vector< IROUTER > irqAffinityRouting
 
uint32_t gicdTyper
 
uint32_t gicdPidr0
 
uint32_t gicdPidr1
 
uint32_t gicdPidr2
 
uint32_t gicdPidr3
 
uint32_t gicdPidr4
 

Static Protected Attributes

static const AddrRange GICD_IGROUPR
 
static const AddrRange GICD_ISENABLER
 
static const AddrRange GICD_ICENABLER
 
static const AddrRange GICD_ISPENDR
 
static const AddrRange GICD_ICPENDR
 
static const AddrRange GICD_ISACTIVER
 
static const AddrRange GICD_ICACTIVER
 
static const AddrRange GICD_IPRIORITYR
 
static const AddrRange GICD_ITARGETSR
 
static const AddrRange GICD_ICFGR
 
static const AddrRange GICD_IGRPMODR
 
static const AddrRange GICD_NSACR
 
static const AddrRange GICD_CPENDSGIR
 
static const AddrRange GICD_SPENDSGIR
 
static const AddrRange GICD_IROUTER
 
static const uint32_t GICD_CTLR_ENABLEGRP1 = 1 << 0
 
static const uint32_t GICD_CTLR_ENABLEGRP1NS = 1 << 1
 
static const uint32_t GICD_CTLR_ENABLEGRP1A = 1 << 1
 
static const uint32_t GICD_CTLR_ENABLEGRP1S = 1 << 2
 
static const uint32_t GICD_CTLR_DS = 1 << 6
 

Friends

class Gicv3Redistributor
 
class Gicv3CPUInterface
 
class Gicv3Its
 

Additional Inherited Members

- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section. More...
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it. More...
 

Detailed Description

Definition at line 51 of file gic_v3_distributor.hh.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum
protected
Enumerator
GICD_CTLR 
GICD_TYPER 
GICD_IIDR 
GICD_TYPER2 
GICD_STATUSR 
GICD_SETSPI_NSR 
GICD_CLRSPI_NSR 
GICD_SETSPI_SR 
GICD_CLRSPI_SR 
GICD_SGIR 
GICD_PIDR0 
GICD_PIDR1 
GICD_PIDR2 
GICD_PIDR3 
GICD_PIDR4 
GICD_PIDR5 
GICD_PIDR6 
GICD_PIDR7 

Definition at line 64 of file gic_v3_distributor.hh.

Constructor & Destructor Documentation

◆ Gicv3Distributor()

gem5::Gicv3Distributor::Gicv3Distributor ( Gicv3 gic,
uint32_t  it_lines 
)

Member Function Documentation

◆ activateIRQ()

void gem5::Gicv3Distributor::activateIRQ ( uint32_t  int_id)
protected

Definition at line 1166 of file gic_v3_distributor.cc.

References irqActive, irqPending, and treatAsEdgeTriggered().

◆ BitUnion64()

gem5::Gicv3Distributor::BitUnion64 ( IROUTER  )
protected

◆ clearInt()

void gem5::Gicv3Distributor::clearInt ( uint32_t  int_id)

Definition at line 1019 of file gic_v3_distributor.cc.

References deassertSPI(), and isLevelSensitive().

Referenced by gem5::Gicv3::clearInt().

◆ clearIrqCpuInterface()

void gem5::Gicv3Distributor::clearIrqCpuInterface ( uint32_t  int_id)

Definition at line 1077 of file gic_v3_distributor.cc.

References route().

Referenced by deassertSPI(), and write().

◆ deactivateIRQ()

void gem5::Gicv3Distributor::deactivateIRQ ( uint32_t  int_id)
protected

Definition at line 1175 of file gic_v3_distributor.cc.

References irqActive.

Referenced by gem5::Gicv3CPUInterface::deactivateIRQ().

◆ deassertSPI()

void gem5::Gicv3Distributor::deassertSPI ( uint32_t  int_id)

◆ EndBitUnion()

gem5::Gicv3Distributor::EndBitUnion ( IROUTER  ) const
protected

◆ fullUpdate()

void gem5::Gicv3Distributor::fullUpdate ( )
protected

◆ getIntGroup()

Gicv3::GroupId gem5::Gicv3Distributor::getIntGroup ( int  int_id) const
protected

◆ groupEnabled()

bool gem5::Gicv3Distributor::groupEnabled ( Gicv3::GroupId  group) const
inlineprotected

◆ init()

void gem5::Gicv3Distributor::init ( )

Definition at line 136 of file gic_v3_distributor.cc.

Referenced by gem5::Gicv3::init().

◆ intStatus()

Gicv3::IntStatus gem5::Gicv3Distributor::intStatus ( uint32_t  int_id) const
protected

◆ isLevelSensitive()

bool gem5::Gicv3Distributor::isLevelSensitive ( uint32_t  int_id) const
inlineprotected

Definition at line 232 of file gic_v3_distributor.hh.

References gem5::Gicv3::INT_LEVEL_SENSITIVE, and irqConfig.

Referenced by clearInt(), and treatAsEdgeTriggered().

◆ isNotSPI()

bool gem5::Gicv3Distributor::isNotSPI ( uint32_t  int_id) const
inlineprotected

Definition at line 223 of file gic_v3_distributor.hh.

References itLines, gem5::Gicv3::PPI_MAX, and gem5::Gicv3::SGI_MAX.

Referenced by read(), and write().

◆ nsAccessToSecInt()

bool gem5::Gicv3Distributor::nsAccessToSecInt ( uint32_t  int_id,
bool  is_secure_access 
) const
inlineprotected

Definition at line 253 of file gic_v3_distributor.hh.

References DS, gem5::Gicv3::G1NS, and getIntGroup().

Referenced by read(), and write().

◆ read()

uint64_t gem5::Gicv3Distributor::read ( Addr  addr,
size_t  size,
bool  is_secure_access 
)

◆ route()

Gicv3CPUInterface * gem5::Gicv3Distributor::route ( uint32_t  int_id)
protected

◆ sendInt()

void gem5::Gicv3Distributor::sendInt ( uint32_t  int_id)

◆ serialize()

void gem5::Gicv3Distributor::serialize ( CheckpointOut cp) const
overrideprotectedvirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters
cpCheckpoint state

Implements gem5::Serializable.

Definition at line 1181 of file gic_v3_distributor.cc.

References ARE, DS, EnableGrp0, EnableGrp1NS, EnableGrp1S, irqActive, irqAffinityRouting, irqConfig, irqEnabled, irqGroup, irqGrpmod, irqNsacr, irqPending, irqPendingIspendr, irqPriority, SERIALIZE_CONTAINER, and SERIALIZE_SCALAR.

◆ treatAsEdgeTriggered()

bool gem5::Gicv3Distributor::treatAsEdgeTriggered ( uint32_t  int_id) const
inlineprotected

This helper is used to check if an interrupt should be treated as edge triggered in the following scenarios:

a) While activating the interrupt b) While clearing an interrupt via ICPENDR

In fact, in these two situations, a level sensitive interrupt which had been made pending via a write to ISPENDR, will be treated as it if was edge triggered.

Definition at line 248 of file gic_v3_distributor.hh.

References irqPendingIspendr, and isLevelSensitive().

Referenced by activateIRQ(), and write().

◆ unserialize()

void gem5::Gicv3Distributor::unserialize ( CheckpointIn cp)
overrideprotectedvirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters
cpCheckpoint state

Implements gem5::Serializable.

Definition at line 1201 of file gic_v3_distributor.cc.

References ARE, DS, EnableGrp0, EnableGrp1NS, EnableGrp1S, irqActive, irqAffinityRouting, irqConfig, irqEnabled, irqGroup, irqGrpmod, irqNsacr, irqPending, irqPendingIspendr, irqPriority, UNSERIALIZE_CONTAINER, and UNSERIALIZE_SCALAR.

◆ update()

void gem5::Gicv3Distributor::update ( )
protected

◆ write()

void gem5::Gicv3Distributor::write ( Addr  addr,
uint64_t  data,
size_t  size,
bool  is_secure_access 
)

Friends And Related Function Documentation

◆ Gicv3CPUInterface

friend class Gicv3CPUInterface
friend

Definition at line 56 of file gic_v3_distributor.hh.

◆ Gicv3Its

friend class Gicv3Its
friend

Definition at line 57 of file gic_v3_distributor.hh.

◆ Gicv3Redistributor

friend class Gicv3Redistributor
friend

Definition at line 55 of file gic_v3_distributor.hh.

Member Data Documentation

◆ ADDR_RANGE_SIZE

const uint32_t gem5::Gicv3Distributor::ADDR_RANGE_SIZE = 0x10000
static

Definition at line 177 of file gic_v3_distributor.hh.

Referenced by gem5::Gicv3::init().

◆ Aff0

Bitfield<7, 0> gem5::Gicv3Distributor::Aff0
protected

Definition at line 142 of file gic_v3_distributor.hh.

◆ Aff1

Bitfield<15, 8> gem5::Gicv3Distributor::Aff1
protected

Definition at line 141 of file gic_v3_distributor.hh.

◆ Aff2

Bitfield<23, 16> gem5::Gicv3Distributor::Aff2
protected

Definition at line 140 of file gic_v3_distributor.hh.

◆ Aff3

Bitfield<39, 32> gem5::Gicv3Distributor::Aff3
protected

Definition at line 137 of file gic_v3_distributor.hh.

◆ ARE

bool gem5::Gicv3Distributor::ARE
protected

Definition at line 152 of file gic_v3_distributor.hh.

Referenced by read(), serialize(), and unserialize().

◆ DS

bool gem5::Gicv3Distributor::DS
protected

◆ EnableGrp0

bool gem5::Gicv3Distributor::EnableGrp0
protected

◆ EnableGrp1NS

bool gem5::Gicv3Distributor::EnableGrp1NS
protected

◆ EnableGrp1S

bool gem5::Gicv3Distributor::EnableGrp1S
protected

◆ gic

Gicv3* gem5::Gicv3Distributor::gic
protected

Definition at line 61 of file gic_v3_distributor.hh.

Referenced by Gicv3Distributor(), route(), and update().

◆ GICD_CPENDSGIR

const AddrRange gem5::Gicv3Distributor::GICD_CPENDSGIR
staticprotected

Definition at line 129 of file gic_v3_distributor.hh.

Referenced by read().

◆ GICD_CTLR_DS

const uint32_t gem5::Gicv3Distributor::GICD_CTLR_DS = 1 << 6
staticprotected

Definition at line 150 of file gic_v3_distributor.hh.

Referenced by write().

◆ GICD_CTLR_ENABLEGRP1

const uint32_t gem5::Gicv3Distributor::GICD_CTLR_ENABLEGRP1 = 1 << 0
staticprotected

Definition at line 146 of file gic_v3_distributor.hh.

◆ GICD_CTLR_ENABLEGRP1A

const uint32_t gem5::Gicv3Distributor::GICD_CTLR_ENABLEGRP1A = 1 << 1
staticprotected

Definition at line 148 of file gic_v3_distributor.hh.

Referenced by write().

◆ GICD_CTLR_ENABLEGRP1NS

const uint32_t gem5::Gicv3Distributor::GICD_CTLR_ENABLEGRP1NS = 1 << 1
staticprotected

Definition at line 147 of file gic_v3_distributor.hh.

Referenced by write().

◆ GICD_CTLR_ENABLEGRP1S

const uint32_t gem5::Gicv3Distributor::GICD_CTLR_ENABLEGRP1S = 1 << 2
staticprotected

Definition at line 149 of file gic_v3_distributor.hh.

Referenced by write().

◆ GICD_ICACTIVER

const AddrRange gem5::Gicv3Distributor::GICD_ICACTIVER
staticprotected

Definition at line 117 of file gic_v3_distributor.hh.

Referenced by read(), and write().

◆ GICD_ICENABLER

const AddrRange gem5::Gicv3Distributor::GICD_ICENABLER
staticprotected

Definition at line 109 of file gic_v3_distributor.hh.

Referenced by read(), and write().

◆ GICD_ICFGR

const AddrRange gem5::Gicv3Distributor::GICD_ICFGR
staticprotected

Definition at line 123 of file gic_v3_distributor.hh.

Referenced by read(), and write().

◆ GICD_ICPENDR

const AddrRange gem5::Gicv3Distributor::GICD_ICPENDR
staticprotected

Definition at line 113 of file gic_v3_distributor.hh.

Referenced by read(), and write().

◆ GICD_IGROUPR

const AddrRange gem5::Gicv3Distributor::GICD_IGROUPR
staticprotected

Definition at line 105 of file gic_v3_distributor.hh.

Referenced by read(), and write().

◆ GICD_IGRPMODR

const AddrRange gem5::Gicv3Distributor::GICD_IGRPMODR
staticprotected

Definition at line 125 of file gic_v3_distributor.hh.

Referenced by read(), and write().

◆ GICD_IPRIORITYR

const AddrRange gem5::Gicv3Distributor::GICD_IPRIORITYR
staticprotected

Definition at line 119 of file gic_v3_distributor.hh.

Referenced by read(), and write().

◆ GICD_IROUTER

const AddrRange gem5::Gicv3Distributor::GICD_IROUTER
staticprotected

Definition at line 133 of file gic_v3_distributor.hh.

Referenced by read(), and write().

◆ GICD_ISACTIVER

const AddrRange gem5::Gicv3Distributor::GICD_ISACTIVER
staticprotected

Definition at line 115 of file gic_v3_distributor.hh.

Referenced by read(), and write().

◆ GICD_ISENABLER

const AddrRange gem5::Gicv3Distributor::GICD_ISENABLER
staticprotected

Definition at line 107 of file gic_v3_distributor.hh.

Referenced by read(), and write().

◆ GICD_ISPENDR

const AddrRange gem5::Gicv3Distributor::GICD_ISPENDR
staticprotected

Definition at line 111 of file gic_v3_distributor.hh.

Referenced by read(), and write().

◆ GICD_ITARGETSR

const AddrRange gem5::Gicv3Distributor::GICD_ITARGETSR
staticprotected

Definition at line 121 of file gic_v3_distributor.hh.

Referenced by read(), and write().

◆ GICD_NSACR

const AddrRange gem5::Gicv3Distributor::GICD_NSACR
staticprotected

Definition at line 127 of file gic_v3_distributor.hh.

Referenced by read(), and write().

◆ GICD_SPENDSGIR

const AddrRange gem5::Gicv3Distributor::GICD_SPENDSGIR
staticprotected

Definition at line 131 of file gic_v3_distributor.hh.

Referenced by read().

◆ gicdPidr0

uint32_t gem5::Gicv3Distributor::gicdPidr0
protected

Definition at line 169 of file gic_v3_distributor.hh.

Referenced by read().

◆ gicdPidr1

uint32_t gem5::Gicv3Distributor::gicdPidr1
protected

Definition at line 170 of file gic_v3_distributor.hh.

Referenced by read().

◆ gicdPidr2

uint32_t gem5::Gicv3Distributor::gicdPidr2
protected

Definition at line 171 of file gic_v3_distributor.hh.

Referenced by gem5::Gicv3Its::read(), and read().

◆ gicdPidr3

uint32_t gem5::Gicv3Distributor::gicdPidr3
protected

Definition at line 172 of file gic_v3_distributor.hh.

Referenced by read().

◆ gicdPidr4

uint32_t gem5::Gicv3Distributor::gicdPidr4
protected

Definition at line 173 of file gic_v3_distributor.hh.

Referenced by read().

◆ gicdTyper

uint32_t gem5::Gicv3Distributor::gicdTyper
protected

Definition at line 168 of file gic_v3_distributor.hh.

Referenced by Gicv3Distributor(), and read().

◆ IDBITS

const uint32_t gem5::Gicv3Distributor::IDBITS = 0xf
static

Definition at line 178 of file gic_v3_distributor.hh.

Referenced by Gicv3Distributor(), and gem5::Gicv3Its::lpiOutOfRange().

◆ IRM

Bitfield<31> gem5::Gicv3Distributor::IRM
protected

Definition at line 138 of file gic_v3_distributor.hh.

◆ irqActive

std::vector<bool> gem5::Gicv3Distributor::irqActive
protected

◆ irqAffinityRouting

std::vector<IROUTER> gem5::Gicv3Distributor::irqAffinityRouting
protected

Definition at line 166 of file gic_v3_distributor.hh.

Referenced by read(), route(), serialize(), unserialize(), and write().

◆ irqConfig

std::vector<Gicv3::IntTriggerType> gem5::Gicv3Distributor::irqConfig
protected

Definition at line 163 of file gic_v3_distributor.hh.

Referenced by isLevelSensitive(), read(), serialize(), unserialize(), and write().

◆ irqEnabled

std::vector<bool> gem5::Gicv3Distributor::irqEnabled
protected

Definition at line 158 of file gic_v3_distributor.hh.

Referenced by read(), serialize(), unserialize(), update(), and write().

◆ irqGroup

std::vector<uint8_t> gem5::Gicv3Distributor::irqGroup
protected

Definition at line 157 of file gic_v3_distributor.hh.

Referenced by getIntGroup(), read(), serialize(), unserialize(), and write().

◆ irqGrpmod

std::vector<uint8_t> gem5::Gicv3Distributor::irqGrpmod
protected

Definition at line 164 of file gic_v3_distributor.hh.

Referenced by getIntGroup(), read(), serialize(), unserialize(), and write().

◆ irqNsacr

std::vector<uint8_t> gem5::Gicv3Distributor::irqNsacr
protected

Definition at line 165 of file gic_v3_distributor.hh.

Referenced by read(), serialize(), unserialize(), and write().

◆ irqPending

std::vector<bool> gem5::Gicv3Distributor::irqPending
protected

◆ irqPendingIspendr

std::vector<bool> gem5::Gicv3Distributor::irqPendingIspendr
protected

Definition at line 160 of file gic_v3_distributor.hh.

Referenced by sendInt(), serialize(), treatAsEdgeTriggered(), unserialize(), and write().

◆ irqPriority

std::vector<uint8_t> gem5::Gicv3Distributor::irqPriority
protected

Definition at line 162 of file gic_v3_distributor.hh.

Referenced by read(), serialize(), unserialize(), update(), and write().

◆ itLines

const uint32_t gem5::Gicv3Distributor::itLines
protected

◆ res0_1

gem5::Gicv3Distributor::res0_1
protected

Definition at line 136 of file gic_v3_distributor.hh.

◆ res0_2

Bitfield<30, 24> gem5::Gicv3Distributor::res0_2
protected

Definition at line 139 of file gic_v3_distributor.hh.


The documentation for this class was generated from the following files:

Generated on Tue Sep 21 2021 12:27:38 for gem5 by doxygen 1.8.17