#include <gic_v3_redistributor.hh>

Inheritance diagram for gem5::Gicv3Redistributor:

Public Member Functions
void	activateIRQ (uint32_t int_id)

bool	canBeSelectedFor1toNInterrupt (Gicv3::GroupId group) const

void	deactivateIRQ (uint32_t int_id)

Gicv3CPUInterface *	getCPUInterface () const

uint32_t	processorNumber () const

Gicv3::GroupId	getIntGroup (int int_id) const

Gicv3::IntStatus	intStatus (uint32_t int_id) const

uint8_t	readEntryLPI (uint32_t intid)

void	writeEntryLPI (uint32_t intid, uint8_t lpi_entry)

bool	isPendingLPI (uint32_t intid)

void	setClrLPI (uint64_t data, bool set)

void	sendSGI (uint32_t int_id, Gicv3::GroupId group, bool ns)

void	serialize (CheckpointOut &cp) const override
	Serialize an object.

void	unserialize (CheckpointIn &cp) override
	Unserialize an object.

void	update ()

void	updateDistributor ()

	Gicv3Redistributor (Gicv3 *gic, uint32_t cpu_id)

uint32_t	getAffinity () const

void	init ()

uint64_t	read (Addr addr, size_t size, bool is_secure_access)

void	sendPPInt (uint32_t int_id)

void	clearPPInt (uint32_t int_id)

void	write (Addr addr, uint64_t data, size_t size, bool is_secure_access)

void	copy (Gicv3Registers from, Gicv3Registers to)

Public Member Functions inherited from gem5::Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section.

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object.

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Attributes
const uint32_t	addrRangeSize

Static Public Attributes
static const uint32_t	SMALLEST_LPI_ID = 8192

Protected Types
enum	{ GICR_CTLR = RD_base + 0x0000 , GICR_IIDR = RD_base + 0x0004 , GICR_TYPER = RD_base + 0x0008 , GICR_WAKER = RD_base + 0x0014 , GICR_PIDR0 = RD_base + 0xffe0 , GICR_PIDR1 = RD_base + 0xffe4 , GICR_PIDR2 = RD_base + 0xffe8 , GICR_PIDR3 = RD_base + 0xffec , GICR_PIDR4 = RD_base + 0xffd0 , GICR_PIDR5 = RD_base + 0xffd4 , GICR_PIDR6 = RD_base + 0xffd8 , GICR_PIDR7 = RD_base + 0xffdc }

enum	{ GICR_IGROUPR0 = SGI_base + 0x0080 , GICR_ISENABLER0 = SGI_base + 0x0100 , GICR_ICENABLER0 = SGI_base + 0x0180 , GICR_ISPENDR0 = SGI_base + 0x0200 , GICR_ICPENDR0 = SGI_base + 0x0280 , GICR_ISACTIVER0 = SGI_base + 0x0300 , GICR_ICACTIVER0 = SGI_base + 0x0380 , GICR_ICFGR0 = SGI_base + 0x0c00 , GICR_ICFGR1 = SGI_base + 0x0c04 , GICR_IGRPMODR0 = SGI_base + 0x0d00 , GICR_NSACR = SGI_base + 0x0e00 }

enum	{ GICR_SETLPIR = RD_base + 0x0040 , GICR_CLRLPIR = RD_base + 0x0048 , GICR_PROPBASER = RD_base + 0x0070 , GICR_PENDBASER = RD_base + 0x0078 , GICR_INVLPIR = RD_base + 0x00A0 , GICR_INVALLR = RD_base + 0x00B0 , GICR_SYNCR = RD_base + 0x00C0 }

Protected Member Functions
	BitUnion8 (LPIConfigurationTableEntry) Bitfield< 7

	EndBitUnion (LPIConfigurationTableEntry) static const uint32_t GICR_CTLR_ENABLE_LPIS

bool	isLevelSensitive (uint32_t int_id) const

bool	treatAsEdgeTriggered (uint32_t int_id) const
	This helper is used to check if an interrupt should be treated as edge triggered in the following scenarios:

Protected Attributes
Gicv3 *	gic

Gicv3Distributor *	distributor

Gicv3CPUInterface *	cpuInterface

uint32_t	cpuId

PortProxy *	memProxy

bool	peInLowPowerState

std::vector< uint8_t >	irqGroup

std::vector< bool >	irqEnabled

std::vector< bool >	irqPending

std::vector< bool >	irqPendingIspendr

std::vector< bool >	irqActive

std::vector< uint8_t >	irqPriority

std::vector< Gicv3::IntTriggerType >	irqConfig

std::vector< uint8_t >	irqGrpmod

std::vector< uint8_t >	irqNsacr

bool	DPG1S

bool	DPG1NS

bool	DPG0

bool	EnableLPIs

Addr	lpiConfigurationTablePtr

uint8_t	lpiIDBits

Addr	lpiPendingTablePtr

	priority

Bitfield< 1 >	res1

Bitfield< 0 >	enable

Static Protected Attributes
static const uint32_t	RD_base = 0x0

static const uint32_t	SGI_base = 0x10000

static const uint32_t	GICR_WAKER_ProcessorSleep = 1 << 1

static const uint32_t	GICR_WAKER_ChildrenAsleep = 1 << 2

static const AddrRange	GICR_IPRIORITYR

static const uint32_t	GICR_CTLR_DPG0 = 1 << 24

static const uint32_t	GICR_CTLR_DPG1NS = 1 << 25

static const uint32_t	GICR_CTLR_DPG1S = 1 << 26

Friends
class	Gicv3CPUInterface

class	Gicv3Distributor

class	Gicv3Its

Additional Inherited Members
Static Public Member Functions inherited from gem5::Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section.

static void	generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
	Generate a checkpoint file so that the serialization can be routed to it.

Detailed Description

Definition at line 55 of file gic_v3_redistributor.hh.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum

protected

Enumerator
GICR_CTLR
GICR_IIDR
GICR_TYPER
GICR_WAKER
GICR_PIDR0
GICR_PIDR1
GICR_PIDR2
GICR_PIDR3
GICR_PIDR4
GICR_PIDR5
GICR_PIDR6
GICR_PIDR7

Definition at line 78 of file gic_v3_redistributor.hh.

◆ anonymous enum

anonymous enum

protected

Enumerator
GICR_IGROUPR0
GICR_ISENABLER0
GICR_ICENABLER0
GICR_ISPENDR0
GICR_ICPENDR0
GICR_ISACTIVER0
GICR_ICACTIVER0
GICR_ICFGR0
GICR_ICFGR1
GICR_IGRPMODR0
GICR_NSACR

Definition at line 111 of file gic_v3_redistributor.hh.

◆ anonymous enum

anonymous enum

protected

Enumerator
GICR_SETLPIR
GICR_CLRLPIR
GICR_PROPBASER
GICR_PENDBASER
GICR_INVLPIR
GICR_INVALLR
GICR_SYNCR

Definition at line 141 of file gic_v3_redistributor.hh.

Constructor & Destructor Documentation

◆ Gicv3Redistributor()

gem5::Gicv3Redistributor::Gicv3Redistributor	(	Gicv3 *	gic,
		uint32_t	cpu_id )

Definition at line 57 of file gic_v3_redistributor.cc.

Member Function Documentation

◆ activateIRQ()

void gem5::Gicv3Redistributor::activateIRQ ( uint32_t int_id )

Definition at line 999 of file gic_v3_redistributor.cc.

References irqActive, irqPending, and treatAsEdgeTriggered().

◆ BitUnion8()

gem5::Gicv3Redistributor::BitUnion8 ( LPIConfigurationTableEntry )

protected

◆ canBeSelectedFor1toNInterrupt()

bool gem5::Gicv3Redistributor::canBeSelectedFor1toNInterrupt ( Gicv3::GroupId group ) const

Definition at line 1021 of file gic_v3_redistributor.cc.

References distributor, DPG0, DPG1NS, DPG1S, gem5::Gicv3::G0S, gem5::Gicv3::G1NS, gem5::Gicv3::G1S, gem5::Gicv3Distributor::groupEnabled(), and peInLowPowerState.

◆ clearPPInt()

void gem5::Gicv3Redistributor::clearPPInt ( uint32_t int_id )

Definition at line 725 of file gic_v3_redistributor.cc.

References irqPending, isLevelSensitive(), gem5::Gicv3::PPI_MAX, and gem5::Gicv3::SGI_MAX.

◆ copy()

void gem5::Gicv3Redistributor::copy	(	Gicv3Registers *	from,
		Gicv3Registers *	to )

◆ deactivateIRQ()

void gem5::Gicv3Redistributor::deactivateIRQ ( uint32_t int_id )

Definition at line 1008 of file gic_v3_redistributor.cc.

References irqActive.

Referenced by gem5::Gicv3CPUInterface::deactivateIRQ().

◆ EndBitUnion()

gem5::Gicv3Redistributor::EndBitUnion ( LPIConfigurationTableEntry ) const

protected

◆ getAffinity()

uint32_t gem5::Gicv3Redistributor::getAffinity ( ) const

Definition at line 1014 of file gic_v3_redistributor.cc.

References cpuId, gem5::ArmISA::getAffinity(), gem5::BaseGic::getSystem(), gic, and gem5::System::threads.

Referenced by gem5::Gicv3CPUInterface::copy(), copy(), gem5::Gicv3CPUInterface::generateSGI(), and read().

◆ getCPUInterface()

Gicv3CPUInterface * gem5::Gicv3Redistributor::getCPUInterface ( ) const

inline

Definition at line 208 of file gic_v3_redistributor.hh.

References cpuInterface.

Referenced by gem5::Gicv3::getCPUInterfaceByAffinity(), and gem5::Gicv3Distributor::route().

◆ getIntGroup()

Gicv3::GroupId gem5::Gicv3Redistributor::getIntGroup ( int int_id ) const

Definition at line 973 of file gic_v3_redistributor.cc.

References distributor, gem5::Gicv3Distributor::DS, gem5::Gicv3::G0S, gem5::Gicv3::G1NS, gem5::Gicv3::G1S, irqGroup, irqGrpmod, gem5::Gicv3::PPI_MAX, and gem5::Gicv3::SGI_MAX.

Referenced by read(), sendSGI(), gem5::Gicv3CPUInterface::setMiscReg(), update(), gem5::Gicv3CPUInterface::virtualDeactivateIRQ(), and write().

◆ init()

void gem5::Gicv3Redistributor::init ( )

Definition at line 85 of file gic_v3_redistributor.cc.

References cpuId, cpuInterface, distributor, gem5::Gicv3::getCPUInterface(), gem5::Gicv3::getDistributor(), gem5::BaseGic::getSystem(), gic, memProxy, and gem5::System::physProxy.

◆ intStatus()

Gicv3::IntStatus gem5::Gicv3Redistributor::intStatus ( uint32_t int_id ) const

Definition at line 774 of file gic_v3_redistributor.cc.

References gem5::Gicv3::INT_ACTIVE, gem5::Gicv3::INT_ACTIVE_PENDING, gem5::Gicv3::INT_INACTIVE, gem5::Gicv3::INT_PENDING, irqActive, irqPending, gem5::Gicv3::PPI_MAX, and gem5::Gicv3::SGI_MAX.

◆ isLevelSensitive()

bool gem5::Gicv3Redistributor::isLevelSensitive ( uint32_t int_id ) const

inlineprotected

Definition at line 233 of file gic_v3_redistributor.hh.

References gem5::Gicv3::INT_LEVEL_SENSITIVE, and irqConfig.

Referenced by clearPPInt(), and treatAsEdgeTriggered().

◆ isPendingLPI()

bool gem5::Gicv3Redistributor::isPendingLPI ( uint32_t intid )

Definition at line 911 of file gic_v3_redistributor.cc.

References readEntryLPI().

Referenced by gem5::ItsCommand::movi().

◆ processorNumber()

uint32_t gem5::Gicv3Redistributor::processorNumber ( ) const

inline

Definition at line 214 of file gic_v3_redistributor.hh.

References cpuId.

Referenced by gem5::Gicv3::read(), and gem5::Gicv3::write().

◆ read()

uint64_t gem5::Gicv3Redistributor::read	(	Addr	addr,
		size_t	size,
		bool	is_secure_access )

Definition at line 94 of file gic_v3_redistributor.cc.

References gem5::X86ISA::addr, gem5::ArmISA::affinity, gem5::AddrRange::contains(), cpuId, distributor, DPG0, DPG1NS, DPG1S, gem5::Gicv3Distributor::DS, EnableLPIs, gem5::Gicv3::G1NS, getAffinity(), gem5::Gicv3::getDistributor(), getIntGroup(), gem5::BaseGic::getSystem(), gic, gem5::Gicv3Distributor::gicdPidr2, GICR_CTLR, GICR_CTLR_DPG0, GICR_CTLR_DPG1NS, GICR_CTLR_DPG1S, GICR_ICACTIVER0, GICR_ICENABLER0, GICR_ICFGR0, GICR_ICFGR1, GICR_ICPENDR0, GICR_IGROUPR0, GICR_IGRPMODR0, GICR_IIDR, GICR_IPRIORITYR, GICR_ISACTIVER0, GICR_ISENABLER0, GICR_ISPENDR0, GICR_NSACR, GICR_PENDBASER, GICR_PIDR0, GICR_PIDR1, GICR_PIDR2, GICR_PIDR3, GICR_PIDR4, GICR_PIDR5, GICR_PIDR6, GICR_PIDR7, GICR_PROPBASER, GICR_SYNCR, GICR_TYPER, GICR_WAKER, GICR_WAKER_ChildrenAsleep, GICR_WAKER_ProcessorSleep, gem5::ArmISA::i, gem5::Gicv3::INT_EDGE_TRIGGERED, irqActive, irqConfig, irqEnabled, irqGroup, irqGrpmod, irqNsacr, irqPending, irqPriority, lpiConfigurationTablePtr, lpiIDBits, lpiPendingTablePtr, peInLowPowerState, gem5::Gicv3::reserved(), gem5::Gicv3::SGI_MAX, gem5::System::Threads::size(), gem5::AddrRange::start(), and gem5::System::threads.

Referenced by gem5::Gicv3::read().

◆ readEntryLPI()

uint8_t gem5::Gicv3Redistributor::readEntryLPI ( uint32_t intid )

Definition at line 888 of file gic_v3_redistributor.cc.

References lpiPendingTablePtr, memProxy, and gem5::PortProxy::readBlob().

Referenced by isPendingLPI(), and setClrLPI().

◆ sendPPInt()

void gem5::Gicv3Redistributor::sendPPInt ( uint32_t int_id )

Definition at line 713 of file gic_v3_redistributor.cc.

References DPRINTF, irqPending, irqPendingIspendr, gem5::Gicv3::PPI_MAX, gem5::Gicv3::SGI_MAX, and updateDistributor().

◆ sendSGI()

void gem5::Gicv3Redistributor::sendSGI	(	uint32_t	int_id,
		Gicv3::GroupId	group,
		bool	ns )

Definition at line 736 of file gic_v3_redistributor.cc.

References distributor, DPRINTF, gem5::Gicv3Distributor::DS, gem5::Gicv3::G0S, gem5::Gicv3::G1NS, gem5::Gicv3::G1S, getIntGroup(), irqNsacr, irqPending, irqPendingIspendr, gem5::ArmISA::ns, gem5::Gicv3::SGI_MAX, and updateDistributor().

Referenced by gem5::Gicv3CPUInterface::generateSGI().

◆ serialize()

void gem5::Gicv3Redistributor::serialize ( CheckpointOut & cp ) const

overridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters

cp	Checkpoint state

Implements gem5::Serializable.

Definition at line 1075 of file gic_v3_redistributor.cc.

References DPG0, DPG1NS, DPG1S, EnableLPIs, irqActive, irqConfig, irqEnabled, irqGroup, irqGrpmod, irqNsacr, irqPending, irqPendingIspendr, irqPriority, lpiConfigurationTablePtr, lpiIDBits, lpiPendingTablePtr, peInLowPowerState, SERIALIZE_CONTAINER, and SERIALIZE_SCALAR.

◆ setClrLPI()

void gem5::Gicv3Redistributor::setClrLPI	(	uint64_t	data,
		bool	set )

Definition at line 923 of file gic_v3_redistributor.cc.

References cpuInterface, data, EnableLPIs, lpiIDBits, readEntryLPI(), gem5::Gicv3CPUInterface::resetHppi(), gem5::ArmISA::set, updateDistributor(), and writeEntryLPI().

Referenced by gem5::ItsCommand::clear(), gem5::ItsCommand::discard(), gem5::ItsCommand::doInt(), gem5::ItsTranslation::main(), gem5::ItsCommand::movi(), and write().

◆ treatAsEdgeTriggered()

bool gem5::Gicv3Redistributor::treatAsEdgeTriggered ( uint32_t int_id ) const

inlineprotected

This helper is used to check if an interrupt should be treated as edge triggered in the following scenarios:

a) While activating the interrupt b) While clearing an interrupt via ICPENDR

In fact, in these two situations, a level sensitive interrupt which had been made pending via a write to ISPENDR, will be treated as it if was edge triggered.

Definition at line 249 of file gic_v3_redistributor.hh.

References irqPendingIspendr, and isLevelSensitive().

Referenced by activateIRQ(), and write().

◆ unserialize()

void gem5::Gicv3Redistributor::unserialize ( CheckpointIn & cp )

overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters

cp	Checkpoint state

Implements gem5::Serializable.

Definition at line 1097 of file gic_v3_redistributor.cc.

References DPG0, DPG1NS, DPG1S, EnableLPIs, irqActive, irqConfig, irqEnabled, irqGroup, irqGrpmod, irqNsacr, irqPending, irqPendingIspendr, irqPriority, lpiConfigurationTablePtr, lpiIDBits, lpiPendingTablePtr, peInLowPowerState, UNSERIALIZE_CONTAINER, and UNSERIALIZE_SCALAR.

◆ update()

void gem5::Gicv3Redistributor::update ( )

◆ updateDistributor()

void gem5::Gicv3Redistributor::updateDistributor ( )

Definition at line 792 of file gic_v3_redistributor.cc.

References distributor, and gem5::Gicv3Distributor::update().

Referenced by gem5::Gicv3Its::moveAllPendingState(), sendPPInt(), sendSGI(), setClrLPI(), and write().

◆ write()

void gem5::Gicv3Redistributor::write	(	Addr	addr,
		uint64_t	data,
		size_t	size,
		bool	is_secure_access )

Definition at line 386 of file gic_v3_redistributor.cc.

References gem5::activate(), gem5::X86ISA::addr, gem5::bits(), gem5::AddrRange::contains(), cpuInterface, data, gem5::Gicv3CPUInterface::deassertWakeRequest(), distributor, DPG0, DPG1NS, DPG1S, DPRINTF, gem5::Gicv3Distributor::DS, enable, EnableLPIs, gem5::Gicv3::G1NS, getIntGroup(), gic, GICR_CLRLPIR, GICR_CTLR, GICR_CTLR_DPG0, GICR_CTLR_DPG1NS, GICR_CTLR_DPG1S, GICR_ICACTIVER0, GICR_ICENABLER0, GICR_ICFGR0, GICR_ICFGR1, GICR_ICPENDR0, GICR_IGROUPR0, GICR_IGRPMODR0, GICR_INVALLR, GICR_INVLPIR, GICR_IPRIORITYR, GICR_ISACTIVER0, GICR_ISENABLER0, GICR_ISPENDR0, GICR_NSACR, GICR_PENDBASER, GICR_PROPBASER, GICR_SETLPIR, GICR_WAKER, GICR_WAKER_ProcessorSleep, gem5::ArmISA::i, gem5::Gicv3::INT_EDGE_TRIGGERED, gem5::Gicv3::INT_LEVEL_SENSITIVE, irqActive, irqConfig, irqEnabled, irqGroup, irqGrpmod, irqNsacr, irqPending, irqPendingIspendr, irqPriority, lpiConfigurationTablePtr, lpiIDBits, lpiPendingTablePtr, peInLowPowerState, gem5::Gicv3::reserved(), setClrLPI(), gem5::Gicv3::SGI_MAX, gem5::AddrRange::start(), treatAsEdgeTriggered(), and updateDistributor().

Referenced by gem5::Gicv3::write().

◆ writeEntryLPI()

void gem5::Gicv3Redistributor::writeEntryLPI	(	uint32_t	intid,
		uint8_t	lpi_entry )

Definition at line 901 of file gic_v3_redistributor.cc.

References lpiPendingTablePtr, memProxy, and gem5::PortProxy::writeBlob().

Referenced by setClrLPI().

Friends And Related Symbol Documentation

◆ Gicv3CPUInterface

friend class Gicv3CPUInterface

friend

Definition at line 59 of file gic_v3_redistributor.hh.

◆ Gicv3Distributor

friend class Gicv3Distributor

friend

Definition at line 60 of file gic_v3_redistributor.hh.

◆ Gicv3Its

friend class Gicv3Its

friend

Definition at line 61 of file gic_v3_redistributor.hh.

Member Data Documentation

◆ addrRangeSize

const uint32_t gem5::Gicv3Redistributor::addrRangeSize

Definition at line 198 of file gic_v3_redistributor.hh.

◆ cpuId

uint32_t gem5::Gicv3Redistributor::cpuId

protected

Definition at line 68 of file gic_v3_redistributor.hh.

Referenced by getAffinity(), init(), processorNumber(), and read().

◆ cpuInterface

Gicv3CPUInterface* gem5::Gicv3Redistributor::cpuInterface

protected

Definition at line 67 of file gic_v3_redistributor.hh.

Referenced by getCPUInterface(), init(), setClrLPI(), update(), and write().

◆ distributor

Gicv3Distributor* gem5::Gicv3Redistributor::distributor

protected

Definition at line 66 of file gic_v3_redistributor.hh.

Referenced by canBeSelectedFor1toNInterrupt(), getIntGroup(), init(), read(), sendSGI(), update(), updateDistributor(), and write().

◆ DPG0

bool gem5::Gicv3Redistributor::DPG0

protected

Definition at line 171 of file gic_v3_redistributor.hh.

Referenced by canBeSelectedFor1toNInterrupt(), read(), serialize(), unserialize(), and write().

◆ DPG1NS

bool gem5::Gicv3Redistributor::DPG1NS

protected

Definition at line 170 of file gic_v3_redistributor.hh.

Referenced by canBeSelectedFor1toNInterrupt(), read(), serialize(), unserialize(), and write().

◆ DPG1S

bool gem5::Gicv3Redistributor::DPG1S

protected

Definition at line 169 of file gic_v3_redistributor.hh.

Referenced by canBeSelectedFor1toNInterrupt(), read(), serialize(), unserialize(), and write().

◆ enable

Bitfield<0> gem5::Gicv3Redistributor::enable

protected

Definition at line 181 of file gic_v3_redistributor.hh.

Referenced by write().

◆ EnableLPIs

bool gem5::Gicv3Redistributor::EnableLPIs

protected

Definition at line 172 of file gic_v3_redistributor.hh.

Referenced by read(), serialize(), setClrLPI(), unserialize(), update(), and write().

◆ gic

Gicv3* gem5::Gicv3Redistributor::gic

protected

Definition at line 65 of file gic_v3_redistributor.hh.

Referenced by copy(), getAffinity(), init(), read(), update(), and write().

◆ GICR_CTLR_DPG0

const uint32_t gem5::Gicv3Redistributor::GICR_CTLR_DPG0 = 1 << 24

staticprotected

Definition at line 185 of file gic_v3_redistributor.hh.

Referenced by read(), and write().

◆ GICR_CTLR_DPG1NS

const uint32_t gem5::Gicv3Redistributor::GICR_CTLR_DPG1NS = 1 << 25

staticprotected

Definition at line 186 of file gic_v3_redistributor.hh.

Referenced by read(), and write().

◆ GICR_CTLR_DPG1S

const uint32_t gem5::Gicv3Redistributor::GICR_CTLR_DPG1S = 1 << 26

staticprotected

Definition at line 187 of file gic_v3_redistributor.hh.

Referenced by read(), and write().

◆ GICR_IPRIORITYR

const AddrRange gem5::Gicv3Redistributor::GICR_IPRIORITYR

staticprotected

Definition at line 138 of file gic_v3_redistributor.hh.

Referenced by copy(), read(), and write().

◆ GICR_WAKER_ChildrenAsleep

const uint32_t gem5::Gicv3Redistributor::GICR_WAKER_ChildrenAsleep = 1 << 2

staticprotected

Definition at line 107 of file gic_v3_redistributor.hh.

Referenced by read().

◆ GICR_WAKER_ProcessorSleep

const uint32_t gem5::Gicv3Redistributor::GICR_WAKER_ProcessorSleep = 1 << 1

staticprotected

Definition at line 106 of file gic_v3_redistributor.hh.

Referenced by read(), and write().

◆ irqActive

std::vector<bool> gem5::Gicv3Redistributor::irqActive

protected

Definition at line 163 of file gic_v3_redistributor.hh.

Referenced by activateIRQ(), deactivateIRQ(), intStatus(), read(), serialize(), unserialize(), update(), and write().

◆ irqConfig

std::vector<Gicv3::IntTriggerType> gem5::Gicv3Redistributor::irqConfig

protected

Definition at line 165 of file gic_v3_redistributor.hh.

Referenced by isLevelSensitive(), read(), serialize(), unserialize(), and write().

◆ irqEnabled

std::vector<bool> gem5::Gicv3Redistributor::irqEnabled

protected

Definition at line 160 of file gic_v3_redistributor.hh.

Referenced by read(), serialize(), unserialize(), update(), and write().

◆ irqGroup

std::vector<uint8_t> gem5::Gicv3Redistributor::irqGroup

protected

Definition at line 159 of file gic_v3_redistributor.hh.

Referenced by getIntGroup(), read(), serialize(), unserialize(), and write().

◆ irqGrpmod

std::vector<uint8_t> gem5::Gicv3Redistributor::irqGrpmod

protected

Definition at line 166 of file gic_v3_redistributor.hh.

Referenced by getIntGroup(), read(), serialize(), unserialize(), and write().

◆ irqNsacr

std::vector<uint8_t> gem5::Gicv3Redistributor::irqNsacr

protected

Definition at line 167 of file gic_v3_redistributor.hh.

Referenced by read(), sendSGI(), serialize(), unserialize(), and write().

◆ irqPending

std::vector<bool> gem5::Gicv3Redistributor::irqPending

protected

Definition at line 161 of file gic_v3_redistributor.hh.

Referenced by activateIRQ(), clearPPInt(), intStatus(), read(), sendPPInt(), sendSGI(), serialize(), gem5::Gicv3CPUInterface::setThreadContext(), unserialize(), update(), gem5::Gicv3CPUInterface::virtualUpdate(), and write().

◆ irqPendingIspendr

std::vector<bool> gem5::Gicv3Redistributor::irqPendingIspendr

protected

Definition at line 162 of file gic_v3_redistributor.hh.

Referenced by sendPPInt(), sendSGI(), serialize(), treatAsEdgeTriggered(), unserialize(), and write().

◆ irqPriority

std::vector<uint8_t> gem5::Gicv3Redistributor::irqPriority

protected

Definition at line 164 of file gic_v3_redistributor.hh.

Referenced by read(), serialize(), unserialize(), update(), and write().

◆ lpiConfigurationTablePtr

Addr gem5::Gicv3Redistributor::lpiConfigurationTablePtr

protected

Definition at line 174 of file gic_v3_redistributor.hh.

Referenced by read(), serialize(), unserialize(), update(), and write().

◆ lpiIDBits

uint8_t gem5::Gicv3Redistributor::lpiIDBits

protected

Definition at line 175 of file gic_v3_redistributor.hh.

Referenced by gem5::Gicv3Its::moveAllPendingState(), read(), serialize(), setClrLPI(), unserialize(), update(), and write().

◆ lpiPendingTablePtr

Addr gem5::Gicv3Redistributor::lpiPendingTablePtr

protected

Definition at line 176 of file gic_v3_redistributor.hh.

Referenced by gem5::Gicv3Its::moveAllPendingState(), read(), readEntryLPI(), serialize(), unserialize(), update(), write(), and writeEntryLPI().

◆ memProxy

PortProxy* gem5::Gicv3Redistributor::memProxy

protected

Definition at line 69 of file gic_v3_redistributor.hh.

Referenced by init(), gem5::Gicv3Its::moveAllPendingState(), readEntryLPI(), update(), and writeEntryLPI().

◆ peInLowPowerState

bool gem5::Gicv3Redistributor::peInLowPowerState

protected

Definition at line 109 of file gic_v3_redistributor.hh.

Referenced by canBeSelectedFor1toNInterrupt(), read(), serialize(), unserialize(), update(), and write().

◆ priority

gem5::Gicv3Redistributor::priority

protected

Definition at line 179 of file gic_v3_redistributor.hh.

◆ RD_base

const uint32_t gem5::Gicv3Redistributor::RD_base = 0x0

staticprotected

Definition at line 75 of file gic_v3_redistributor.hh.

◆ res1

Bitfield<1> gem5::Gicv3Redistributor::res1

protected

Definition at line 180 of file gic_v3_redistributor.hh.

◆ SGI_base

const uint32_t gem5::Gicv3Redistributor::SGI_base = 0x10000

staticprotected

Definition at line 76 of file gic_v3_redistributor.hh.

◆ SMALLEST_LPI_ID

const uint32_t gem5::Gicv3Redistributor::SMALLEST_LPI_ID = 8192

static

Definition at line 200 of file gic_v3_redistributor.hh.

Referenced by gem5::Gicv3Its::lpiOutOfRange(), gem5::Gicv3CPUInterface::readMiscReg(), and update().

The documentation for this class was generated from the following files:

dev/arm/gic_v3_redistributor.hh
dev/arm/gic_v3_redistributor.cc

Public Member Functions

Public Attributes

Static Public Attributes

Protected Types

Protected Member Functions

Protected Attributes

Static Protected Attributes

Friends

Additional Inherited Members

Detailed Description

Member Enumeration Documentation

◆ anonymous enum

◆ anonymous enum

◆ anonymous enum

Constructor & Destructor Documentation

◆ Gicv3Redistributor()

Member Function Documentation

◆ activateIRQ()

◆ BitUnion8()

◆ canBeSelectedFor1toNInterrupt()

◆ clearPPInt()

◆ copy()

◆ deactivateIRQ()

◆ EndBitUnion()

◆ getAffinity()

◆ getCPUInterface()

◆ getIntGroup()

◆ init()

◆ intStatus()

◆ isLevelSensitive()

◆ isPendingLPI()

◆ processorNumber()

◆ read()

◆ readEntryLPI()

◆ sendPPInt()

◆ sendSGI()

◆ serialize()

◆ setClrLPI()

◆ treatAsEdgeTriggered()

◆ unserialize()

◆ update()

◆ updateDistributor()

◆ write()

◆ writeEntryLPI()

Friends And Related Symbol Documentation

◆ Gicv3CPUInterface

◆ Gicv3Distributor

◆ Gicv3Its

Member Data Documentation

◆ addrRangeSize

◆ cpuId

◆ cpuInterface

◆ distributor

◆ DPG0

◆ DPG1NS

◆ DPG1S

◆ enable

◆ EnableLPIs

◆ gic

◆ GICR_CTLR_DPG0

◆ GICR_CTLR_DPG1NS

◆ GICR_CTLR_DPG1S

◆ GICR_IPRIORITYR

◆ GICR_WAKER_ChildrenAsleep

◆ GICR_WAKER_ProcessorSleep

◆ irqActive

◆ irqConfig

◆ irqEnabled

◆ irqGroup

◆ irqGrpmod

◆ irqNsacr

◆ irqPending

◆ irqPendingIspendr

◆ irqPriority

◆ lpiConfigurationTablePtr

◆ lpiIDBits

◆ lpiPendingTablePtr

◆ memProxy

◆ peInLowPowerState

◆ priority