#include <pl011.hh>

Inheritance diagram for gem5::Pl011:

Public Member Functions
	Pl011 (const Pl011Params &p)

void	serialize (CheckpointOut &cp) const override
	Serialize an object.

void	unserialize (CheckpointIn &cp) override
	Unserialize an object.

Tick	read (PacketPtr pkt) override
	Pure virtual function that the device must implement.

Tick	write (PacketPtr pkt) override
	Pure virtual function that the device must implement.

void	dataAvailable () override
	Inform the uart that there is data available.

Public Member Functions inherited from gem5::Uart
	Uart (const Params &p, Addr pio_size)

bool	intStatus ()
	Return if we have an interrupt pending.

Public Member Functions inherited from gem5::BasicPioDevice
	PARAMS (BasicPioDevice)

	BasicPioDevice (const Params &p, Addr size)

AddrRangeList	getAddrRanges () const override
	Determine the address ranges that this device responds to.

Public Member Functions inherited from gem5::PioDevice
	PioDevice (const Params &p)

virtual	~PioDevice ()

void	init () override
	init() is called after all C++ SimObjects have been created and all ports are connected.

Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	Get a port with a given name and index.

Public Member Functions inherited from gem5::ClockedObject
	ClockedObject (const ClockedObjectParams &p)

Public Member Functions inherited from gem5::SimObject
const Params &	params () const

	SimObject (const Params &p)

virtual	~SimObject ()

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint.

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint.

virtual void	regProbePoints ()
	Register probe points for this object.

virtual void	regProbeListeners ()
	Register probe listeners for this object.

ProbeManager *	getProbeManager ()
	Get the probe manager for this object.

virtual void	startup ()
	startup() is the final initialization call before simulation.

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining.

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes.

virtual void	memInvalidate ()
	Invalidate the contents of memory buffers.

void	serialize (CheckpointOut &cp) const override
	Serialize an object.

void	unserialize (CheckpointIn &cp) override
	Unserialize an object.

Public Member Functions inherited from gem5::EventManager
EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers.

void	setCurTick (Tick newVal)

	EventManager (EventManager &em)
	Event manger manages events in the event queue.

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

Public Member Functions inherited from gem5::Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section.

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object.

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from gem5::Drainable
DrainState	drainState () const
	Return the current drain state of an object.

virtual void	notifyFork ()
	Notify a child process of a fork.

Public Member Functions inherited from gem5::statistics::Group
	Group (Group parent, const char name=nullptr)
	Construct a new statistics group.

virtual	~Group ()

virtual void	regStats ()
	Callback to set stat parameters.

virtual void	resetStats ()
	Callback to reset stats.

virtual void	preDumpStats ()
	Callback before stats are dumped.

void	addStat (statistics::Info *info)
	Register a stat with this group.

const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object.

const std::vector< Info * > &	getStats () const
	Get all stats associated with this object.

void	addStatGroup (const char name, Group block)
	Add a stat block as a child of this block.

const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group.

void	mergeStatGroup (Group *block)
	Merge the contents (stats & children) of a block to this block.

	Group ()=delete

	Group (const Group &)=delete

Group &	operator= (const Group &)=delete

Public Member Functions inherited from gem5::Named
	Named (const std::string &name_)

virtual	~Named ()=default

virtual std::string	name () const

Public Member Functions inherited from gem5::Clocked
void	updateClockPeriod ()
	Update the tick to the current tick.

Tick	clockEdge (Cycles cycles=Cycles(0)) const
	Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle.

Cycles	curCycle () const
	Determine the current cycle, corresponding to a tick aligned to a clock edge.

Tick	nextCycle () const
	Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future.

uint64_t	frequency () const

Tick	clockPeriod () const

double	voltage () const

Cycles	ticksToCycles (Tick t) const

Tick	cyclesToTicks (Cycles c) const

Protected Member Functions
void	generateInterrupt ()
	Function to generate interrupt.

void	setInterrupts (uint16_t ints, uint16_t mask)
	Assign new interrupt values and update interrupt signals.

void	setInterruptMask (uint16_t mask)
	Convenience function to update the interrupt mask.

void	raiseInterrupts (uint16_t ints)
	Convenience function to raise a new interrupt.

void	clearInterrupts (uint16_t ints)
	Convenience function to clear interrupts.

uint16_t	maskInt () const
	Masked interrupt status register.

Protected Member Functions inherited from gem5::Drainable
	Drainable ()

virtual	~Drainable ()

virtual void	drainResume ()
	Resume execution after a successful drain.

void	signalDrainDone () const
	Signal that an object is drained.

Protected Member Functions inherited from gem5::Clocked
	Clocked (ClockDomain &clk_domain)
	Create a clocked object and set the clock domain based on the parameters.

	Clocked (Clocked &)=delete

Clocked &	operator= (Clocked &)=delete

virtual	~Clocked ()
	Virtual destructor due to inheritance.

void	resetClock () const
	Reset the object's clock using the current global tick value.

virtual void	clockPeriodUpdated ()
	A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed.

Protected Member Functions inherited from gem5::AmbaDevice
bool	readId (PacketPtr pkt, uint64_t amba_id, Addr pio_addr)

Protected Attributes
EventFunctionWrapper	intEvent
	Wrapper to create an event out of the thing.

uint16_t	control

uint16_t	fbrd
	fractional baud rate divisor.

uint16_t	ibrd
	integer baud rate divisor.

uint16_t	lcrh
	Line control register.

uint16_t	ifls
	interrupt fifo level register.

uint16_t	imsc
	interrupt mask register.

uint16_t	rawInt
	raw interrupt status register

const bool	endOnEOT
	Should the simulation end on an EOT.

ArmInterruptPin *const	interrupt

const Tick	intDelay
	Delay before interrupting.

Protected Attributes inherited from gem5::Uart
int	status

Platform *	platform

SerialDevice *	device

Protected Attributes inherited from gem5::BasicPioDevice
Addr	pioAddr
	Address that the device listens to.

Addr	pioSize
	Size that the device's address range.

Tick	pioDelay
	Delay that the device experinces on an access.

Protected Attributes inherited from gem5::PioDevice
System *	sys

PioPort< PioDevice >	pioPort
	The pioPort that handles the requests for us and provides us requests that it sees.

Protected Attributes inherited from gem5::SimObject
const SimObjectParams &	_params
	Cached copy of the object parameters.

Protected Attributes inherited from gem5::EventManager
EventQueue *	eventq
	A pointer to this object's event queue.

Static Protected Attributes
static const uint64_t	AMBA_ID = 0xb105f00d00341011ULL

static const int	UART_DR = 0x000

static const int	UART_RSR = 0x004

static const int	UART_ECR = 0x004

static const int	UART_FR = 0x018

static const int	UART_FR_CTS = 0x001

static const int	UART_FR_RXFE = 0x010

static const int	UART_FR_TXFF = 0x020

static const int	UART_FR_RXFF = 0x040

static const int	UART_FR_TXFE = 0x080

static const int	UART_IBRD = 0x024

static const int	UART_FBRD = 0x028

static const int	UART_LCRH = 0x02C

static const int	UART_CR = 0x030

static const int	UART_IFLS = 0x034

static const int	UART_IMSC = 0x038

static const int	UART_RIS = 0x03C

static const int	UART_MIS = 0x040

static const int	UART_ICR = 0x044

static const int	UART_DMACR = 0x048

static const uint16_t	UART_RIINTR = 1 << 0

static const uint16_t	UART_CTSINTR = 1 << 1

static const uint16_t	UART_CDCINTR = 1 << 2

static const uint16_t	UART_DSRINTR = 1 << 3

static const uint16_t	UART_RXINTR = 1 << 4

static const uint16_t	UART_TXINTR = 1 << 5

static const uint16_t	UART_RTINTR = 1 << 6

static const uint16_t	UART_FEINTR = 1 << 7

static const uint16_t	UART_PEINTR = 1 << 8

static const uint16_t	UART_BEINTR = 1 << 9

static const uint16_t	UART_OEINTR = 1 << 10

Static Protected Attributes inherited from gem5::AmbaDevice
static const int	AMBA_PER_ID0 = 0xFE0

static const int	AMBA_PER_ID1 = 0xFE4

static const int	AMBA_PER_ID2 = 0xFE8

static const int	AMBA_PER_ID3 = 0xFEC

static const int	AMBA_CEL_ID0 = 0xFF0

static const int	AMBA_CEL_ID1 = 0xFF4

static const int	AMBA_CEL_ID2 = 0xFF8

static const int	AMBA_CEL_ID3 = 0xFFC

Additional Inherited Members
Public Types inherited from gem5::Uart
using	Params = UartParams

Public Types inherited from gem5::PioDevice
using	Params = PioDeviceParams

Public Types inherited from gem5::ClockedObject
using	Params = ClockedObjectParams
	Parameters of ClockedObject.

Public Types inherited from gem5::SimObject
typedef SimObjectParams	Params

Static Public Member Functions inherited from gem5::SimObject
static void	serializeAll (const std::string &cpt_dir)
	Create a checkpoint by serializing all SimObjects in the system.

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it.

static void	setSimObjectResolver (SimObjectResolver *resolver)
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

static SimObjectResolver *	getSimObjectResolver ()
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

Static Public Member Functions inherited from gem5::Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section.

static void	generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
	Generate a checkpoint file so that the serialization can be routed to it.

Public Attributes inherited from gem5::ClockedObject
PowerState *	powerState

Detailed Description

Definition at line 58 of file pl011.hh.

Constructor & Destructor Documentation

◆ Pl011()

gem5::Pl011::Pl011 ( const Pl011Params & p )

Definition at line 56 of file pl011.cc.

References generateInterrupt().

Member Function Documentation

◆ clearInterrupts()

void gem5::Pl011::clearInterrupts ( uint16_t ints )

inlineprotected

Convenience function to clear interrupts.

See also: setInterrupts

Parameters

ints	Set of interrupts to clear

Definition at line 110 of file pl011.hh.

References imsc, rawInt, and setInterrupts().

Referenced by read(), and write().

◆ dataAvailable()

void gem5::Pl011::dataAvailable ( )

overridevirtual

Inform the uart that there is data available.

Implements gem5::Uart.

Definition at line 234 of file pl011.cc.

References DPRINTF, raiseInterrupts(), UART_RTINTR, and UART_RXINTR.

Referenced by read(), and write().

◆ generateInterrupt()

void gem5::Pl011::generateInterrupt ( )

protected

Function to generate interrupt.

Definition at line 243 of file pl011.cc.

References DPRINTF, imsc, interrupt, maskInt(), gem5::ArmInterruptPin::raise(), and rawInt.

Referenced by Pl011().

◆ maskInt()

uint16_t gem5::Pl011::maskInt ( ) const

inlineprotected

Masked interrupt status register.

Definition at line 113 of file pl011.hh.

References imsc, and rawInt.

Referenced by generateInterrupt(), read(), and setInterrupts().

◆ raiseInterrupts()

void gem5::Pl011::raiseInterrupts ( uint16_t ints )

inlineprotected

Convenience function to raise a new interrupt.

See also: setInterrupts

Parameters

ints	Set of interrupts to raise

Definition at line 103 of file pl011.hh.

References imsc, rawInt, and setInterrupts().

Referenced by dataAvailable(), and write().

◆ read()

Tick gem5::Pl011::read ( PacketPtr pkt )

overridevirtual

Pure virtual function that the device must implement.

Called when a read command is recieved by the port.

Parameters

pkt	Packet describing this request

Returns: number of ticks it took to complete

Implements gem5::PioDevice.

Definition at line 67 of file pl011.cc.

References AMBA_ID, clearInterrupts(), control, data, dataAvailable(), gem5::SerialDevice::dataAvailable(), gem5::Uart::device, DPRINTF, fbrd, gem5::Packet::getAddr(), gem5::Packet::getSize(), gem5::Packet::getUintX(), ibrd, ifls, imsc, lcrh, gem5::Packet::makeAtomicResponse(), maskInt(), panic, gem5::BasicPioDevice::pioAddr, gem5::BasicPioDevice::pioDelay, gem5::BasicPioDevice::pioSize, rawInt, gem5::SerialDevice::readData(), gem5::AmbaDevice::readId(), gem5::Packet::setUintX(), UART_CR, UART_DMACR, UART_DR, UART_FBRD, UART_FR, UART_FR_CTS, UART_FR_RXFE, UART_FR_RXFF, UART_FR_TXFE, UART_IBRD, UART_IFLS, UART_IMSC, UART_LCRH, UART_MIS, UART_RIS, UART_RSR, UART_RTINTR, UART_RXINTR, and warn.

◆ serialize()

void gem5::Pl011::serialize ( CheckpointOut & cp ) const

overridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters

cp	Checkpoint state

Reimplemented from gem5::ClockedObject.

Definition at line 273 of file pl011.cc.

References control, DPRINTF, fbrd, ibrd, ifls, imsc, lcrh, gem5::paramOut(), rawInt, and SERIALIZE_SCALAR.

◆ setInterruptMask()

void gem5::Pl011::setInterruptMask ( uint16_t mask )

inlineprotected

Convenience function to update the interrupt mask.

See also: setInterrupts

Parameters

mask	New interrupt mask

Definition at line 96 of file pl011.hh.

References gem5::ArmISA::mask, rawInt, and setInterrupts().

Referenced by write().

◆ setInterrupts()

void gem5::Pl011::setInterrupts	(	uint16_t	ints,
		uint16_t	mask )

protected

Assign new interrupt values and update interrupt signals.

A new interrupt is scheduled signalled if the set of unmasked interrupts goes empty to non-empty. Conversely, if the set of unmasked interrupts goes from non-empty to empty, the interrupt signal is cleared.

Parameters

ints	New raw interrupt status
mask	New interrupt mask

Definition at line 255 of file pl011.cc.

References gem5::ArmInterruptPin::clear(), gem5::curTick(), imsc, intDelay, interrupt, intEvent, gem5::ArmISA::mask, maskInt(), rawInt, gem5::EventManager::schedule(), and gem5::Event::scheduled().

Referenced by clearInterrupts(), raiseInterrupts(), and setInterruptMask().

◆ unserialize()

void gem5::Pl011::unserialize ( CheckpointIn & cp )

overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters

cp	Checkpoint state

Reimplemented from gem5::ClockedObject.

Definition at line 288 of file pl011.cc.

References control, DPRINTF, fbrd, ibrd, ifls, imsc, lcrh, gem5::paramIn(), rawInt, and UNSERIALIZE_SCALAR.

◆ write()

Tick gem5::Pl011::write ( PacketPtr pkt )

overridevirtual

Pure virtual function that the device must implement.

Called when a write command is recieved by the port.

Parameters

pkt	Packet describing this request

Returns: number of ticks it took to complete

Implements gem5::PioDevice.

Definition at line 158 of file pl011.cc.

References clearInterrupts(), control, data, dataAvailable(), gem5::SerialDevice::dataAvailable(), gem5::Uart::device, DPRINTF, endOnEOT, gem5::exitSimLoop(), fbrd, gem5::Packet::getAddr(), gem5::Packet::getLE(), gem5::Packet::getSize(), gem5::Packet::getUintX(), ibrd, ifls, lcrh, gem5::Packet::makeAtomicResponse(), panic, gem5::BasicPioDevice::pioAddr, gem5::BasicPioDevice::pioDelay, gem5::BasicPioDevice::pioSize, raiseInterrupts(), setInterruptMask(), UART_CR, UART_DMACR, UART_DR, UART_ECR, UART_FBRD, UART_IBRD, UART_ICR, UART_IFLS, UART_IMSC, UART_LCRH, UART_TXINTR, warn, and gem5::SerialDevice::writeData().

Member Data Documentation

◆ AMBA_ID

const uint64_t gem5::Pl011::AMBA_ID = 0xb105f00d00341011ULL

staticprotected

Definition at line 119 of file pl011.hh.

Referenced by read().

◆ control

uint16_t gem5::Pl011::control

protected

Definition at line 152 of file pl011.hh.

Referenced by read(), serialize(), unserialize(), and write().

◆ endOnEOT

const bool gem5::Pl011::endOnEOT

protected

Should the simulation end on an EOT.

Definition at line 178 of file pl011.hh.

Referenced by write().

◆ fbrd

uint16_t gem5::Pl011::fbrd

protected

fractional baud rate divisor.

Not used for anything but reporting written value

Definition at line 156 of file pl011.hh.

Referenced by read(), serialize(), unserialize(), and write().

◆ ibrd

uint16_t gem5::Pl011::ibrd

protected

integer baud rate divisor.

Not used for anything but reporting written value

Definition at line 160 of file pl011.hh.

Referenced by read(), serialize(), unserialize(), and write().

◆ ifls

uint16_t gem5::Pl011::ifls

protected

interrupt fifo level register.

Not used for anything but reporting written value

Definition at line 168 of file pl011.hh.

Referenced by read(), serialize(), unserialize(), and write().

◆ imsc

uint16_t gem5::Pl011::imsc

protected

interrupt mask register.

Definition at line 171 of file pl011.hh.

Referenced by clearInterrupts(), generateInterrupt(), maskInt(), raiseInterrupts(), read(), serialize(), setInterrupts(), and unserialize().

◆ intDelay

const Tick gem5::Pl011::intDelay

protected

Delay before interrupting.

Definition at line 183 of file pl011.hh.

Referenced by setInterrupts().

◆ interrupt

ArmInterruptPin* const gem5::Pl011::interrupt

protected

Definition at line 180 of file pl011.hh.

Referenced by generateInterrupt(), and setInterrupts().

◆ intEvent

EventFunctionWrapper gem5::Pl011::intEvent

protected

Wrapper to create an event out of the thing.

Definition at line 116 of file pl011.hh.

Referenced by setInterrupts().

◆ lcrh

uint16_t gem5::Pl011::lcrh

protected

Line control register.

Not used for anything but reporting written value

Definition at line 164 of file pl011.hh.

Referenced by read(), serialize(), unserialize(), and write().

◆ rawInt

uint16_t gem5::Pl011::rawInt

protected

raw interrupt status register

Definition at line 174 of file pl011.hh.

Referenced by clearInterrupts(), generateInterrupt(), maskInt(), raiseInterrupts(), read(), serialize(), setInterruptMask(), setInterrupts(), and unserialize().

◆ UART_BEINTR

const uint16_t gem5::Pl011::UART_BEINTR = 1 << 9

staticprotected

Definition at line 149 of file pl011.hh.

◆ UART_CDCINTR

const uint16_t gem5::Pl011::UART_CDCINTR = 1 << 2

staticprotected

Definition at line 142 of file pl011.hh.

◆ UART_CR

const int gem5::Pl011::UART_CR = 0x030

staticprotected

Definition at line 132 of file pl011.hh.

Referenced by read(), and write().

◆ UART_CTSINTR

const uint16_t gem5::Pl011::UART_CTSINTR = 1 << 1

staticprotected

Definition at line 141 of file pl011.hh.

◆ UART_DMACR

const int gem5::Pl011::UART_DMACR = 0x048

staticprotected

Definition at line 138 of file pl011.hh.

Referenced by read(), and write().

◆ UART_DR

const int gem5::Pl011::UART_DR = 0x000

staticprotected

Definition at line 120 of file pl011.hh.

Referenced by read(), and write().

◆ UART_DSRINTR

const uint16_t gem5::Pl011::UART_DSRINTR = 1 << 3

staticprotected

Definition at line 143 of file pl011.hh.

◆ UART_ECR

const int gem5::Pl011::UART_ECR = 0x004

staticprotected

Definition at line 122 of file pl011.hh.

Referenced by write().

◆ UART_FBRD

const int gem5::Pl011::UART_FBRD = 0x028

staticprotected

Definition at line 130 of file pl011.hh.

Referenced by read(), and write().

◆ UART_FEINTR

const uint16_t gem5::Pl011::UART_FEINTR = 1 << 7

staticprotected

Definition at line 147 of file pl011.hh.

◆ UART_FR

const int gem5::Pl011::UART_FR = 0x018

staticprotected

Definition at line 123 of file pl011.hh.

Referenced by read().

◆ UART_FR_CTS

const int gem5::Pl011::UART_FR_CTS = 0x001

staticprotected

Definition at line 124 of file pl011.hh.

Referenced by read().

◆ UART_FR_RXFE

const int gem5::Pl011::UART_FR_RXFE = 0x010

staticprotected

Definition at line 125 of file pl011.hh.

Referenced by read().

◆ UART_FR_RXFF

const int gem5::Pl011::UART_FR_RXFF = 0x040

staticprotected

Definition at line 127 of file pl011.hh.

Referenced by read().

◆ UART_FR_TXFE

const int gem5::Pl011::UART_FR_TXFE = 0x080

staticprotected

Definition at line 128 of file pl011.hh.

Referenced by read().

◆ UART_FR_TXFF

const int gem5::Pl011::UART_FR_TXFF = 0x020

staticprotected

Definition at line 126 of file pl011.hh.

◆ UART_IBRD

const int gem5::Pl011::UART_IBRD = 0x024

staticprotected

Definition at line 129 of file pl011.hh.

Referenced by read(), and write().

◆ UART_ICR

const int gem5::Pl011::UART_ICR = 0x044

staticprotected

Definition at line 137 of file pl011.hh.

Referenced by write().

◆ UART_IFLS

const int gem5::Pl011::UART_IFLS = 0x034

staticprotected

Definition at line 133 of file pl011.hh.

Referenced by read(), and write().

◆ UART_IMSC

const int gem5::Pl011::UART_IMSC = 0x038

staticprotected

Definition at line 134 of file pl011.hh.

Referenced by read(), and write().

◆ UART_LCRH

const int gem5::Pl011::UART_LCRH = 0x02C

staticprotected

Definition at line 131 of file pl011.hh.

Referenced by read(), and write().

◆ UART_MIS

const int gem5::Pl011::UART_MIS = 0x040

staticprotected

Definition at line 136 of file pl011.hh.

Referenced by read().

◆ UART_OEINTR

const uint16_t gem5::Pl011::UART_OEINTR = 1 << 10

staticprotected

Definition at line 150 of file pl011.hh.

◆ UART_PEINTR

const uint16_t gem5::Pl011::UART_PEINTR = 1 << 8

staticprotected

Definition at line 148 of file pl011.hh.

◆ UART_RIINTR

const uint16_t gem5::Pl011::UART_RIINTR = 1 << 0

staticprotected

Definition at line 140 of file pl011.hh.

◆ UART_RIS

const int gem5::Pl011::UART_RIS = 0x03C

staticprotected

Definition at line 135 of file pl011.hh.

Referenced by read().

◆ UART_RSR

const int gem5::Pl011::UART_RSR = 0x004

staticprotected

Definition at line 121 of file pl011.hh.

Referenced by read().

◆ UART_RTINTR

const uint16_t gem5::Pl011::UART_RTINTR = 1 << 6

staticprotected

Definition at line 146 of file pl011.hh.

Referenced by dataAvailable(), and read().

◆ UART_RXINTR

const uint16_t gem5::Pl011::UART_RXINTR = 1 << 4

staticprotected

Definition at line 144 of file pl011.hh.

Referenced by dataAvailable(), and read().

◆ UART_TXINTR

const uint16_t gem5::Pl011::UART_TXINTR = 1 << 5

staticprotected

Definition at line 145 of file pl011.hh.

Referenced by write().

The documentation for this class was generated from the following files:

dev/arm/pl011.hh
dev/arm/pl011.cc

Public Member Functions

Protected Member Functions

Protected Attributes

Static Protected Attributes

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

◆ Pl011()

Member Function Documentation

◆ clearInterrupts()

◆ dataAvailable()

◆ generateInterrupt()

◆ maskInt()

◆ raiseInterrupts()

◆ read()

◆ serialize()

◆ setInterruptMask()

◆ setInterrupts()

◆ unserialize()

◆ write()

Member Data Documentation

◆ AMBA_ID

◆ control

◆ endOnEOT

◆ fbrd

◆ ibrd

◆ ifls

◆ imsc

◆ intDelay

◆ interrupt

◆ intEvent

◆ lcrh

◆ rawInt

◆ UART_BEINTR

◆ UART_CDCINTR

◆ UART_CR

◆ UART_CTSINTR

◆ UART_DMACR

◆ UART_DR

◆ UART_DSRINTR

◆ UART_ECR

◆ UART_FBRD

◆ UART_FEINTR

◆ UART_FR

◆ UART_FR_CTS

◆ UART_FR_RXFE

◆ UART_FR_RXFF

◆ UART_FR_TXFE

◆ UART_FR_TXFF

◆ UART_IBRD

◆ UART_ICR

◆ UART_IFLS

◆ UART_IMSC

◆ UART_LCRH

◆ UART_MIS

◆ UART_OEINTR

◆ UART_PEINTR

◆ UART_RIINTR

◆ UART_RIS

◆ UART_RSR

◆ UART_RTINTR

◆ UART_RXINTR

◆ UART_TXINTR