gem5 v24.0.0.0
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gem5::PowerISA::TLB Class Reference

#include <tlb.hh>

Inheritance diagram for gem5::PowerISA::TLB:
gem5::BaseTLB gem5::SimObject gem5::EventManager gem5::Serializable gem5::Drainable gem5::statistics::Group gem5::Named

Public Types

typedef PowerTLBParams Params
 
- Public Types inherited from gem5::SimObject
typedef SimObjectParams Params
 

Public Member Functions

 TLB (const Params &p)
 
virtual ~TLB ()
 
void takeOverFrom (BaseTLB *otlb) override
 Take over from an old tlb context.
 
int probeEntry (Addr vpn, uint8_t) const
 
PowerISA::PTEgetEntry (unsigned) const
 
int getsize () const
 
PowerISA::PTEindex (bool advance=true)
 
void insert (Addr vaddr, PowerISA::PTE &pte)
 
void insertAt (PowerISA::PTE &pte, unsigned Index, int _smallPages)
 
void flushAll () override
 Remove all entries from the TLB.
 
void demapPage (Addr vaddr, uint64_t asn) override
 
Fault translateInst (const RequestPtr &req, ThreadContext *tc)
 
Fault translateData (const RequestPtr &req, ThreadContext *tc, bool write)
 
Fault translateAtomic (const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode) override
 
void translateTiming (const RequestPtr &req, ThreadContext *tc, BaseMMU::Translation *translation, BaseMMU::Mode mode) override
 
Fault translateFunctional (const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode) override
 
Fault finalizePhysical (const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode) const override
 Do post-translation physical address finalization.
 
void serialize (CheckpointOut &cp) const override
 Serialize an object.
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object.
 
- Public Member Functions inherited from gem5::BaseTLB
virtual PortgetTableWalkerPort ()
 Get the table walker port if present.
 
void memInvalidate ()
 Invalidate the contents of memory buffers.
 
TypeTLB type () const
 
BaseTLBnextLevel () const
 
- Public Member Functions inherited from gem5::SimObject
const Paramsparams () const
 
 SimObject (const Params &p)
 
virtual ~SimObject ()
 
virtual void init ()
 init() is called after all C++ SimObjects have been created and all ports are connected.
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint.
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint.
 
virtual void regProbePoints ()
 Register probe points for this object.
 
virtual void regProbeListeners ()
 Register probe listeners for this object.
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object.
 
virtual PortgetPort (const std::string &if_name, PortID idx=InvalidPortID)
 Get a port with a given name and index.
 
virtual void startup ()
 startup() is the final initialization call before simulation.
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining.
 
virtual void memWriteback ()
 Write back dirty buffers to memory using functional writes.
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers.
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue.
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section.
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object.
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from gem5::Drainable
DrainState drainState () const
 Return the current drain state of an object.
 
virtual void notifyFork ()
 Notify a child process of a fork.
 
- Public Member Functions inherited from gem5::statistics::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group.
 
virtual ~Group ()
 
virtual void regStats ()
 Callback to set stat parameters.
 
virtual void resetStats ()
 Callback to reset stats.
 
virtual void preDumpStats ()
 Callback before stats are dumped.
 
void addStat (statistics::Info *info)
 Register a stat with this group.
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object.
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object.
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block.
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group.
 
void mergeStatGroup (Group *block)
 Merge the contents (stats & children) of a block to this block.
 
 Group ()=delete
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 

Static Public Member Functions

static bool validVirtualAddress (Addr vaddr)
 
static Fault checkCacheability (const RequestPtr &req)
 
- Static Public Member Functions inherited from gem5::SimObject
static void serializeAll (const std::string &cpt_dir)
 Create a checkpoint by serializing all SimObjects in the system.
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it.
 
static void setSimObjectResolver (SimObjectResolver *resolver)
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.
 
static SimObjectResolvergetSimObjectResolver ()
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section.
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it.
 

Public Attributes

int smallPages
 

Protected Types

typedef std::multimap< Addr, int > PageTable
 

Protected Member Functions

void nextnlu ()
 
PowerISA::PTElookup (Addr vpn, uint8_t asn) const
 
- Protected Member Functions inherited from gem5::BaseTLB
 BaseTLB (const BaseTLBParams &p)
 
- Protected Member Functions inherited from gem5::Drainable
 Drainable ()
 
virtual ~Drainable ()
 
virtual void drainResume ()
 Resume execution after a successful drain.
 
void signalDrainDone () const
 Signal that an object is drained.
 

Protected Attributes

PageTable lookupTable
 
PowerISA::PTEtable
 
int size
 
int nlu
 
- Protected Attributes inherited from gem5::BaseTLB
TypeTLB _type
 
BaseTLB_nextLevel
 
- Protected Attributes inherited from gem5::SimObject
const SimObjectParams & _params
 Cached copy of the object parameters.
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue.
 

Detailed Description

Definition at line 94 of file tlb.hh.

Member Typedef Documentation

◆ PageTable

typedef std::multimap<Addr, int> gem5::PowerISA::TLB::PageTable
protected

Definition at line 97 of file tlb.hh.

◆ Params

typedef PowerTLBParams gem5::PowerISA::TLB::Params

Definition at line 115 of file tlb.hh.

Constructor & Destructor Documentation

◆ TLB()

gem5::PowerISA::TLB::TLB ( const Params & p)

◆ ~TLB()

virtual gem5::PowerISA::TLB::~TLB ( )
virtual

Member Function Documentation

◆ checkCacheability()

Fault gem5::TLB::checkCacheability ( const RequestPtr & req)
inlinestatic

Definition at line 139 of file tlb.cc.

References gem5::NoFault.

◆ demapPage()

void gem5::PowerISA::TLB::demapPage ( Addr vaddr,
uint64_t asn )
inlineoverridevirtual

Implements gem5::BaseTLB.

Definition at line 138 of file tlb.hh.

References panic.

◆ finalizePhysical()

Fault gem5::PowerISA::TLB::finalizePhysical ( const RequestPtr & req,
ThreadContext * tc,
BaseMMU::Mode mode ) const
overridevirtual

Do post-translation physical address finalization.

This method is used by some architectures that need post-translation massaging of physical addresses. For example, X86 uses this to remap physical addresses in the APIC range to a range of physical memory not normally available to real x86 implementations.

Parameters
reqRequest to updated in-place.
tcThread context that created the request.
modeRequest type (read/write/execute).
Returns
A fault on failure, NoFault otherwise.

Implements gem5::BaseTLB.

◆ flushAll()

void gem5::PowerISA::TLB::flushAll ( )
overridevirtual

Remove all entries from the TLB.

Implements gem5::BaseTLB.

◆ getEntry()

PowerISA::PTE * gem5::PowerISA::TLB::getEntry ( unsigned ) const

◆ getsize()

int gem5::PowerISA::TLB::getsize ( ) const
inline

Definition at line 127 of file tlb.hh.

References size.

◆ index()

PowerISA::PTE & gem5::TLB::index ( bool advance = true)

Definition at line 254 of file tlb.cc.

◆ insert()

void gem5::PowerISA::TLB::insert ( Addr vaddr,
PowerISA::PTE & pte )

◆ insertAt()

void gem5::TLB::insertAt ( PowerISA::PTE & pte,
unsigned Index,
int _smallPages )

Definition at line 154 of file tlb.cc.

References gem5::ArmISA::i, and warn.

◆ lookup()

◆ nextnlu()

void gem5::PowerISA::TLB::nextnlu ( )
inlineprotected

Definition at line 105 of file tlb.hh.

References nlu, and size.

◆ probeEntry()

int gem5::PowerISA::TLB::probeEntry ( Addr vpn,
uint8_t  ) const

◆ serialize()

void gem5::PowerISA::TLB::serialize ( CheckpointOut & cp) const
overridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters
cpCheckpoint state

Reimplemented from gem5::SimObject.

◆ takeOverFrom()

void gem5::PowerISA::TLB::takeOverFrom ( BaseTLB * otlb)
inlineoverridevirtual

Take over from an old tlb context.

Implements gem5::BaseTLB.

Definition at line 119 of file tlb.hh.

◆ translateAtomic()

Fault gem5::PowerISA::TLB::translateAtomic ( const RequestPtr & req,
ThreadContext * tc,
BaseMMU::Mode mode )
overridevirtual

Implements gem5::BaseTLB.

◆ translateData()

Fault gem5::PowerISA::TLB::translateData ( const RequestPtr & req,
ThreadContext * tc,
bool write )

◆ translateFunctional()

Fault gem5::PowerISA::TLB::translateFunctional ( const RequestPtr & req,
ThreadContext * tc,
BaseMMU::Mode mode )
overridevirtual

Reimplemented from gem5::BaseTLB.

◆ translateInst()

Fault gem5::PowerISA::TLB::translateInst ( const RequestPtr & req,
ThreadContext * tc )

◆ translateTiming()

void gem5::PowerISA::TLB::translateTiming ( const RequestPtr & req,
ThreadContext * tc,
BaseMMU::Translation * translation,
BaseMMU::Mode mode )
overridevirtual

Implements gem5::BaseTLB.

◆ unserialize()

void gem5::PowerISA::TLB::unserialize ( CheckpointIn & cp)
overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters
cpCheckpoint state

Reimplemented from gem5::SimObject.

◆ validVirtualAddress()

static bool gem5::PowerISA::TLB::validVirtualAddress ( Addr vaddr)
static

Member Data Documentation

◆ lookupTable

PageTable gem5::PowerISA::TLB::lookupTable
protected

Definition at line 98 of file tlb.hh.

◆ nlu

int gem5::PowerISA::TLB::nlu
protected

Definition at line 102 of file tlb.hh.

Referenced by nextnlu().

◆ size

int gem5::PowerISA::TLB::size
protected

Definition at line 101 of file tlb.hh.

Referenced by getsize(), and nextnlu().

◆ smallPages

int gem5::PowerISA::TLB::smallPages

Definition at line 124 of file tlb.hh.

◆ table

PowerISA::PTE* gem5::PowerISA::TLB::table
protected

Definition at line 100 of file tlb.hh.


The documentation for this class was generated from the following files:

Generated on Tue Jun 18 2024 16:24:20 for gem5 by doxygen 1.11.0