gem5  v21.1.0.2
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gem5::o3::LSQUnit Class Reference

Class that implements the actual LQ and SQ for each specific thread. More...

#include <lsq_unit.hh>

Classes

class  LQSenderState
 Particularisation of the LSQSenderState to the LQ. More...
 
class  LSQEntry
 
struct  LSQUnitStats
 
class  SQEntry
 
class  SQSenderState
 Particularisation of the LSQSenderState to the SQ. More...
 
class  WritebackEvent
 Writeback event, specifically for when stores forward data to loads. More...
 

Public Types

using LSQSenderState = LSQ::LSQSenderState
 
using LSQRequest = LSQ::LSQRequest
 
using LoadQueue = CircularQueue< LQEntry >
 
using StoreQueue = CircularQueue< SQEntry >
 
typedef CircularQueue< LQEntry >::iterator LQIterator
 
typedef CircularQueue< SQEntry >::iterator SQIterator
 
typedef CircularQueue< LQEntryLQueue
 
typedef CircularQueue< SQEntrySQueue
 

Public Member Functions

 LSQUnit (uint32_t lqEntries, uint32_t sqEntries)
 Constructs an LSQ unit. More...
 
 LSQUnit (const LSQUnit &l)
 We cannot copy LSQUnit because it has stats for which copy contructor is deleted explicitly. More...
 
void init (CPU *cpu_ptr, IEW *iew_ptr, const O3CPUParams &params, LSQ *lsq_ptr, unsigned id)
 Initializes the LSQ unit with the specified number of entries. More...
 
std::string name () const
 Returns the name of the LSQ unit. More...
 
void setDcachePort (RequestPort *dcache_port)
 Sets the pointer to the dcache port. More...
 
void drainSanityCheck () const
 Perform sanity checks after a drain. More...
 
void takeOverFrom ()
 Takes over from another CPU's thread. More...
 
void insert (const DynInstPtr &inst)
 Inserts an instruction. More...
 
void insertLoad (const DynInstPtr &load_inst)
 Inserts a load instruction. More...
 
void insertStore (const DynInstPtr &store_inst)
 Inserts a store instruction. More...
 
Fault checkViolations (typename LoadQueue::iterator &loadIt, const DynInstPtr &inst)
 Check for ordering violations in the LSQ. More...
 
void checkSnoop (PacketPtr pkt)
 Check if an incoming invalidate hits in the lsq on a load that might have issued out of order wrt another load beacuse of the intermediate invalidate. More...
 
Fault executeLoad (const DynInstPtr &inst)
 Executes a load instruction. More...
 
Fault executeLoad (int lq_idx)
 
Fault executeStore (const DynInstPtr &inst)
 Executes a store instruction. More...
 
void commitLoad ()
 Commits the head load. More...
 
void commitLoads (InstSeqNum &youngest_inst)
 Commits loads older than a specific sequence number. More...
 
void commitStores (InstSeqNum &youngest_inst)
 Commits stores older than a specific sequence number. More...
 
void writebackStores ()
 Writes back stores. More...
 
void completeDataAccess (PacketPtr pkt)
 Completes the data access that has been returned from the memory system. More...
 
void squash (const InstSeqNum &squashed_num)
 Squashes all instructions younger than a specific sequence number. More...
 
bool violation ()
 Returns if there is a memory ordering violation. More...
 
DynInstPtr getMemDepViolator ()
 Returns the memory ordering violator. More...
 
unsigned numFreeLoadEntries ()
 Returns the number of free LQ entries. More...
 
unsigned numFreeStoreEntries ()
 Returns the number of free SQ entries. More...
 
int numLoads ()
 Returns the number of loads in the LQ. More...
 
int numStores ()
 Returns the number of stores in the SQ. More...
 
int numHtmStarts () const
 
int numHtmStops () const
 
void resetHtmStartsStops ()
 
uint64_t getLatestHtmUid () const
 
void setLastRetiredHtmUid (uint64_t htm_uid)
 
bool isFull ()
 Returns if either the LQ or SQ is full. More...
 
bool isEmpty () const
 Returns if both the LQ and SQ are empty. More...
 
bool lqFull ()
 Returns if the LQ is full. More...
 
bool sqFull ()
 Returns if the SQ is full. More...
 
bool lqEmpty () const
 Returns if the LQ is empty. More...
 
bool sqEmpty () const
 Returns if the SQ is empty. More...
 
unsigned getCount ()
 Returns the number of instructions in the LSQ. More...
 
bool hasStoresToWB ()
 Returns if there are any stores to writeback. More...
 
int numStoresToWB ()
 Returns the number of stores to writeback. More...
 
bool willWB ()
 Returns if the LSQ unit will writeback on this cycle. More...
 
void recvRetry ()
 Handles doing the retry. More...
 
unsigned int cacheLineSize ()
 
bool trySendPacket (bool isLoad, PacketPtr data_pkt)
 Attempts to send a packet to the cache. More...
 
void dumpInsts () const
 Debugging function to dump instructions in the LSQ. More...
 
void schedule (Event &ev, Tick when)
 Schedule event for the cpu. More...
 
BaseMMUgetMMUPtr ()
 
bool recvTimingResp (PacketPtr pkt)
 Handles writing back and completing the load or store that has returned from memory. More...
 
Fault read (LSQRequest *req, int load_idx)
 Executes the load at the given index. More...
 
Fault write (LSQRequest *req, uint8_t *data, int store_idx)
 Executes the store at the given index. More...
 
int getLoadHead ()
 Returns the index of the head load instruction. More...
 
InstSeqNum getLoadHeadSeqNum ()
 Returns the sequence number of the head load instruction. More...
 
int getStoreHead ()
 Returns the index of the head store instruction. More...
 
InstSeqNum getStoreHeadSeqNum ()
 Returns the sequence number of the head store instruction. More...
 
bool isStalled ()
 Returns whether or not the LSQ unit is stalled. More...
 

Public Attributes

CircularQueue< SQEntrystoreQueue
 The store queue. More...
 
LoadQueue loadQueue
 The load queue. More...
 

Static Public Attributes

static constexpr auto MaxDataBytes = MaxVecRegLenInBytes
 

Protected Attributes

gem5::o3::LSQUnit::LSQUnitStats stats
 

Private Types

enum  AddrRangeCoverage { AddrRangeCoverage::PartialAddrRangeCoverage, AddrRangeCoverage::FullAddrRangeCoverage, AddrRangeCoverage::NoAddrRangeCoverage }
 Coverage of one address range with another. More...
 
using LQEntry = LSQEntry
 

Private Member Functions

void resetState ()
 Reset the LSQ state. More...
 
void writeback (const DynInstPtr &inst, PacketPtr pkt)
 Writes back the instruction, sending it to IEW. More...
 
void writebackBlockedStore ()
 Try to finish a previously blocked write back attempt. More...
 
void completeStore (typename StoreQueue::iterator store_idx)
 Completes the store at the specified index. More...
 
void storePostSend ()
 Handles completing the send of a store to memory. More...
 

Private Attributes

CPUcpu
 Pointer to the CPU. More...
 
IEWiewStage
 Pointer to the IEW stage. More...
 
LSQlsq
 Pointer to the LSQ. More...
 
RequestPortdcachePort
 Pointer to the dcache port. More...
 
ThreadID lsqID
 The LSQUnit thread id. More...
 
unsigned depCheckShift
 The number of places to shift addresses in the LSQ before checking for dependency violations. More...
 
bool checkLoads
 Should loads be checked for dependency issues. More...
 
int loads
 The number of load instructions in the LQ. More...
 
int stores
 The number of store instructions in the SQ. More...
 
int storesToWB
 The number of store instructions in the SQ waiting to writeback. More...
 
int htmStarts
 
int htmStops
 
uint64_t lastRetiredHtmUid
 
StoreQueue::iterator storeWBIt
 The index of the first instruction that may be ready to be written back, and has not yet been written back. More...
 
Addr cacheBlockMask
 Address Mask for a cache block (e.g. More...
 
TimeBuffer< IssueStruct >::wire fromIssue
 Wire to read information from the issue stage time queue. More...
 
bool stalled
 Whether or not the LSQ is stalled. More...
 
InstSeqNum stallingStoreIsn
 The store that causes the stall due to partial store to load forwarding. More...
 
int stallingLoadIdx
 The index of the above store. More...
 
PacketPtr retryPkt
 The packet that needs to be retried. More...
 
bool isStoreBlocked
 Whehter or not a store is blocked due to the memory system. More...
 
bool storeInFlight
 Whether or not a store is in flight. More...
 
DynInstPtr memDepViolator
 The oldest load that caused a memory ordering violation. More...
 
bool needsTSO
 Flag for memory model. More...
 

Detailed Description

Class that implements the actual LQ and SQ for each specific thread.

Both are circular queues; load entries are freed upon committing, while store entries are freed once they writeback. The LSQUnit tracks if there are memory ordering violations, and also detects partial load to store forwarding cases (a store only has part of a load's data) that requires the load to wait until the store writes back. In the former case it holds onto the instruction until the dependence unit looks at it, and in the latter it stalls the LSQ until the store writes back. At that point the load is replayed.

Definition at line 90 of file lsq_unit.hh.

Member Typedef Documentation

◆ LoadQueue

Definition at line 211 of file lsq_unit.hh.

◆ LQEntry

Definition at line 200 of file lsq_unit.hh.

◆ LQIterator

Definition at line 604 of file lsq_unit.hh.

◆ LQueue

Definition at line 606 of file lsq_unit.hh.

◆ LSQRequest

Definition at line 96 of file lsq_unit.hh.

◆ LSQSenderState

Definition at line 95 of file lsq_unit.hh.

◆ SQIterator

Definition at line 605 of file lsq_unit.hh.

◆ SQueue

Definition at line 607 of file lsq_unit.hh.

◆ StoreQueue

Definition at line 212 of file lsq_unit.hh.

Member Enumeration Documentation

◆ AddrRangeCoverage

Coverage of one address range with another.

Enumerator
PartialAddrRangeCoverage 
FullAddrRangeCoverage 
NoAddrRangeCoverage 

Definition at line 203 of file lsq_unit.hh.

Constructor & Destructor Documentation

◆ LSQUnit() [1/2]

gem5::o3::LSQUnit::LSQUnit ( uint32_t  lqEntries,
uint32_t  sqEntries 
)

Constructs an LSQ unit.

init() must be called prior to use.

Definition at line 203 of file lsq_unit.cc.

◆ LSQUnit() [2/2]

gem5::o3::LSQUnit::LSQUnit ( const LSQUnit l)
inline

We cannot copy LSQUnit because it has stats for which copy contructor is deleted explicitly.

However, STL vector requires a valid copy constructor for the base type at compile time.

Definition at line 222 of file lsq_unit.hh.

References panic.

Member Function Documentation

◆ cacheLineSize()

unsigned int gem5::o3::LSQUnit::cacheLineSize ( )

Definition at line 1299 of file lsq_unit.cc.

References gem5::BaseCPU::cacheLineSize(), and cpu.

◆ checkSnoop()

void gem5::o3::LSQUnit::checkSnoop ( PacketPtr  pkt)

◆ checkViolations()

Fault gem5::o3::LSQUnit::checkViolations ( typename LoadQueue::iterator &  loadIt,
const DynInstPtr inst 
)

Check for ordering violations in the LSQ.

For a store squash if we ever find a conflicting load. For a load, only squash if we an external snoop invalidate has been seen for that load address

Parameters
load_idxindex to start checking at
instthe instruction to check
Todo:
in theory you only need to check an instruction that has executed however, there isn't a good way in the pipeline at the moment to check all instructions that will execute before the store writes back. Thus, like the implementation that came before it, we're overly conservative.

Definition at line 524 of file lsq_unit.cc.

References depCheckShift, DPRINTF, gem5::CircularQueue< T >::end(), loadQueue, memDepViolator, gem5::o3::LSQUnit::LSQUnitStats::memOrderViolation, gem5::NoFault, and stats.

Referenced by executeLoad(), and executeStore().

◆ commitLoad()

void gem5::o3::LSQUnit::commitLoad ( )

◆ commitLoads()

void gem5::o3::LSQUnit::commitLoads ( InstSeqNum youngest_inst)

Commits loads older than a specific sequence number.

Definition at line 746 of file lsq_unit.cc.

References commitLoad(), gem5::CircularQueue< T >::front(), loadQueue, and loads.

◆ commitStores()

void gem5::o3::LSQUnit::commitStores ( InstSeqNum youngest_inst)

Commits stores older than a specific sequence number.

Definition at line 757 of file lsq_unit.cc.

References DPRINTF, gem5::CircularQueue< T >::front(), storeQueue, stores, storesToWB, and gem5::RiscvISA::x.

◆ completeDataAccess()

void gem5::o3::LSQUnit::completeDataAccess ( PacketPtr  pkt)

◆ completeStore()

void gem5::o3::LSQUnit::completeStore ( typename StoreQueue::iterator  store_idx)
private

◆ drainSanityCheck()

void gem5::o3::LSQUnit::drainSanityCheck ( ) const

Perform sanity checks after a drain.

Definition at line 298 of file lsq_unit.cc.

References gem5::CircularQueue< T >::capacity(), gem5::ArmISA::i, loadQueue, retryPkt, and storesToWB.

◆ dumpInsts()

void gem5::o3::LSQUnit::dumpInsts ( ) const

Debugging function to dump instructions in the LSQ.

Definition at line 1271 of file lsq_unit.cc.

References gem5::cprintf(), gem5::ArmISA::e, loadQueue, loads, storeQueue, and stores.

◆ executeLoad() [1/2]

Fault gem5::o3::LSQUnit::executeLoad ( const DynInstPtr inst)

Executes a load instruction.

Definition at line 604 of file lsq_unit.cc.

References gem5::o3::IEW::activityThisCycle(), checkLoads, checkViolations(), DPRINTF, iewStage, gem5::o3::IEW::instToCommit(), and gem5::NoFault.

◆ executeLoad() [2/2]

Fault gem5::o3::LSQUnit::executeLoad ( int  lq_idx)
inline

Definition at line 268 of file lsq_unit.hh.

References gem5::NoFault, and panic.

◆ executeStore()

Fault gem5::o3::LSQUnit::executeStore ( const DynInstPtr inst)

Executes a store instruction.

Definition at line 670 of file lsq_unit.cc.

References checkViolations(), DPRINTF, gem5::NoFault, storeQueue, stores, and storesToWB.

◆ getCount()

unsigned gem5::o3::LSQUnit::getCount ( )
inline

Returns the number of instructions in the LSQ.

Definition at line 341 of file lsq_unit.hh.

References loads, and stores.

◆ getLatestHtmUid()

uint64_t gem5::o3::LSQUnit::getLatestHtmUid ( ) const

◆ getLoadHead()

int gem5::o3::LSQUnit::getLoadHead ( )
inline

Returns the index of the head load instruction.

Definition at line 591 of file lsq_unit.hh.

References gem5::CircularQueue< T >::head(), and loadQueue.

◆ getLoadHeadSeqNum()

InstSeqNum gem5::o3::LSQUnit::getLoadHeadSeqNum ( )

Returns the sequence number of the head load instruction.

Definition at line 1657 of file lsq_unit.cc.

References gem5::CircularQueue< T >::front(), and loadQueue.

◆ getMemDepViolator()

DynInstPtr gem5::o3::LSQUnit::getMemDepViolator ( )

Returns the memory ordering violator.

Definition at line 413 of file lsq_unit.cc.

References memDepViolator.

◆ getMMUPtr()

BaseMMU * gem5::o3::LSQUnit::getMMUPtr ( )

Definition at line 1296 of file lsq_unit.cc.

References cpu, and gem5::o3::CPU::mmu.

◆ getStoreHead()

int gem5::o3::LSQUnit::getStoreHead ( )
inline

Returns the index of the head store instruction.

Definition at line 597 of file lsq_unit.hh.

References gem5::CircularQueue< T >::head(), and storeQueue.

◆ getStoreHeadSeqNum()

InstSeqNum gem5::o3::LSQUnit::getStoreHeadSeqNum ( )

Returns the sequence number of the head store instruction.

Definition at line 1666 of file lsq_unit.cc.

References gem5::CircularQueue< T >::front(), and storeQueue.

◆ hasStoresToWB()

bool gem5::o3::LSQUnit::hasStoresToWB ( )
inline

Returns if there are any stores to writeback.

Definition at line 344 of file lsq_unit.hh.

References storesToWB.

◆ init()

void gem5::o3::LSQUnit::init ( CPU cpu_ptr,
IEW iew_ptr,
const O3CPUParams &  params,
LSQ lsq_ptr,
unsigned  id 
)

Initializes the LSQ unit with the specified number of entries.

Definition at line 214 of file lsq_unit.cc.

References gem5::statistics::Group::addStatGroup(), checkLoads, cpu, gem5::csprintf(), depCheckShift, DPRINTF, gem5::ArmISA::id, iewStage, lsq, lsqID, needsTSO, resetState(), and stats.

◆ insert()

void gem5::o3::LSQUnit::insert ( const DynInstPtr inst)

Inserts an instruction.

Definition at line 314 of file lsq_unit.cc.

References insertLoad(), and insertStore().

◆ insertLoad()

void gem5::o3::LSQUnit::insertLoad ( const DynInstPtr load_inst)

◆ insertStore()

void gem5::o3::LSQUnit::insertStore ( const DynInstPtr store_inst)

◆ isEmpty()

bool gem5::o3::LSQUnit::isEmpty ( ) const
inline

Returns if both the LQ and SQ are empty.

Definition at line 326 of file lsq_unit.hh.

References lqEmpty(), and sqEmpty().

◆ isFull()

bool gem5::o3::LSQUnit::isFull ( )
inline

Returns if either the LQ or SQ is full.

Definition at line 323 of file lsq_unit.hh.

References lqFull(), and sqFull().

◆ isStalled()

bool gem5::o3::LSQUnit::isStalled ( )
inline

Returns whether or not the LSQ unit is stalled.

Definition at line 602 of file lsq_unit.hh.

References stalled.

Referenced by completeStore(), squash(), and storePostSend().

◆ lqEmpty()

bool gem5::o3::LSQUnit::lqEmpty ( ) const
inline

Returns if the LQ is empty.

Definition at line 335 of file lsq_unit.hh.

References loads.

Referenced by isEmpty().

◆ lqFull()

bool gem5::o3::LSQUnit::lqFull ( )
inline

Returns if the LQ is full.

Definition at line 329 of file lsq_unit.hh.

References gem5::CircularQueue< T >::full(), and loadQueue.

Referenced by isFull().

◆ name()

std::string gem5::o3::LSQUnit::name ( ) const

Returns the name of the LSQ unit.

Definition at line 256 of file lsq_unit.cc.

References iewStage, lsqID, gem5::o3::MaxThreads, gem5::o3::IEW::name(), and sc_dt::to_string().

◆ numFreeLoadEntries()

unsigned gem5::o3::LSQUnit::numFreeLoadEntries ( )

Returns the number of free LQ entries.

Definition at line 423 of file lsq_unit.cc.

References gem5::CircularQueue< T >::capacity(), DPRINTF, loadQueue, and loads.

◆ numFreeStoreEntries()

unsigned gem5::o3::LSQUnit::numFreeStoreEntries ( )

Returns the number of free SQ entries.

Definition at line 433 of file lsq_unit.cc.

References gem5::CircularQueue< T >::capacity(), DPRINTF, storeQueue, and stores.

◆ numHtmStarts()

int gem5::o3::LSQUnit::numHtmStarts ( ) const
inline

Definition at line 311 of file lsq_unit.hh.

References htmStarts.

◆ numHtmStops()

int gem5::o3::LSQUnit::numHtmStops ( ) const
inline

Definition at line 312 of file lsq_unit.hh.

References htmStops.

◆ numLoads()

int gem5::o3::LSQUnit::numLoads ( )
inline

Returns the number of loads in the LQ.

Definition at line 305 of file lsq_unit.hh.

References loads.

◆ numStores()

int gem5::o3::LSQUnit::numStores ( )
inline

Returns the number of stores in the SQ.

Definition at line 308 of file lsq_unit.hh.

References stores.

◆ numStoresToWB()

int gem5::o3::LSQUnit::numStoresToWB ( )
inline

Returns the number of stores to writeback.

Definition at line 347 of file lsq_unit.hh.

References storesToWB.

◆ read()

Fault gem5::o3::LSQUnit::read ( LSQRequest req,
int  load_idx 
)

Executes the load at the given index.

Definition at line 1305 of file lsq_unit.cc.

References gem5::o3::LSQ::LSQRequest::_numOutstandingPackets, gem5::o3::IEW::blockMemInst(), gem5::o3::LSQ::LSQRequest::buildPackets(), gem5::Clocked::clockEdge(), cpu, gem5::curTick(), gem5::RefCountingPtr< T >::data, gem5::Packet::dataStatic(), gem5::o3::LSQ::LSQRequest::discard(), gem5::o3::LSQ::LSQRequest::discardSenderState(), DPRINTF, gem5::o3::LSQUnit::LSQUnitStats::forwLoads, FullAddrRangeCoverage, gem5::RefCountingPtr< T >::get(), gem5::Packet::getAddr(), gem5::CircularQueue< T >::getIterator(), gem5::ArmISA::handleLockedRead(), gem5::CircularQueue< T >::head(), iewStage, gem5::o3::LSQ::LSQSenderState::inst, gem5::o3::LSQUnit::LSQEntry::instruction(), gem5::o3::LSQ::LSQRequest::isAnyOutstandingRequest(), gem5::o3::LSQ::LSQSenderState::isLoad, gem5::o3::LSQ::LSQRequest::isSent(), gem5::o3::LSQ::LSQSenderState::isSplit, gem5::o3::LSQ::LSQRequest::isSplit(), loadQueue, lsqID, gem5::o3::LSQ::LSQRequest::mainRequest(), gem5::Packet::makeResponse(), MaxDataBytes, gem5::Request::NO_ACCESS, NoAddrRangeCoverage, gem5::NoFault, panic, PartialAddrRangeCoverage, gem5::MemCmd::ReadReq, gem5::Packet::req, gem5::o3::LSQUnit::LSQUnitStats::rescheduledLoads, gem5::o3::IEW::rescheduleMemInst(), gem5::EventManager::schedule(), gem5::o3::LSQ::LSQRequest::senderState(), gem5::o3::LSQ::LSQRequest::sendPacketToCache(), gem5::Packet::setHtmTransactional(), gem5::o3::LSQUnit::LSQEntry::setRequest(), stalled, stallingLoadIdx, stallingStoreIsn, stats, storeQueue, storeWBIt, and gem5::o3::CPU::tcBase().

◆ recvRetry()

void gem5::o3::LSQUnit::recvRetry ( )

Handles doing the retry.

Definition at line 1262 of file lsq_unit.cc.

References DPRINTF, isStoreBlocked, and writebackBlockedStore().

◆ recvTimingResp()

bool gem5::o3::LSQUnit::recvTimingResp ( PacketPtr  pkt)

Handles writing back and completing the load or store that has returned from memory.

Parameters
pktResponse packet from the memory sub-system

Definition at line 94 of file lsq_unit.cc.

References gem5::o3::LSQ::LSQRequest::recvTimingResp(), gem5::o3::LSQ::LSQRequest::request(), and gem5::Packet::senderState.

◆ resetHtmStartsStops()

void gem5::o3::LSQUnit::resetHtmStartsStops ( )
inline

Definition at line 313 of file lsq_unit.hh.

References htmStarts, and htmStops.

◆ resetState()

void gem5::o3::LSQUnit::resetState ( )
private

◆ schedule()

void gem5::o3::LSQUnit::schedule ( Event ev,
Tick  when 
)

Schedule event for the cpu.

Definition at line 1294 of file lsq_unit.cc.

References cpu, and gem5::EventManager::schedule().

◆ setDcachePort()

void gem5::o3::LSQUnit::setDcachePort ( RequestPort dcache_port)

Sets the pointer to the dcache port.

Definition at line 292 of file lsq_unit.cc.

References dcachePort.

◆ setLastRetiredHtmUid()

void gem5::o3::LSQUnit::setLastRetiredHtmUid ( uint64_t  htm_uid)
inline

Definition at line 316 of file lsq_unit.hh.

References lastRetiredHtmUid.

◆ sqEmpty()

bool gem5::o3::LSQUnit::sqEmpty ( ) const
inline

Returns if the SQ is empty.

Definition at line 338 of file lsq_unit.hh.

References stores.

Referenced by isEmpty().

◆ sqFull()

bool gem5::o3::LSQUnit::sqFull ( )
inline

Returns if the SQ is full.

Definition at line 332 of file lsq_unit.hh.

References gem5::CircularQueue< T >::full(), and storeQueue.

Referenced by isFull().

◆ squash()

void gem5::o3::LSQUnit::squash ( const InstSeqNum squashed_num)

◆ storePostSend()

void gem5::o3::LSQUnit::storePostSend ( )
private

Handles completing the send of a store to memory.

Definition at line 1062 of file lsq_unit.cc.

References gem5::o3::CPU::checker, cpu, DPRINTF, iewStage, isStalled(), loadQueue, needsTSO, gem5::o3::IEW::replayMemInst(), stalled, stallingLoadIdx, stallingStoreIsn, storeInFlight, and storeWBIt.

Referenced by writebackBlockedStore(), and writebackStores().

◆ takeOverFrom()

void gem5::o3::LSQUnit::takeOverFrom ( )

Takes over from another CPU's thread.

Definition at line 308 of file lsq_unit.cc.

References resetState().

◆ trySendPacket()

bool gem5::o3::LSQUnit::trySendPacket ( bool  isLoad,
PacketPtr  data_pkt 
)

Attempts to send a packet to the cache.

Check if there are ports available. Return true if there are, false if there are not.

Definition at line 1219 of file lsq_unit.cc.

References gem5::o3::LSQUnit::LSQUnitStats::blockedByCache, gem5::o3::LSQ::cacheBlocked(), gem5::o3::LSQ::cachePortAvailable(), gem5::o3::LSQ::cachePortBusy(), dcachePort, DPRINTF, isStoreBlocked, lsq, gem5::Packet::print(), gem5::Packet::senderState, gem5::RequestPort::sendTimingReq(), stats, and storeWBIt.

◆ violation()

bool gem5::o3::LSQUnit::violation ( )
inline

Returns if there is a memory ordering violation.

Value is reset upon call to getMemDepViolator().

Definition at line 293 of file lsq_unit.hh.

References memDepViolator.

◆ willWB()

bool gem5::o3::LSQUnit::willWB ( )
inline

Returns if the LSQ unit will writeback on this cycle.

Definition at line 351 of file lsq_unit.hh.

References isStoreBlocked, and storeWBIt.

◆ write()

Fault gem5::o3::LSQUnit::write ( LSQRequest req,
uint8_t *  data,
int  store_idx 
)

◆ writeback()

void gem5::o3::LSQUnit::writeback ( const DynInstPtr inst,
PacketPtr  pkt 
)
private

◆ writebackBlockedStore()

void gem5::o3::LSQUnit::writebackBlockedStore ( )
private

Try to finish a previously blocked write back attempt.

Definition at line 783 of file lsq_unit.cc.

References isStoreBlocked, storePostSend(), and storeWBIt.

Referenced by recvRetry(), and writebackStores().

◆ writebackStores()

void gem5::o3::LSQUnit::writebackStores ( )

Member Data Documentation

◆ cacheBlockMask

Addr gem5::o3::LSQUnit::cacheBlockMask
private

Address Mask for a cache block (e.g.

~(cache_block_size-1))

Definition at line 519 of file lsq_unit.hh.

Referenced by checkSnoop(), resetState(), and writebackStores().

◆ checkLoads

bool gem5::o3::LSQUnit::checkLoads
private

Should loads be checked for dependency issues.

Definition at line 497 of file lsq_unit.hh.

Referenced by executeLoad(), and init().

◆ cpu

CPU* gem5::o3::LSQUnit::cpu
private

◆ dcachePort

RequestPort* gem5::o3::LSQUnit::dcachePort
private

Pointer to the dcache port.

Used only for sending.

Definition at line 407 of file lsq_unit.hh.

Referenced by setDcachePort(), and trySendPacket().

◆ depCheckShift

unsigned gem5::o3::LSQUnit::depCheckShift
private

The number of places to shift addresses in the LSQ before checking for dependency violations.

Definition at line 494 of file lsq_unit.hh.

Referenced by checkViolations(), and init().

◆ fromIssue

TimeBuffer<IssueStruct>::wire gem5::o3::LSQUnit::fromIssue
private

Wire to read information from the issue stage time queue.

Definition at line 522 of file lsq_unit.hh.

◆ htmStarts

int gem5::o3::LSQUnit::htmStarts
private

Definition at line 508 of file lsq_unit.hh.

Referenced by insertLoad(), numHtmStarts(), resetHtmStartsStops(), resetState(), and squash().

◆ htmStops

int gem5::o3::LSQUnit::htmStops
private

Definition at line 509 of file lsq_unit.hh.

Referenced by insertLoad(), numHtmStops(), resetHtmStartsStops(), resetState(), and squash().

◆ iewStage

IEW* gem5::o3::LSQUnit::iewStage
private

Pointer to the IEW stage.

Definition at line 401 of file lsq_unit.hh.

Referenced by completeStore(), executeLoad(), init(), name(), read(), storePostSend(), and writeback().

◆ isStoreBlocked

bool gem5::o3::LSQUnit::isStoreBlocked
private

Whehter or not a store is blocked due to the memory system.

Definition at line 537 of file lsq_unit.hh.

Referenced by recvRetry(), trySendPacket(), willWB(), writebackBlockedStore(), and writebackStores().

◆ lastRetiredHtmUid

uint64_t gem5::o3::LSQUnit::lastRetiredHtmUid
private

Definition at line 511 of file lsq_unit.hh.

Referenced by setLastRetiredHtmUid(), and squash().

◆ loadQueue

LoadQueue gem5::o3::LSQUnit::loadQueue

◆ loads

int gem5::o3::LSQUnit::loads
private

The number of load instructions in the LQ.

Definition at line 500 of file lsq_unit.hh.

Referenced by commitLoad(), commitLoads(), dumpInsts(), getCount(), insertLoad(), lqEmpty(), numFreeLoadEntries(), numLoads(), resetState(), and squash().

◆ lsq

LSQ* gem5::o3::LSQUnit::lsq
private

Pointer to the LSQ.

Definition at line 404 of file lsq_unit.hh.

Referenced by init(), trySendPacket(), and writebackStores().

◆ lsqID

ThreadID gem5::o3::LSQUnit::lsqID
private

The LSQUnit thread id.

Definition at line 482 of file lsq_unit.hh.

Referenced by getLatestHtmUid(), init(), insertLoad(), name(), read(), squash(), and writebackStores().

◆ MaxDataBytes

constexpr auto gem5::o3::LSQUnit::MaxDataBytes = MaxVecRegLenInBytes
staticconstexpr

Definition at line 93 of file lsq_unit.hh.

Referenced by read().

◆ memDepViolator

DynInstPtr gem5::o3::LSQUnit::memDepViolator
private

The oldest load that caused a memory ordering violation.

Definition at line 543 of file lsq_unit.hh.

Referenced by checkViolations(), getMemDepViolator(), resetState(), squash(), and violation().

◆ needsTSO

bool gem5::o3::LSQUnit::needsTSO
private

Flag for memory model.

Definition at line 546 of file lsq_unit.hh.

Referenced by checkSnoop(), completeStore(), init(), storePostSend(), and writebackStores().

◆ retryPkt

PacketPtr gem5::o3::LSQUnit::retryPkt
private

The packet that needs to be retried.

Definition at line 534 of file lsq_unit.hh.

Referenced by drainSanityCheck(), and resetState().

◆ stalled

bool gem5::o3::LSQUnit::stalled
private

Whether or not the LSQ is stalled.

Definition at line 525 of file lsq_unit.hh.

Referenced by completeStore(), isStalled(), read(), resetState(), squash(), and storePostSend().

◆ stallingLoadIdx

int gem5::o3::LSQUnit::stallingLoadIdx
private

The index of the above store.

Definition at line 531 of file lsq_unit.hh.

Referenced by completeStore(), read(), squash(), and storePostSend().

◆ stallingStoreIsn

InstSeqNum gem5::o3::LSQUnit::stallingStoreIsn
private

The store that causes the stall due to partial store to load forwarding.

Definition at line 529 of file lsq_unit.hh.

Referenced by completeStore(), read(), squash(), and storePostSend().

◆ stats

gem5::o3::LSQUnit::LSQUnitStats gem5::o3::LSQUnit::stats
protected

◆ storeInFlight

bool gem5::o3::LSQUnit::storeInFlight
private

Whether or not a store is in flight.

Definition at line 540 of file lsq_unit.hh.

Referenced by completeStore(), storePostSend(), and writebackStores().

◆ storeQueue

CircularQueue<SQEntry> gem5::o3::LSQUnit::storeQueue

◆ stores

int gem5::o3::LSQUnit::stores
private

The number of store instructions in the SQ.

Definition at line 502 of file lsq_unit.hh.

Referenced by commitStores(), completeStore(), dumpInsts(), executeStore(), getCount(), insertStore(), numFreeStoreEntries(), numStores(), resetState(), sqEmpty(), squash(), and writebackStores().

◆ storesToWB

int gem5::o3::LSQUnit::storesToWB
private

The number of store instructions in the SQ waiting to writeback.

Definition at line 504 of file lsq_unit.hh.

Referenced by commitStores(), completeStore(), drainSanityCheck(), executeStore(), hasStoresToWB(), numStoresToWB(), resetState(), and writebackStores().

◆ storeWBIt

StoreQueue::iterator gem5::o3::LSQUnit::storeWBIt
private

The index of the first instruction that may be ready to be written back, and has not yet been written back.

Definition at line 516 of file lsq_unit.hh.

Referenced by read(), resetState(), storePostSend(), trySendPacket(), willWB(), writebackBlockedStore(), and writebackStores().


The documentation for this class was generated from the following files:

Generated on Tue Sep 21 2021 12:31:46 for gem5 by doxygen 1.8.17