43#include "debug/RubyQueue.hh"
45#include "mem/ruby/protocol/MemoryMsg.hh"
58 m_clusterID(
p.cluster_id),
59 m_id(
p.
system->getRequestorId(this)), m_is_blocking(false),
60 m_number_of_TBEs(
p.number_of_TBEs),
61 m_transitions_per_cycle(
p.transitions_per_cycle),
62 m_buffer_size(
p.buffer_size), m_recycle_latency(
p.recycle_latency),
63 m_mandatory_queue_latency(
p.mandatory_queue_latency),
64 m_waiting_mem_retry(false),
65 m_mem_ctrl_waiting_retry(false),
67 addrRanges(
p.addr_ranges.begin(),
p.addr_ranges.end()),
68 mRetryRespEvent{*this, false},
83 for (uint32_t
i = 0;
i < size;
i++) {
100 for (
auto abs_cntrl :
params().downstream_destinations) {
101 MachineID mid = abs_cntrl->getMachineID();
103 for (
const auto &addr_range : ranges) {
106 (
i->second.intersects(addr_range) !=
i->second.end())) {
107 fatal(
"%s: %s mapped to multiple machines of the same type\n",
108 name(), addr_range.to_string());
118 for (
auto abs_cntrl :
params().upstream_destinations) {
128 for (uint32_t
i = 0;
i < size;
i++) {
167 bool has_other_msgs =
false;
169 for (
unsigned int port = 0; port < msgVec->size(); ++port) {
170 if ((*msgVec)[port] == buf) {
172 (*msgVec)[port] = NULL;
173 }
else if ((*msgVec)[port] != NULL) {
174 has_other_msgs =
true;
177 if (!has_other_msgs) {
239 for (MsgVecType::iterator vec_iter = buf_iter->second->begin();
240 vec_iter != buf_iter->second->end();
245 if (*vec_iter != NULL &&
246 (wokeUpMsgBufs.count(*vec_iter) == 0)) {
247 (*vec_iter)->reanalyzeAllMessages(
clockEdge());
248 wokeUpMsgBufs.insert(*vec_iter);
251 wokeUpMsgVecs.push_back(buf_iter->second);
255 wb_iter != wokeUpMsgVecs.end();
273 const MemoryMsg *mem_msg = (
const MemoryMsg*)mem_queue->peek();
275 if (mem_msg->m_Len > 0) {
276 req_size = mem_msg->m_Len;
280 = std::make_shared<Request>(mem_msg->m_addr, req_size, 0,
m_id);
282 if (mem_msg->getType() == MemoryRequestType_MEMORY_WB) {
287 }
else if (mem_msg->getType() == MemoryRequestType_MEMORY_READ) {
289 uint8_t *newData =
new uint8_t[req_size];
292 panic(
"Unknown memory request type (%s) for addr %p",
293 MemoryRequestType_to_string(mem_msg->getType()),
369 int num_functional_writes = 0;
373 return num_functional_writes + 1;
383 if (!memRspQueue->areNSlotsAvailable(1,
curTick())) {
390 std::shared_ptr<MemoryMsg> msg =
392 (*msg).m_addr = pkt->
getAddr();
396 (*msg).m_OriginalRequestorMachId =
s->
id;
400 (*msg).m_Type = MemoryRequestType_MEMORY_READ;
401 (*msg).m_MessageSize = MessageSizeType_Response_Data;
404 (*msg).m_DataBlk.setData(pkt->
getPtr<uint8_t>(), 0,
407 (*msg).m_Type = MemoryRequestType_MEMORY_WB;
408 (*msg).m_MessageSize = MessageSizeType_Writeback_Control;
410 panic(
"Incorrect packet type received from memory controller!");
437 if (mtype == MachineType_NUM) {
440 const auto mapping =
i.second.contains(
addr);
441 if (mapping !=
i.second.end())
442 return mapping->second;
448 const auto mapping =
i->second.contains(
addr);
449 if (mapping !=
i->second.end())
450 return mapping->second;
453 fatal(
"%s: couldn't find mapping for address %x mtype=%s\n",
506 for (
NodeID i = 0;
i < type_count;
i++) {
529 controller->m_waiting_mem_retry =
false;
530 controller->serviceMemoryQueue();
542 : statistics::
Group(parent),
544 "cycles for which number of transistions == max transitions"),
545 ADD_STAT(delayHistogram,
"delay_histogram")
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
ClockedObjectParams Params
Parameters of ClockedObject.
Tick clockEdge(Cycles cycles=Cycles(0)) const
Determine the tick when a cycle begins, by default the current one, but the argument also enables the...
Tick cyclesToTicks(Cycles c) const
Cycles ticksToCycles(Tick t) const
Cycles is a wrapper class for representing cycle counts, i.e.
virtual std::string name() const
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
static PacketPtr createWrite(const RequestPtr &req)
SenderState * senderState
This packet's sender state.
void pushSenderState(SenderState *sender_state)
Push a new sender state to the packet and make the current sender state the predecessor of the new on...
T * getPtr()
get a pointer to the data ptr.
void setData(const uint8_t *p)
Copy data into the packet from the provided pointer.
static PacketPtr createRead(const RequestPtr &req)
Constructor-like methods that return Packets based on Request objects.
void dataDynamic(T *p)
Set the data pointer to a value that should have delete [] called on it.
void allocate()
Allocate memory for the packet.
Ports are used to interface objects to each other.
A RequestPort is a specialisation of a Port, which implements the default protocol for the three diff...
virtual void sendRetryResp()
Send a retry to the response port that previously attempted a sendTimingResp to this request port and...
Tick sendAtomic(PacketPtr pkt)
Send an atomic request packet, where the data is moved and the state is updated in zero time,...
bool sendTimingReq(PacketPtr pkt)
Attempt to send a timing request to the responder port by calling its corresponding receive function.
void sendFunctional(PacketPtr pkt) const
Send a functional request packet, where the data is instantly updated everywhere in the memory system...
MemoryPort(const std::string &_name, AbstractController *_controller, PortID id=InvalidPortID)
bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
void recvReqRetry()
Called by the peer if sendTimingReq was called on this peer (causing recvTimingReq to be called on th...
AbstractController * controller
bool m_mem_ctrl_waiting_retry
std::vector< MessageBuffer * > MsgVecType
bool recvTimingResp(PacketPtr pkt)
void profileMsgDelay(uint32_t virtualNetwork, Cycles delay)
Profiles the delay associated with messages.
NetDest upstreamDestinations
Addr getOffset(Addr addr) const
void dequeueMemRespQueue()
RubySystem * m_ruby_system
void wakeUpBuffer(MessageBuffer *buf, Addr addr)
void functionalMemoryRead(PacketPtr)
int functionalMemoryWrite(PacketPtr)
virtual void regStats()
Callback to set stat parameters.
Tick recvAtomic(PacketPtr pkt)
std::unordered_map< MachineType, AddrRangeMap< MachineID, 3 > > downstreamAddrMap
virtual MessageBuffer * getMemReqQueue() const =0
std::set< MessageBuffer * > MsgBufType
unsigned int m_cur_in_port
void wakeUpBuffers(Addr addr)
MachineID mapAddressToDownstreamMachine(Addr addr, MachineType mtype=MachineType_NUM) const
Maps an address to the correct dowstream MachineID (i.e.
virtual void collateStats()
Function for collating statistics from all the controllers of this particular type.
NetDest broadcast(MachineType type)
virtual MessageBuffer * getMemRespQueue() const =0
AbstractController(const Params &p)
NetDest downstreamDestinations
void init()
init() is called after all C++ SimObjects have been created and all ports are connected.
void memRespQueueDequeued()
MemberEventWrapper<&AbstractController::sendRetryRespToMem > mRetryRespEvent
bool isBlocked(Addr) const
virtual void resetStats()=0
Callback to reset stats.
void blockOnQueue(Addr, MessageBuffer *)
MachineID mapAddressToMachine(Addr addr, MachineType mtype) const
Map an address to the correct MachineID.
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
A function used to return the port associated with this bus object.
gem5::ruby::AbstractController::ControllerStats stats
std::map< Addr, MessageBuffer * > m_block_map
WaitingBufType m_waiting_buffers
Addr makeLineAddress(Addr addr) const
void sendRetryRespToMem()
bool serviceMemoryQueue()
int machineCount(MachineType machType)
void stallBuffer(MessageBuffer *buf, Addr addr)
std::string printAddress(Addr addr) const
void scheduleEvent(Cycles timeDelta)
void setConsumer(Consumer *consumer)
bool functionalRead(Packet *pkt)
void reanalyzeMessages(Addr addr, Tick current_time)
void add(MachineID newElement)
void setRubySystem(RubySystem *rs)
static uint32_t getNumberOfVirtualNetworks()
NodeID addressToNodeID(Addr addr, MachineType mtype)
Map an address to the correct NodeID.
uint32_t getBlockSizeBits()
uint32_t getBlockSizeBytes()
int MachineType_base_count(const MachineType &obj)
Derived & flags(Flags _flags)
Set the flags and marks this stat to print at the end of simulation.
void sample(const U &v, int n=1)
Add a value to the distribtion n times.
void reset()
Reset stat value to default.
Histogram & init(size_type size)
Set the parameters of this histogram.
#define ADD_STAT(n,...)
Convenience macro to add a stat to a statistics group.
bool scheduled() const
Determine if the current event is scheduled.
void schedule(Event &event, Tick when)
#define panic(...)
This implements a cprintf based panic() function.
#define gem5_assert(cond,...)
The assert macro will function like a normal assert, but will use panic instead of straight abort().
#define fatal(...)
This implements a cprintf based fatal() function.
const Params & params() const
static SimObject * find(const char *name)
Find the SimObject with the given name and return a pointer to it.
virtual void regStats()
Callback to set stat parameters.
virtual void resetStats()
Callback to reset stats.
Addr makeLineAddress(Addr addr, int cacheLineBits)
std::string printAddress(Addr addr, int cacheLineBits)
Addr getOffset(Addr addr, int cacheLineBits)
void registerDumpCallback(const std::function< void()> &callback)
Register a callback that should be called whenever statistics are about to be dumped.
const FlagsType nozero
Don't print if this is zero.
Copyright (c) 2024 Arm Limited All rights reserved.
std::shared_ptr< Request > RequestPtr
Tick curTick()
The universal simulation clock.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
uint64_t Tick
Tick count type.
std::string csprintf(const char *format, const Args &...args)
statistics::Scalar fullyBusyCycles
Counter for the number of cycles when the transitions carried out were equal to the maximum allowed.
ControllerStats(statistics::Group *parent)
statistics::Histogram delayHistogram
Histogram for profiling delay for the messages this controller cares for.
std::vector< statistics::Histogram * > delayVCHistogram
MachineType getType() const
const std::string & name()