gem5 v24.0.0.0
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#include <fvp_base_pwr_ctrl.hh>
Classes | |
struct | Registers |
Public Member Functions | |
FVPBasePwrCtrl (const FVPBasePwrCtrlParams ¶ms) | |
void | setStandByWfi (ThreadContext *const tc) |
Triggered by the ISA when a WFI instruction is executed and (1) there are no pending interrupts and (2) it is not trapped. | |
void | clearStandByWfi (ThreadContext *const tc) |
Triggered when an interrupt is posted to the core. | |
bool | setWakeRequest (ThreadContext *const tc) |
Triggered by the GIC when GICR_WAKER.ProcessorSleep is 1 and there are pending interrupts for the core. | |
void | clearWakeRequest (ThreadContext *const tc) |
Triggered by the GIC when GICR_WAKER.ProcessorSleep becomes 0. | |
void | startup () override |
startup() is the final initialization call before simulation. | |
Public Member Functions inherited from gem5::BasicPioDevice | |
PARAMS (BasicPioDevice) | |
BasicPioDevice (const Params &p, Addr size) | |
AddrRangeList | getAddrRanges () const override |
Determine the address ranges that this device responds to. | |
Public Member Functions inherited from gem5::PioDevice | |
PioDevice (const Params &p) | |
virtual | ~PioDevice () |
void | init () override |
init() is called after all C++ SimObjects have been created and all ports are connected. | |
Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
Get a port with a given name and index. | |
Public Member Functions inherited from gem5::ClockedObject | |
ClockedObject (const ClockedObjectParams &p) | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. | |
Public Member Functions inherited from gem5::SimObject | |
const Params & | params () const |
SimObject (const Params &p) | |
virtual | ~SimObject () |
virtual void | loadState (CheckpointIn &cp) |
loadState() is called on each SimObject when restoring from a checkpoint. | |
virtual void | initState () |
initState() is called on each SimObject when not restoring from a checkpoint. | |
virtual void | regProbePoints () |
Register probe points for this object. | |
virtual void | regProbeListeners () |
Register probe listeners for this object. | |
ProbeManager * | getProbeManager () |
Get the probe manager for this object. | |
DrainState | drain () override |
Provide a default implementation of the drain interface for objects that don't need draining. | |
virtual void | memWriteback () |
Write back dirty buffers to memory using functional writes. | |
virtual void | memInvalidate () |
Invalidate the contents of memory buffers. | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. | |
Public Member Functions inherited from gem5::EventManager | |
EventQueue * | eventQueue () const |
void | schedule (Event &event, Tick when) |
void | deschedule (Event &event) |
void | reschedule (Event &event, Tick when, bool always=false) |
void | schedule (Event *event, Tick when) |
void | deschedule (Event *event) |
void | reschedule (Event *event, Tick when, bool always=false) |
void | wakeupEventQueue (Tick when=(Tick) -1) |
This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. | |
void | setCurTick (Tick newVal) |
EventManager (EventManager &em) | |
Event manger manages events in the event queue. | |
EventManager (EventManager *em) | |
EventManager (EventQueue *eq) | |
Public Member Functions inherited from gem5::Serializable | |
Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Member Functions inherited from gem5::Drainable | |
DrainState | drainState () const |
Return the current drain state of an object. | |
virtual void | notifyFork () |
Notify a child process of a fork. | |
Public Member Functions inherited from gem5::statistics::Group | |
Group (Group *parent, const char *name=nullptr) | |
Construct a new statistics group. | |
virtual | ~Group () |
virtual void | regStats () |
Callback to set stat parameters. | |
virtual void | resetStats () |
Callback to reset stats. | |
virtual void | preDumpStats () |
Callback before stats are dumped. | |
void | addStat (statistics::Info *info) |
Register a stat with this group. | |
const std::map< std::string, Group * > & | getStatGroups () const |
Get all child groups associated with this object. | |
const std::vector< Info * > & | getStats () const |
Get all stats associated with this object. | |
void | addStatGroup (const char *name, Group *block) |
Add a stat block as a child of this block. | |
const Info * | resolveStat (std::string name) const |
Resolve a stat by its name within this group. | |
void | mergeStatGroup (Group *block) |
Merge the contents (stats & children) of a block to this block. | |
Group ()=delete | |
Group (const Group &)=delete | |
Group & | operator= (const Group &)=delete |
Public Member Functions inherited from gem5::Named | |
Named (const std::string &name_) | |
virtual | ~Named ()=default |
virtual std::string | name () const |
Public Member Functions inherited from gem5::Clocked | |
void | updateClockPeriod () |
Update the tick to the current tick. | |
Tick | clockEdge (Cycles cycles=Cycles(0)) const |
Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. | |
Cycles | curCycle () const |
Determine the current cycle, corresponding to a tick aligned to a clock edge. | |
Tick | nextCycle () const |
Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. | |
uint64_t | frequency () const |
Tick | clockPeriod () const |
double | voltage () const |
Cycles | ticksToCycles (Tick t) const |
Tick | cyclesToTicks (Cycles c) const |
Protected Member Functions | |
Tick | read (PacketPtr pkt) override |
Pure virtual function that the device must implement. | |
Tick | write (PacketPtr pkt) override |
Pure virtual function that the device must implement. | |
Protected Member Functions inherited from gem5::Drainable | |
Drainable () | |
virtual | ~Drainable () |
virtual void | drainResume () |
Resume execution after a successful drain. | |
void | signalDrainDone () const |
Signal that an object is drained. | |
Protected Member Functions inherited from gem5::Clocked | |
Clocked (ClockDomain &clk_domain) | |
Create a clocked object and set the clock domain based on the parameters. | |
Clocked (Clocked &)=delete | |
Clocked & | operator= (Clocked &)=delete |
virtual | ~Clocked () |
Virtual destructor due to inheritance. | |
void | resetClock () const |
Reset the object's clock using the current global tick value. | |
virtual void | clockPeriodUpdated () |
A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. | |
Private Types | |
enum | { WK_COLD , WK_RESET , WK_PPONR , WK_GICWR } |
Wake-up reasons. More... | |
Private Member Functions | |
BitUnion32 (PwrStatus) Bitfield< 30 > l1 | |
PwrStatus * | getCorePwrStatus (ThreadContext *const tc) |
Retrieves the power status of a certain core and resizes the entries if needed. | |
ThreadContext * | getThreadContextByMPID (uint32_t mpid) const |
Retrieves the thread context reference for a CPU core by MPID. | |
void | powerCoreOn (ThreadContext *const tc, PwrStatus *const pwrs) |
Powers on a core. | |
void | powerCoreOff (ThreadContext *const tc, PwrStatus *const pwrs) |
Powers off a core. | |
void | startCoreUp (ThreadContext *const tc) |
Starts a core up. | |
Private Attributes | |
Bitfield< 29 > | l0 |
Bitfield< 28 > | wen |
Bitfield< 27 > | pc |
Bitfield< 26 > | pp |
Bitfield< 25, 24 > | wk |
Bitfield< 1 > | pwfi |
Bitfield< 0 > | pwk |
EndBitUnion(PwrStatus) enum Offset struct gem5::FVPBasePwrCtrl::Registers | regs |
std::vector< PwrStatus > | corePwrStatus |
Per-core power status. | |
std::unordered_map< uint32_t, size_t > | poweredCoresPerCluster |
Number of powered cores per cluster. | |
ArmSystem & | system |
Reference to the arm system. | |
Static Private Attributes | |
static constexpr uint32_t | MPID_MSK = 0x00ffffff |
Mask for extracting the MPID from a 32-bit value. | |
Additional Inherited Members | |
Public Types inherited from gem5::PioDevice | |
using | Params = PioDeviceParams |
Public Types inherited from gem5::ClockedObject | |
using | Params = ClockedObjectParams |
Parameters of ClockedObject. | |
Public Types inherited from gem5::SimObject | |
typedef SimObjectParams | Params |
Static Public Member Functions inherited from gem5::SimObject | |
static void | serializeAll (const std::string &cpt_dir) |
Create a checkpoint by serializing all SimObjects in the system. | |
static SimObject * | find (const char *name) |
Find the SimObject with the given name and return a pointer to it. | |
static void | setSimObjectResolver (SimObjectResolver *resolver) |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
static SimObjectResolver * | getSimObjectResolver () |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
Static Public Member Functions inherited from gem5::Serializable | |
static const std::string & | currentSection () |
Gets the fully-qualified name of the active section. | |
static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
Generate a checkpoint file so that the serialization can be routed to it. | |
Public Attributes inherited from gem5::ClockedObject | |
PowerState * | powerState |
Protected Attributes inherited from gem5::BasicPioDevice | |
Addr | pioAddr |
Address that the device listens to. | |
Addr | pioSize |
Size that the device's address range. | |
Tick | pioDelay |
Delay that the device experinces on an access. | |
Protected Attributes inherited from gem5::PioDevice | |
System * | sys |
PioPort< PioDevice > | pioPort |
The pioPort that handles the requests for us and provides us requests that it sees. | |
Protected Attributes inherited from gem5::SimObject | |
const SimObjectParams & | _params |
Cached copy of the object parameters. | |
Protected Attributes inherited from gem5::EventManager | |
EventQueue * | eventq |
A pointer to this object's event queue. | |
Definition at line 58 of file fvp_base_pwr_ctrl.hh.
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Wake-up reasons.
Enumerator | |
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WK_COLD | |
WK_RESET | |
WK_PPONR | |
WK_GICWR |
Definition at line 133 of file fvp_base_pwr_ctrl.hh.
gem5::FVPBasePwrCtrl::FVPBasePwrCtrl | ( | const FVPBasePwrCtrlParams & | params | ) |
Definition at line 53 of file fvp_base_pwr_ctrl.cc.
References gem5::System::multiThread, gem5::ArmSystem::setPowerController(), gem5::PioDevice::sys, system, and warn_if.
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void gem5::FVPBasePwrCtrl::clearStandByWfi | ( | ThreadContext *const | tc | ) |
Triggered when an interrupt is posted to the core.
Core is brought up from quiescent state if it is suspended. The latter is done by BaseCPU::wakeup.
tc | Thread context representing the core |
Definition at line 87 of file fvp_base_pwr_ctrl.cc.
References gem5::ThreadContext::contextId(), DPRINTF, and getCorePwrStatus().
Referenced by startCoreUp().
void gem5::FVPBasePwrCtrl::clearWakeRequest | ( | ThreadContext *const | tc | ) |
Triggered by the GIC when GICR_WAKER.ProcessorSleep becomes 0.
tc | Thread context representing the core |
Definition at line 115 of file fvp_base_pwr_ctrl.cc.
References gem5::ThreadContext::contextId(), DPRINTF, and getCorePwrStatus().
Referenced by startCoreUp().
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Retrieves the power status of a certain core and resizes the entries if needed.
This is a workaround for a limitation of the System object only exposing existing thread contexts after "init()"
Thread | (HW) context in the core |
Definition at line 253 of file fvp_base_pwr_ctrl.cc.
References gem5::ThreadContext::contextId(), corePwrStatus, poweredCoresPerCluster, and gem5::ThreadContext::socketId().
Referenced by clearStandByWfi(), clearWakeRequest(), powerCoreOn(), setStandByWfi(), setWakeRequest(), and write().
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Retrieves the thread context reference for a CPU core by MPID.
mpid | ID provided by software |
Definition at line 261 of file fvp_base_pwr_ctrl.cc.
References gem5::ArmISA::getAffinity(), gem5::PioDevice::sys, system, and gem5::System::threads.
Referenced by write().
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Powers off a core.
The core enters into quiescent state until an explicit PPONR write or a WakeRequest from the GIC wakes it up
Thread | (HW) context in the core |
Core | power status |
Definition at line 290 of file fvp_base_pwr_ctrl.cc.
References gem5::ThreadContext::contextId(), DPRINTF, gem5::ThreadContext::getCpuPtr(), poweredCoresPerCluster, gem5::ClockedObject::powerState, gem5::PowerState::set(), and gem5::ThreadContext::socketId().
Referenced by setStandByWfi(), and write().
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Powers on a core.
A Reset fault is invoked in the core followed by an activation
Thread | (HW) context in the core |
Core | power status |
Definition at line 271 of file fvp_base_pwr_ctrl.cc.
References gem5::ThreadContext::contextId(), DPRINTF, getCorePwrStatus(), gem5::ThreadContext::getCpuPtr(), poweredCoresPerCluster, gem5::ClockedObject::powerState, gem5::PowerState::set(), gem5::ThreadContext::socketId(), gem5::PioDevice::sys, and gem5::System::threads.
Referenced by setWakeRequest(), and write().
Pure virtual function that the device must implement.
Called when a read command is recieved by the port.
pkt | Packet describing this request |
Implements gem5::PioDevice.
Definition at line 126 of file fvp_base_pwr_ctrl.cc.
References gem5::X86ISA::addr, DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getSize(), gem5::Packet::makeResponse(), panic_if, gem5::FVPBasePwrCtrl::Registers::pcoffr, gem5::BasicPioDevice::pioAddr, gem5::BasicPioDevice::pioDelay, gem5::FVPBasePwrCtrl::Registers::ppoffr, gem5::FVPBasePwrCtrl::Registers::pponr, gem5::FVPBasePwrCtrl::Registers::psysr, gem5::FVPBasePwrCtrl::Registers::pwkupr, regs, gem5::Packet::setUintX(), and warn.
void gem5::FVPBasePwrCtrl::setStandByWfi | ( | ThreadContext *const | tc | ) |
Triggered by the ISA when a WFI instruction is executed and (1) there are no pending interrupts and (2) it is not trapped.
Core is set to quiescent state only if there is a pending power off
tc | Thread context representing the core |
Definition at line 74 of file fvp_base_pwr_ctrl.cc.
References gem5::ThreadContext::contextId(), DPRINTF, getCorePwrStatus(), and powerCoreOff().
bool gem5::FVPBasePwrCtrl::setWakeRequest | ( | ThreadContext *const | tc | ) |
Triggered by the GIC when GICR_WAKER.ProcessorSleep is 1 and there are pending interrupts for the core.
tc | Thread context representing the core |
Definition at line 98 of file fvp_base_pwr_ctrl.cc.
References gem5::ThreadContext::contextId(), DPRINTF, getCorePwrStatus(), powerCoreOn(), and WK_GICWR.
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Starts a core up.
This invokes the reset vector to setup the wake-up entrypoint and activates the thread context. This covers cases when PSYSR.WEN is enabled or PPONR is written
Thread | (HW) context in the core |
Definition at line 305 of file fvp_base_pwr_ctrl.cc.
References gem5::ThreadContext::activate(), clearStandByWfi(), clearWakeRequest(), gem5::ThreadContext::contextId(), DPRINTF, and gem5::ArmISA::Reset::invoke().
Referenced by write().
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startup() is the final initialization call before simulation.
All state is initialized (including unserialized state, if any, such as the curTick() value), so this is the appropriate place to schedule initial event(s) for objects that need them.
Reimplemented from gem5::SimObject.
Definition at line 64 of file fvp_base_pwr_ctrl.cc.
References corePwrStatus, poweredCoresPerCluster, gem5::System::Threads::size(), gem5::SimObject::startup(), gem5::PioDevice::sys, and gem5::System::threads.
Pure virtual function that the device must implement.
Called when a write command is recieved by the port.
pkt | Packet describing this request |
Implements gem5::PioDevice.
Definition at line 163 of file fvp_base_pwr_ctrl.cc.
References gem5::X86ISA::addr, gem5::bits(), data, DPRINTF, gem5::Packet::getAddr(), getCorePwrStatus(), gem5::Packet::getSize(), getThreadContextByMPID(), gem5::Packet::getUintX(), gem5::Packet::makeResponse(), MPID_MSK, panic_if, gem5::FVPBasePwrCtrl::Registers::pcoffr, gem5::BasicPioDevice::pioAddr, gem5::BasicPioDevice::pioDelay, powerCoreOff(), powerCoreOn(), gem5::FVPBasePwrCtrl::Registers::ppoffr, gem5::FVPBasePwrCtrl::Registers::pponr, gem5::FVPBasePwrCtrl::Registers::psysr, gem5::FVPBasePwrCtrl::Registers::pwkupr, regs, gem5::ThreadContext::socketId(), startCoreUp(), gem5::PioDevice::sys, gem5::System::threads, warn, WK_GICWR, and WK_PPONR.
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Per-core power status.
This is power related information for each core that is bound to this power controller functionality
Definition at line 139 of file fvp_base_pwr_ctrl.hh.
Referenced by getCorePwrStatus(), and startup().
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Definition at line 103 of file fvp_base_pwr_ctrl.hh.
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Mask for extracting the MPID from a 32-bit value.
Definition at line 131 of file fvp_base_pwr_ctrl.hh.
Referenced by write().
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Definition at line 105 of file fvp_base_pwr_ctrl.hh.
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Number of powered cores per cluster.
Helps keep track of PSYSR.L1
Definition at line 142 of file fvp_base_pwr_ctrl.hh.
Referenced by getCorePwrStatus(), powerCoreOff(), powerCoreOn(), and startup().
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Definition at line 106 of file fvp_base_pwr_ctrl.hh.
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Definition at line 108 of file fvp_base_pwr_ctrl.hh.
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Definition at line 109 of file fvp_base_pwr_ctrl.hh.
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Reference to the arm system.
Definition at line 185 of file fvp_base_pwr_ctrl.hh.
Referenced by FVPBasePwrCtrl(), and getThreadContextByMPID().
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Definition at line 104 of file fvp_base_pwr_ctrl.hh.
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Definition at line 107 of file fvp_base_pwr_ctrl.hh.