gem5  v21.1.0.2
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gem5::FVPBasePwrCtrl Class Reference

#include <fvp_base_pwr_ctrl.hh>

Inheritance diagram for gem5::FVPBasePwrCtrl:
gem5::BasicPioDevice gem5::PioDevice gem5::ClockedObject gem5::SimObject gem5::Clocked gem5::EventManager gem5::Serializable gem5::Drainable gem5::statistics::Group gem5::Named

Classes

struct  Registers
 

Public Member Functions

 FVPBasePwrCtrl (const FVPBasePwrCtrlParams &params)
 
void setStandByWfi (ThreadContext *const tc)
 Triggered by the ISA when a WFI instruction is executed and (1) there are no pending interrupts and (2) it is not trapped. More...
 
void clearStandByWfi (ThreadContext *const tc)
 Triggered when an interrupt is posted to the core. More...
 
bool setWakeRequest (ThreadContext *const tc)
 Triggered by the GIC when GICR_WAKER.ProcessorSleep is 1 and there are pending interrupts for the core. More...
 
void clearWakeRequest (ThreadContext *const tc)
 Triggered by the GIC when GICR_WAKER.ProcessorSleep becomes 0. More...
 
void startup () override
 startup() is the final initialization call before simulation. More...
 
- Public Member Functions inherited from gem5::BasicPioDevice
 PARAMS (BasicPioDevice)
 
 BasicPioDevice (const Params &p, Addr size)
 
AddrRangeList getAddrRanges () const override
 Determine the address ranges that this device responds to. More...
 
- Public Member Functions inherited from gem5::PioDevice
 PioDevice (const Params &p)
 
virtual ~PioDevice ()
 
void init () override
 init() is called after all C++ SimObjects have been created and all ports are connected. More...
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Get a port with a given name and index. More...
 
- Public Member Functions inherited from gem5::ClockedObject
 ClockedObject (const ClockedObjectParams &p)
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::SimObject
const Paramsparams () const
 
 SimObject (const Params &p)
 
virtual ~SimObject ()
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint. More...
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint. More...
 
virtual void regProbePoints ()
 Register probe points for this object. More...
 
virtual void regProbeListeners ()
 Register probe listeners for this object. More...
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object. More...
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining. More...
 
virtual void memWriteback ()
 Write back dirty buffers to memory using functional writes. More...
 
virtual void memInvalidate ()
 Invalidate the contents of memory buffers. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue. More...
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from gem5::Drainable
DrainState drainState () const
 Return the current drain state of an object. More...
 
virtual void notifyFork ()
 Notify a child process of a fork. More...
 
- Public Member Functions inherited from gem5::statistics::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group. More...
 
virtual ~Group ()
 
virtual void regStats ()
 Callback to set stat parameters. More...
 
virtual void resetStats ()
 Callback to reset stats. More...
 
virtual void preDumpStats ()
 Callback before stats are dumped. More...
 
void addStat (statistics::Info *info)
 Register a stat with this group. More...
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object. More...
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object. More...
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block. More...
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group. More...
 
void mergeStatGroup (Group *block)
 Merge the contents (stats & children) of a block to this block. More...
 
 Group ()=delete
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 
- Public Member Functions inherited from gem5::Clocked
void updateClockPeriod ()
 Update the tick to the current tick. More...
 
Tick clockEdge (Cycles cycles=Cycles(0)) const
 Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...
 
Cycles curCycle () const
 Determine the current cycle, corresponding to a tick aligned to a clock edge. More...
 
Tick nextCycle () const
 Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...
 
uint64_t frequency () const
 
Tick clockPeriod () const
 
double voltage () const
 
Cycles ticksToCycles (Tick t) const
 
Tick cyclesToTicks (Cycles c) const
 

Protected Member Functions

Tick read (PacketPtr pkt) override
 Pure virtual function that the device must implement. More...
 
Tick write (PacketPtr pkt) override
 Pure virtual function that the device must implement. More...
 
- Protected Member Functions inherited from gem5::Drainable
 Drainable ()
 
virtual ~Drainable ()
 
virtual void drainResume ()
 Resume execution after a successful drain. More...
 
void signalDrainDone () const
 Signal that an object is drained. More...
 
- Protected Member Functions inherited from gem5::Clocked
 Clocked (ClockDomain &clk_domain)
 Create a clocked object and set the clock domain based on the parameters. More...
 
 Clocked (Clocked &)=delete
 
Clockedoperator= (Clocked &)=delete
 
virtual ~Clocked ()
 Virtual destructor due to inheritance. More...
 
void resetClock () const
 Reset the object's clock using the current global tick value. More...
 
virtual void clockPeriodUpdated ()
 A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More...
 

Private Types

enum  { WK_COLD, WK_RESET, WK_PPONR, WK_GICWR }
 Wake-up reasons. More...
 

Private Member Functions

 BitUnion32 (PwrStatus) Bitfield< 30 > l1
 
PwrStatus * getCorePwrStatus (ThreadContext *const tc)
 Retrieves the power status of a certain core and resizes the entries if needed. More...
 
ThreadContextgetThreadContextByMPID (uint32_t mpid) const
 Retrieves the thread context reference for a CPU core by MPID. More...
 
void powerCoreOn (ThreadContext *const tc, PwrStatus *const pwrs)
 Powers on a core. More...
 
void powerCoreOff (ThreadContext *const tc, PwrStatus *const pwrs)
 Powers off a core. More...
 
void startCoreUp (ThreadContext *const tc)
 Starts a core up. More...
 

Private Attributes

Bitfield< 29 > l0
 
Bitfield< 28 > wen
 
Bitfield< 27 > pc
 
Bitfield< 26 > pp
 
Bitfield< 25, 24 > wk
 
Bitfield< 1 > pwfi
 
Bitfield< 0 > pwk
 
EndBitUnion(PwrStatus) enum Offset struct gem5::FVPBasePwrCtrl::Registers regs
 
std::vector< PwrStatus > corePwrStatus
 Per-core power status. More...
 
std::unordered_map< uint32_t, size_t > poweredCoresPerCluster
 Number of powered cores per cluster. More...
 
ArmSystemsystem
 Reference to the arm system. More...
 

Static Private Attributes

static constexpr uint32_t MPID_MSK = 0x00ffffff
 Mask for extracting the MPID from a 32-bit value. More...
 

Additional Inherited Members

- Public Types inherited from gem5::PioDevice
using Params = PioDeviceParams
 
- Public Types inherited from gem5::ClockedObject
using Params = ClockedObjectParams
 Parameters of ClockedObject. More...
 
- Public Types inherited from gem5::SimObject
typedef SimObjectParams Params
 
- Static Public Member Functions inherited from gem5::SimObject
static void serializeAll (const std::string &cpt_dir)
 Create a checkpoint by serializing all SimObjects in the system. More...
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it. More...
 
static void setSimObjectResolver (SimObjectResolver *resolver)
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
static SimObjectResolvergetSimObjectResolver ()
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section. More...
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it. More...
 
- Public Attributes inherited from gem5::ClockedObject
PowerStatepowerState
 
- Protected Attributes inherited from gem5::BasicPioDevice
Addr pioAddr
 Address that the device listens to. More...
 
Addr pioSize
 Size that the device's address range. More...
 
Tick pioDelay
 Delay that the device experinces on an access. More...
 
- Protected Attributes inherited from gem5::PioDevice
Systemsys
 
PioPort< PioDevicepioPort
 The pioPort that handles the requests for us and provides us requests that it sees. More...
 
- Protected Attributes inherited from gem5::SimObject
const SimObjectParams & _params
 Cached copy of the object parameters. More...
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue. More...
 

Detailed Description

Definition at line 58 of file fvp_base_pwr_ctrl.hh.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum
private

Wake-up reasons.

Enumerator
WK_COLD 
WK_RESET 
WK_PPONR 
WK_GICWR 

Definition at line 133 of file fvp_base_pwr_ctrl.hh.

Constructor & Destructor Documentation

◆ FVPBasePwrCtrl()

gem5::FVPBasePwrCtrl::FVPBasePwrCtrl ( const FVPBasePwrCtrlParams &  params)

Member Function Documentation

◆ BitUnion32()

gem5::FVPBasePwrCtrl::BitUnion32 ( PwrStatus  )
private

◆ clearStandByWfi()

void gem5::FVPBasePwrCtrl::clearStandByWfi ( ThreadContext *const  tc)

Triggered when an interrupt is posted to the core.

Core is brought up from quiescent state if it is suspended. The latter is done by BaseCPU::wakeup.

Parameters
tcThread context representing the core

Definition at line 87 of file fvp_base_pwr_ctrl.cc.

References gem5::ThreadContext::contextId(), DPRINTF, and getCorePwrStatus().

Referenced by startCoreUp().

◆ clearWakeRequest()

void gem5::FVPBasePwrCtrl::clearWakeRequest ( ThreadContext *const  tc)

Triggered by the GIC when GICR_WAKER.ProcessorSleep becomes 0.

Parameters
tcThread context representing the core

Definition at line 115 of file fvp_base_pwr_ctrl.cc.

References gem5::ThreadContext::contextId(), DPRINTF, and getCorePwrStatus().

Referenced by startCoreUp().

◆ getCorePwrStatus()

FVPBasePwrCtrl::PwrStatus * gem5::FVPBasePwrCtrl::getCorePwrStatus ( ThreadContext *const  tc)
private

Retrieves the power status of a certain core and resizes the entries if needed.

This is a workaround for a limitation of the System object only exposing existing thread contexts after "init()"

Parameters
Thread(HW) context in the core
Returns
Core power status

Definition at line 253 of file fvp_base_pwr_ctrl.cc.

References gem5::ThreadContext::contextId(), corePwrStatus, poweredCoresPerCluster, and gem5::ThreadContext::socketId().

Referenced by clearStandByWfi(), clearWakeRequest(), powerCoreOn(), setStandByWfi(), setWakeRequest(), and write().

◆ getThreadContextByMPID()

ThreadContext * gem5::FVPBasePwrCtrl::getThreadContextByMPID ( uint32_t  mpid) const
private

Retrieves the thread context reference for a CPU core by MPID.

Parameters
mpidID provided by software
Returns
valid thread context reference if valid MPID, nullptr otherwise

Definition at line 261 of file fvp_base_pwr_ctrl.cc.

References gem5::ArmISA::getAffinity(), gem5::PioDevice::sys, system, and gem5::System::threads.

Referenced by write().

◆ powerCoreOff()

void gem5::FVPBasePwrCtrl::powerCoreOff ( ThreadContext *const  tc,
PwrStatus *const  pwrs 
)
private

Powers off a core.

The core enters into quiescent state until an explicit PPONR write or a WakeRequest from the GIC wakes it up

Parameters
Thread(HW) context in the core
Corepower status

Definition at line 290 of file fvp_base_pwr_ctrl.cc.

References gem5::ThreadContext::contextId(), DPRINTF, gem5::ThreadContext::getCpuPtr(), gem5::RiscvISA::OFF, poweredCoresPerCluster, gem5::ClockedObject::powerState, gem5::PowerState::set(), and gem5::ThreadContext::socketId().

Referenced by setStandByWfi(), and write().

◆ powerCoreOn()

void gem5::FVPBasePwrCtrl::powerCoreOn ( ThreadContext *const  tc,
PwrStatus *const  pwrs 
)
private

Powers on a core.

A Reset fault is invoked in the core followed by an activation

Parameters
Thread(HW) context in the core
Corepower status

Definition at line 271 of file fvp_base_pwr_ctrl.cc.

References gem5::ThreadContext::contextId(), DPRINTF, getCorePwrStatus(), gem5::ThreadContext::getCpuPtr(), poweredCoresPerCluster, gem5::ClockedObject::powerState, gem5::PowerState::set(), gem5::ThreadContext::socketId(), gem5::PioDevice::sys, and gem5::System::threads.

Referenced by setWakeRequest(), and write().

◆ read()

Tick gem5::FVPBasePwrCtrl::read ( PacketPtr  pkt)
overrideprotectedvirtual

◆ setStandByWfi()

void gem5::FVPBasePwrCtrl::setStandByWfi ( ThreadContext *const  tc)

Triggered by the ISA when a WFI instruction is executed and (1) there are no pending interrupts and (2) it is not trapped.

Core is set to quiescent state only if there is a pending power off

Parameters
tcThread context representing the core

Definition at line 74 of file fvp_base_pwr_ctrl.cc.

References gem5::ThreadContext::contextId(), DPRINTF, getCorePwrStatus(), and powerCoreOff().

◆ setWakeRequest()

bool gem5::FVPBasePwrCtrl::setWakeRequest ( ThreadContext *const  tc)

Triggered by the GIC when GICR_WAKER.ProcessorSleep is 1 and there are pending interrupts for the core.

Parameters
tcThread context representing the core
Returns
true if the core is powered ON when PwrStatus.WEN is enabled, false otherwise

Definition at line 98 of file fvp_base_pwr_ctrl.cc.

References gem5::ThreadContext::contextId(), DPRINTF, getCorePwrStatus(), powerCoreOn(), and WK_GICWR.

◆ startCoreUp()

void gem5::FVPBasePwrCtrl::startCoreUp ( ThreadContext *const  tc)
private

Starts a core up.

This invokes the reset vector to setup the wake-up entrypoint and activates the thread context. This covers cases when PSYSR.WEN is enabled or PPONR is written

Parameters
Thread(HW) context in the core

Definition at line 305 of file fvp_base_pwr_ctrl.cc.

References gem5::ThreadContext::activate(), clearStandByWfi(), clearWakeRequest(), gem5::ThreadContext::contextId(), DPRINTF, and gem5::ps2::Reset.

Referenced by write().

◆ startup()

void gem5::FVPBasePwrCtrl::startup ( )
overridevirtual

startup() is the final initialization call before simulation.

All state is initialized (including unserialized state, if any, such as the curTick() value), so this is the appropriate place to schedule initial event(s) for objects that need them.

Reimplemented from gem5::SimObject.

Definition at line 64 of file fvp_base_pwr_ctrl.cc.

References corePwrStatus, poweredCoresPerCluster, gem5::System::Threads::size(), gem5::SimObject::startup(), gem5::PioDevice::sys, and gem5::System::threads.

◆ write()

Tick gem5::FVPBasePwrCtrl::write ( PacketPtr  pkt)
overrideprotectedvirtual

Member Data Documentation

◆ corePwrStatus

std::vector<PwrStatus> gem5::FVPBasePwrCtrl::corePwrStatus
private

Per-core power status.

This is power related information for each core that is bound to this power controller functionality

Definition at line 139 of file fvp_base_pwr_ctrl.hh.

Referenced by getCorePwrStatus(), and startup().

◆ l0

Bitfield<29> gem5::FVPBasePwrCtrl::l0
private

Definition at line 103 of file fvp_base_pwr_ctrl.hh.

◆ MPID_MSK

constexpr uint32_t gem5::FVPBasePwrCtrl::MPID_MSK = 0x00ffffff
staticconstexprprivate

Mask for extracting the MPID from a 32-bit value.

Definition at line 131 of file fvp_base_pwr_ctrl.hh.

Referenced by write().

◆ pc

Bitfield<27> gem5::FVPBasePwrCtrl::pc
private

Definition at line 105 of file fvp_base_pwr_ctrl.hh.

◆ poweredCoresPerCluster

std::unordered_map<uint32_t, size_t> gem5::FVPBasePwrCtrl::poweredCoresPerCluster
private

Number of powered cores per cluster.

Helps keep track of PSYSR.L1

Definition at line 142 of file fvp_base_pwr_ctrl.hh.

Referenced by getCorePwrStatus(), powerCoreOff(), powerCoreOn(), and startup().

◆ pp

Bitfield<26> gem5::FVPBasePwrCtrl::pp
private

Definition at line 106 of file fvp_base_pwr_ctrl.hh.

◆ pwfi

Bitfield<1> gem5::FVPBasePwrCtrl::pwfi
private

Definition at line 108 of file fvp_base_pwr_ctrl.hh.

◆ pwk

Bitfield<0> gem5::FVPBasePwrCtrl::pwk
private

Definition at line 109 of file fvp_base_pwr_ctrl.hh.

◆ regs

EndBitUnion (PwrStatus) enum Offset struct gem5::FVPBasePwrCtrl::Registers gem5::FVPBasePwrCtrl::regs
private

Referenced by read(), and write().

◆ system

ArmSystem& gem5::FVPBasePwrCtrl::system
private

Reference to the arm system.

Definition at line 185 of file fvp_base_pwr_ctrl.hh.

Referenced by FVPBasePwrCtrl(), and getThreadContextByMPID().

◆ wen

Bitfield<28> gem5::FVPBasePwrCtrl::wen
private

Definition at line 104 of file fvp_base_pwr_ctrl.hh.

◆ wk

Bitfield<25,24> gem5::FVPBasePwrCtrl::wk
private

Definition at line 107 of file fvp_base_pwr_ctrl.hh.


The documentation for this class was generated from the following files:

Generated on Tue Sep 21 2021 12:27:37 for gem5 by doxygen 1.8.17