gem5  v21.1.0.2
noncaching.cc
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37 
38 #include "cpu/simple/noncaching.hh"
39 
40 #include <cassert>
41 
42 namespace gem5
43 {
44 
45 NonCachingSimpleCPU::NonCachingSimpleCPU(const NonCachingSimpleCPUParams &p)
47 {
48  assert(p.numThreads == 1);
49  fatal_if(!FullSystem && p.workload.size() != 1,
50  "only one workload allowed");
51 }
52 
53 void
55 {
56  if (!(system->isAtomicMode() && system->bypassCaches())) {
57  fatal("The direct CPU requires the memory system to be in the "
58  "'atomic_noncaching' mode.\n");
59  }
60 }
61 
62 Tick
64 {
65  MemBackdoorPtr bd = nullptr;
66  Tick latency = port.sendAtomicBackdoor(pkt, bd);
67 
68  // If the target gave us a backdoor for next time and we didn't
69  // already have it, record it.
70  if (bd && memBackdoors.insert(bd->range(), bd) != memBackdoors.end()) {
71  // Install a callback to erase this backdoor if it goes away.
72  auto callback = [this](const MemBackdoor &backdoor) {
73  for (auto it = memBackdoors.begin();
74  it != memBackdoors.end(); it++) {
75  if (it->second == &backdoor) {
76  memBackdoors.erase(it);
77  return;
78  }
79  }
80  panic("Got invalidation for unknown memory backdoor.");
81  };
82  bd->addInvalidationCallback(callback);
83  }
84  return latency;
85 }
86 
87 Tick
89 {
90  auto bd_it = memBackdoors.contains(ifetch_req->getPaddr());
91  if (bd_it == memBackdoors.end())
93 
94  auto &decoder = threadInfo[curThread]->thread->decoder;
95 
96  auto *bd = bd_it->second;
97  Addr offset = ifetch_req->getPaddr() - bd->range().start();
98  memcpy(decoder.moreBytesPtr(), bd->ptr() + offset, ifetch_req->getSize());
99  return 0;
100 }
101 
102 } // namespace gem5
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:189
gem5::BaseSimpleCPU::threadInfo
std::vector< SimpleExecContext * > threadInfo
Definition: base.hh:100
gem5::NonCachingSimpleCPU::fetchInstMem
Tick fetchInstMem() override
Definition: noncaching.cc:88
gem5::System::isAtomicMode
bool isAtomicMode() const
Is the system in atomic mode?
Definition: system.hh:264
gem5::System::bypassCaches
bool bypassCaches() const
Should caches be bypassed?
Definition: system.hh:285
gem5::BaseCPU::system
System * system
Definition: base.hh:376
gem5::PowerISA::bd
Bitfield< 15, 2 > bd
Definition: types.hh:79
gem5::NonCachingSimpleCPU::verifyMemoryMode
void verifyMemoryMode() const override
Verify that the system is in a memory mode supported by the CPU.
Definition: noncaching.cc:54
gem5::RequestPort
A RequestPort is a specialisation of a Port, which implements the default protocol for the three diff...
Definition: port.hh:77
gem5::RequestPort::sendAtomicBackdoor
Tick sendAtomicBackdoor(PacketPtr pkt, MemBackdoorPtr &backdoor)
Send an atomic request packet like above, but also request a backdoor to the data being accessed.
Definition: port.hh:474
gem5::AtomicSimpleCPU
Definition: atomic.hh:53
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::AtomicSimpleCPU::fetchInstMem
virtual Tick fetchInstMem()
Definition: atomic.cc:744
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::ArmISA::offset
Bitfield< 23, 0 > offset
Definition: types.hh:144
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::NonCachingSimpleCPU::memBackdoors
AddrRangeMap< MemBackdoorPtr, 1 > memBackdoors
Definition: noncaching.hh:61
gem5::MemBackdoor
Definition: backdoor.hh:41
gem5::FullSystem
bool FullSystem
The FullSystem variable can be used to determine the current mode of simulation.
Definition: root.cc:223
noncaching.hh
gem5::AtomicSimpleCPU::ifetch_req
RequestPtr ifetch_req
Definition: atomic.hh:165
decoder
output decoder
Definition: nop.cc:61
gem5::NonCachingSimpleCPU::NonCachingSimpleCPU
NonCachingSimpleCPU(const NonCachingSimpleCPUParams &p)
Definition: noncaching.cc:45
fatal_if
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition: logging.hh:225
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::BaseSimpleCPU::curThread
ThreadID curThread
Definition: base.hh:83
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:177
gem5::NonCachingSimpleCPU::sendPacket
Tick sendPacket(RequestPort &port, const PacketPtr &pkt) override
Definition: noncaching.cc:63

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