44 #include "debug/Plic.hh"
47 #include "params/Plic.hh"
53 using namespace RiscvISA;
59 nContext(params.n_contexts),
60 registers(params.
name, pioAddr, this),
69 assert(src_id < nSrc && src_id >= 0);
72 int src_index = src_id >> 5;
73 int src_offset = src_id & 0x1F;
76 std::bitset<32> pending_bits(pending);
77 pending_bits[src_offset] = 1;
78 pending = (uint32_t) pending_bits.to_ulong();
87 "Int post request - source: %#x, current priority: %#x\n",
98 assert(src_id <
nSrc);
102 int src_index = src_id >> 5;
103 int src_offset = src_id & 0x1F;
105 std::bitset<32> pending_bits(pending);
106 pending_bits[src_offset] = 0;
107 pending = (uint32_t) pending_bits.to_ulong();
115 "Int clear request - source: %#x, current priority: %#x\n",
128 "Read request - addr: %#x, size: %#x, atomic:%d\n",
148 "Write request - addr: %#x, size: %#x\n",
188 "Device init - %d contexts, %d sources, %d pending registers\n",
197 using namespace std::placeholders;
201 reserved.emplace_back(
"reserved0", reserve0_size);
204 reserved.emplace_back(
"reserved1", reserve1_size);
207 reserved.emplace_back(
"reserved2", reserve2_size);
210 reserved.emplace_back(
"reserved3", reserve3_size);
297 int src_index = src_id >> 5;
298 int src_offset = src_id & 0x1F;
310 "Priority updated - src: %d, val: %d\n",
316 const int src32_id,
const int context_id)
320 for (
int i = 0;
i < 32;
i ++) {
321 int src_id = (src32_id << 5) +
i;
328 "Enable updated - context: %d, src32: %d, val: %#x\n",
329 context_id, src32_id,
reg.get());
334 const int context_id)
337 "Threshold updated - context: %d, val: %d\n",
338 context_id,
reg.get());
344 if (
lastID[context_id] == 0) {
347 int src_index = max_int_id >> 5;
348 int src_offset = max_int_id & 0x1F;
352 lastID[context_id] = max_int_id;
354 "Claim success - context: %d, interrupt ID: %d\n",
355 context_id, max_int_id);
357 reg.update(max_int_id);
361 "Claim already cleared - context: %d, interrupt ID: %d\n",
362 context_id, max_int_id);
366 warn(
"PLIC claim repeated (not completed) - context: %d, last: %d",
367 context_id,
lastID[context_id]);
368 return lastID[context_id];
384 "Complete - context: %d, interrupt ID: %d\n",
385 context_id,
reg.get());
397 uint32_t max_priority;
402 new_output.maxID[
i] = max_id;
403 new_output.maxPriority[
i] = max_priority;
416 DPRINTF(
Plic,
"Update scheduled - tick: %d\n", next_update);
444 int thread_id =
i >> 1;
445 int int_id = (
i & 1) ?
453 DPRINTF(
Plic,
"Int posted - thread: %d, int id: %d, ",
456 tc->getCpuPtr()->postInterrupt(tc->threadId(), int_id, 0);
459 DPRINTF(
Plic,
"Int filtered - thread: %d, int id: %d, ",
463 tc->getCpuPtr()->clearInterrupt(tc->threadId(), int_id, 0);
480 for (
auto const ®_inner:
reg) {
481 paramOut(cp, reg_inner.name(), reg_inner);
491 paramOut(cp, std::string(
"output_tick") +
523 for (
auto ®_inner:
reg) {
524 paramIn(cp, reg_inner.name(), reg_inner);
533 for (
int i = 0;
i < n_outputs;
i++) {
537 paramIn(cp, std::string(
"output_tick") +
Tick pioDelay
Delay that the device experinces on an access.
Addr pioSize
Size that the device's address range.
Tick cyclesToTicks(Cycles c) const
Cycles is a wrapper class for representing cycle counts, i.e.
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
T * getPtr()
get a pointer to the data ptr.
AtomicOpFunctor * getAtomicOp() const
Accessor function to atomic op.
void makeResponse()
Take a request packet and modify it in place to be suitable for returning as a response to that reque...
MemCmd cmd
The command field of the packet.
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
std::vector< Register32 > priority
const Addr thresholdPadding
std::vector< Register32 > pending
std::vector< RegisterRaz > enable_holes
const Addr thresholdStart
std::vector< Register32 > threshold
std::vector< std::vector< Register32 > > enable
std::vector< RegisterRaz > reserved
std::vector< RegisterRaz > claim_holes
std::vector< Register32 > claim
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
std::vector< uint32_t > lastID
int nContext
Number of interrupt contexts = nThread * 2 e.g.
std::map< Tick, PlicOutput > outputQueue
void updateOutput()
Trigger:
gem5::Plic::PlicRegisters registers
Plic(const Params ¶ms)
EventFunctionWrapper update
Tick read(PacketPtr pkt) override
PioDevice funcitons.
void post(int src_id)
Interrupt interface.
PlicRegisters::Register32 Register32
void writeEnable(Register32 ®, const uint32_t &data, const int src32_id, const int context_id)
void unserialize(CheckpointIn &cp) override
Unserialize an object.
void writeThreshold(Register32 ®, const uint32_t &data, const int context_id)
uint32_t readClaim(Register32 ®, const int context_id)
std::vector< std::vector< uint32_t > > effPriority
void propagateOutput()
Trigger:
int nSrc32
Number of 32-bit pending registers needed = ceil(nSrc / 32)
void init() override
SimObject functions.
std::vector< uint32_t > pendingPriority
void writeClaim(Register32 ®, const uint32_t &data, const int context_id)
void serialize(CheckpointOut &cp) const override
Serialize an object.
void writePriority(Register32 ®, const uint32_t &data, const int src_id)
Register read / write callbacks.
void addRegister(RegisterBase ®)
virtual void read(Addr addr, void *buf, Addr bytes)
virtual void write(Addr addr, const void *buf, Addr bytes)
static constexpr T divCeil(const T &a, const U &b)
constexpr T bits(T val, unsigned first, unsigned last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
bool scheduled() const
Determine if the current event is scheduled.
void schedule(Event &event, Tick when)
#define UNSERIALIZE_CONTAINER(member)
decltype(std::begin(std::declval< const T & >()), std::end(std::declval< const T & >()), void()) arrayParamOut(CheckpointOut &os, const std::string &name, const T ¶m)
#define SERIALIZE_CONTAINER(member)
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Tick curTick()
The universal simulation clock.
std::ostream CheckpointOut
void paramOut(CheckpointOut &cp, const std::string &name, ExtMachInst const &machInst)
void paramIn(CheckpointIn &cp, const std::string &name, ExtMachInst &machInst)
uint64_t Tick
Tick count type.
void arrayParamIn(CheckpointIn &cp, const std::string &name, CircleBuf< T > ¶m)
const std::string to_string(sc_enc enc)
Declaration of the Packet class.
#define UNSERIALIZE_SCALAR(scalar)
#define SERIALIZE_SCALAR(scalar)
NOTE: This implementation of CLINT is based on the SiFive U54MC datasheet: https://sifive....
std::vector< uint32_t > maxPriority
std::vector< uint32_t > maxID
const std::string & name()