gem5 v24.0.0.0
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#include <plic.hh>
Classes | |
class | PlicRegisters |
MMIO Registers. More... | |
Public Types | |
typedef PlicParams | Params |
Public Types inherited from gem5::PlicBase | |
typedef PlicBaseParams | Params |
Public Types inherited from gem5::PioDevice | |
using | Params = PioDeviceParams |
Public Types inherited from gem5::ClockedObject | |
using | Params = ClockedObjectParams |
Parameters of ClockedObject. | |
Public Types inherited from gem5::SimObject | |
typedef SimObjectParams | Params |
Public Member Functions | |
Plic (const Params ¶ms) | |
void | post (int src_id) override |
Interrupt interface. | |
void | clear (int src_id) override |
void | init () override |
SimObject functions. | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. | |
Public Member Functions inherited from gem5::PlicBase | |
PlicBase (const Params ¶ms) | |
Public Member Functions inherited from gem5::BasicPioDevice | |
PARAMS (BasicPioDevice) | |
BasicPioDevice (const Params &p, Addr size) | |
AddrRangeList | getAddrRanges () const override |
Determine the address ranges that this device responds to. | |
Public Member Functions inherited from gem5::PioDevice | |
PioDevice (const Params &p) | |
virtual | ~PioDevice () |
Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
Get a port with a given name and index. | |
Public Member Functions inherited from gem5::ClockedObject | |
ClockedObject (const ClockedObjectParams &p) | |
Public Member Functions inherited from gem5::SimObject | |
const Params & | params () const |
SimObject (const Params &p) | |
virtual | ~SimObject () |
virtual void | loadState (CheckpointIn &cp) |
loadState() is called on each SimObject when restoring from a checkpoint. | |
virtual void | initState () |
initState() is called on each SimObject when not restoring from a checkpoint. | |
virtual void | regProbePoints () |
Register probe points for this object. | |
virtual void | regProbeListeners () |
Register probe listeners for this object. | |
ProbeManager * | getProbeManager () |
Get the probe manager for this object. | |
virtual void | startup () |
startup() is the final initialization call before simulation. | |
DrainState | drain () override |
Provide a default implementation of the drain interface for objects that don't need draining. | |
virtual void | memWriteback () |
Write back dirty buffers to memory using functional writes. | |
virtual void | memInvalidate () |
Invalidate the contents of memory buffers. | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. | |
Public Member Functions inherited from gem5::EventManager | |
EventQueue * | eventQueue () const |
void | schedule (Event &event, Tick when) |
void | deschedule (Event &event) |
void | reschedule (Event &event, Tick when, bool always=false) |
void | schedule (Event *event, Tick when) |
void | deschedule (Event *event) |
void | reschedule (Event *event, Tick when, bool always=false) |
void | wakeupEventQueue (Tick when=(Tick) -1) |
This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. | |
void | setCurTick (Tick newVal) |
EventManager (EventManager &em) | |
Event manger manages events in the event queue. | |
EventManager (EventManager *em) | |
EventManager (EventQueue *eq) | |
Public Member Functions inherited from gem5::Serializable | |
Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Member Functions inherited from gem5::Drainable | |
DrainState | drainState () const |
Return the current drain state of an object. | |
virtual void | notifyFork () |
Notify a child process of a fork. | |
Public Member Functions inherited from gem5::statistics::Group | |
Group (Group *parent, const char *name=nullptr) | |
Construct a new statistics group. | |
virtual | ~Group () |
virtual void | regStats () |
Callback to set stat parameters. | |
virtual void | resetStats () |
Callback to reset stats. | |
virtual void | preDumpStats () |
Callback before stats are dumped. | |
void | addStat (statistics::Info *info) |
Register a stat with this group. | |
const std::map< std::string, Group * > & | getStatGroups () const |
Get all child groups associated with this object. | |
const std::vector< Info * > & | getStats () const |
Get all stats associated with this object. | |
void | addStatGroup (const char *name, Group *block) |
Add a stat block as a child of this block. | |
const Info * | resolveStat (std::string name) const |
Resolve a stat by its name within this group. | |
void | mergeStatGroup (Group *block) |
Merge the contents (stats & children) of a block to this block. | |
Group ()=delete | |
Group (const Group &)=delete | |
Group & | operator= (const Group &)=delete |
Public Member Functions inherited from gem5::Named | |
Named (const std::string &name_) | |
virtual | ~Named ()=default |
virtual std::string | name () const |
Public Member Functions inherited from gem5::Clocked | |
void | updateClockPeriod () |
Update the tick to the current tick. | |
Tick | clockEdge (Cycles cycles=Cycles(0)) const |
Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. | |
Cycles | curCycle () const |
Determine the current cycle, corresponding to a tick aligned to a clock edge. | |
Tick | nextCycle () const |
Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. | |
uint64_t | frequency () const |
Tick | clockPeriod () const |
double | voltage () const |
Cycles | ticksToCycles (Tick t) const |
Tick | cyclesToTicks (Cycles c) const |
Protected Member Functions | |
Tick | read (PacketPtr pkt) override |
PioDevice funcitons. | |
Tick | write (PacketPtr pkt) override |
Pure virtual function that the device must implement. | |
Protected Member Functions inherited from gem5::Drainable | |
Drainable () | |
virtual | ~Drainable () |
virtual void | drainResume () |
Resume execution after a successful drain. | |
void | signalDrainDone () const |
Signal that an object is drained. | |
Protected Member Functions inherited from gem5::Clocked | |
Clocked (ClockDomain &clk_domain) | |
Create a clocked object and set the clock domain based on the parameters. | |
Clocked (Clocked &)=delete | |
Clocked & | operator= (Clocked &)=delete |
virtual | ~Clocked () |
Virtual destructor due to inheritance. | |
void | resetClock () const |
Reset the object's clock using the current global tick value. | |
virtual void | clockPeriodUpdated () |
A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. | |
Protected Attributes | |
System * | system |
int | nSrc |
int | nSrc32 |
Number of 32-bit pending registers needed = ceil(nSrc / 32) | |
std::vector< std::pair< uint32_t, ExceptionCode > > | contextConfigs |
PLIC hart/pmode address configs, stored in the format {hartID, pmode}. | |
Protected Attributes inherited from gem5::BasicPioDevice | |
Addr | pioAddr |
Address that the device listens to. | |
Addr | pioSize |
Size that the device's address range. | |
Tick | pioDelay |
Delay that the device experinces on an access. | |
Protected Attributes inherited from gem5::PioDevice | |
System * | sys |
PioPort< PioDevice > | pioPort |
The pioPort that handles the requests for us and provides us requests that it sees. | |
Protected Attributes inherited from gem5::SimObject | |
const SimObjectParams & | _params |
Cached copy of the object parameters. | |
Protected Attributes inherited from gem5::EventManager | |
EventQueue * | eventq |
A pointer to this object's event queue. | |
Private Types | |
using | Register32 = PlicRegisters::Register32 |
Private Member Functions | |
void | writePriority (Register32 ®, const uint32_t &data, const int src_id) |
Register read / write callbacks. | |
void | writeEnable (Register32 ®, const uint32_t &data, const int src32_id, const int context_id) |
void | writeThreshold (Register32 ®, const uint32_t &data, const int context_id) |
uint32_t | readClaim (Register32 ®, const int context_id) |
void | writeClaim (Register32 ®, const uint32_t &data, const int context_id) |
void | initContextFromNContexts (int n_contexts) |
The function for handling context config from params. | |
void | initContextFromHartConfig (const std::string &hart_config) |
void | propagateOutput () |
Trigger: | |
void | updateOutput () |
Trigger: | |
void | updateInt () |
Trigger: | |
Private Attributes | |
gem5::Plic::PlicRegisters | registers |
std::vector< uint32_t > | pendingPriority |
std::vector< std::vector< uint32_t > > | effPriority |
std::vector< uint32_t > | lastID |
PlicOutput | output |
std::map< Tick, PlicOutput > | outputQueue |
EventFunctionWrapper | update |
Additional Inherited Members | |
Static Public Member Functions inherited from gem5::SimObject | |
static void | serializeAll (const std::string &cpt_dir) |
Create a checkpoint by serializing all SimObjects in the system. | |
static SimObject * | find (const char *name) |
Find the SimObject with the given name and return a pointer to it. | |
static void | setSimObjectResolver (SimObjectResolver *resolver) |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
static SimObjectResolver * | getSimObjectResolver () |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
Static Public Member Functions inherited from gem5::Serializable | |
static const std::string & | currentSection () |
Gets the fully-qualified name of the active section. | |
static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
Generate a checkpoint file so that the serialization can be routed to it. | |
Public Attributes inherited from gem5::ClockedObject | |
PowerState * | powerState |
typedef PlicParams gem5::Plic::Params |
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gem5::Plic::Plic | ( | const Params & | params | ) |
Definition at line 56 of file plic.cc.
References updateOutput().
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Implements gem5::PlicBase.
Definition at line 104 of file plic.cc.
References contextConfigs, DPRINTF, effPriority, gem5::ArmISA::i, nSrc, gem5::Plic::PlicRegisters::pending, pendingPriority, propagateOutput(), and registers.
Referenced by readClaim().
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overridevirtual |
SimObject functions.
Reimplemented from gem5::PioDevice.
Definition at line 174 of file plic.cc.
References contextConfigs, gem5::divCeil(), DPRINTF, effPriority, gem5::ArmISA::i, gem5::PioDevice::init(), gem5::Plic::PlicRegisters::init(), lastID, nSrc, nSrc32, output, pendingPriority, and registers.
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Definition at line 443 of file plic.cc.
References gem5::ArmISA::c, contextConfigs, and fatal.
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The function for handling context config from params.
Definition at line 433 of file plic.cc.
References contextConfigs, and gem5::ArmISA::i.
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Interrupt interface.
Implements gem5::PlicBase.
Definition at line 75 of file plic.cc.
References gem5::bits(), contextConfigs, DPRINTF, effPriority, gem5::Plic::PlicRegisters::enable, gem5::statistics::enabled(), gem5::ArmISA::i, gem5::Plic::PlicRegisters::pending, pendingPriority, gem5::Plic::PlicRegisters::priority, propagateOutput(), and registers.
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Trigger:
Task:
Definition at line 401 of file plic.cc.
References contextConfigs, gem5::curTick(), gem5::Clocked::cyclesToTicks(), DPRINTF, effPriority, gem5::ArmISA::i, outputQueue, gem5::EventManager::schedule(), gem5::Event::scheduled(), and update.
PioDevice funcitons.
Implements gem5::PioDevice.
Definition at line 132 of file plic.cc.
References gem5::Packet::cmd, DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getAtomicOp(), gem5::Packet::getPtr(), gem5::Packet::getSize(), gem5::Packet::isAtomicOp(), gem5::Packet::makeResponse(), gem5::BasicPioDevice::pioDelay, gem5::RegisterBank< BankByteOrder >::read(), registers, gem5::MemCmd::SwapReq, and write().
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Definition at line 353 of file plic.cc.
References gem5::bits(), clear(), DPRINTF, lastID, gem5::PlicOutput::maxID, output, gem5::Plic::PlicRegisters::pending, gem5::X86ISA::reg, registers, and warn.
Referenced by gem5::Plic::PlicRegisters::init().
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Serialize an object.
Output an object's state into the current checkpoint section.
cp | Checkpoint state |
Reimplemented from gem5::ClockedObject.
Definition at line 511 of file plic.cc.
References gem5::arrayParamOut(), gem5::Plic::PlicRegisters::claim, effPriority, gem5::Plic::PlicRegisters::enable, gem5::ArmISA::i, lastID, gem5::PlicOutput::maxID, gem5::PlicOutput::maxPriority, output, outputQueue, gem5::paramOut(), gem5::Plic::PlicRegisters::pending, pendingPriority, gem5::Plic::PlicRegisters::priority, gem5::X86ISA::reg, registers, SERIALIZE_CONTAINER, SERIALIZE_SCALAR, and gem5::Plic::PlicRegisters::threshold.
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Unserialize an object.
Read an object's state from the current checkpoint section.
cp | Checkpoint state |
Reimplemented from gem5::ClockedObject.
Definition at line 553 of file plic.cc.
References gem5::arrayParamIn(), gem5::Plic::PlicRegisters::claim, effPriority, gem5::Plic::PlicRegisters::enable, gem5::ArmISA::i, lastID, gem5::PlicOutput::maxID, gem5::PlicOutput::maxPriority, output, outputQueue, gem5::paramIn(), gem5::Plic::PlicRegisters::pending, pendingPriority, gem5::Plic::PlicRegisters::priority, gem5::X86ISA::reg, registers, gem5::EventManager::schedule(), gem5::Plic::PlicRegisters::threshold, UNSERIALIZE_CONTAINER, UNSERIALIZE_SCALAR, update, and updateInt().
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Trigger:
Task:
Definition at line 484 of file plic.cc.
References contextConfigs, DPRINTF, DPRINTFR, gem5::ArmISA::i, lastID, gem5::PlicOutput::maxID, gem5::PlicOutput::maxPriority, output, gem5::ArmISA::priority, registers, system, gem5::System::threads, and gem5::Plic::PlicRegisters::threshold.
Referenced by unserialize(), updateOutput(), write(), and writeClaim().
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Trigger:
Task:
Definition at line 466 of file plic.cc.
References DPRINTF, output, outputQueue, gem5::EventManager::schedule(), update, and updateInt().
Referenced by Plic().
Pure virtual function that the device must implement.
Called when a write command is recieved by the port.
pkt | Packet describing this request |
Implements gem5::PioDevice.
Definition at line 154 of file plic.cc.
References DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getPtr(), gem5::Packet::getSize(), gem5::Packet::makeResponse(), gem5::BasicPioDevice::pioDelay, propagateOutput(), registers, updateInt(), and gem5::RegisterBank< BankByteOrder >::write().
Referenced by read().
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Plic spec states that this error should be silently ignored. However, this is not supposed to happen.
Definition at line 384 of file plic.cc.
References data, DPRINTF, lastID, gem5::X86ISA::reg, and updateInt().
Referenced by gem5::Plic::PlicRegisters::init().
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Definition at line 324 of file plic.cc.
References gem5::bits(), data, DPRINTF, effPriority, gem5::ArmISA::i, nSrc, pendingPriority, and gem5::X86ISA::reg.
Referenced by gem5::Plic::PlicRegisters::init().
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Register read / write callbacks.
Definition at line 301 of file plic.cc.
References gem5::bits(), contextConfigs, data, DPRINTF, effPriority, gem5::Plic::PlicRegisters::enable, gem5::statistics::enabled(), gem5::ArmISA::i, gem5::Plic::PlicRegisters::pending, pendingPriority, gem5::X86ISA::reg, and registers.
Referenced by gem5::Plic::PlicRegisters::init().
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Definition at line 342 of file plic.cc.
References data, DPRINTF, and gem5::X86ISA::reg.
Referenced by gem5::Plic::PlicRegisters::init().
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PLIC hart/pmode address configs, stored in the format {hartID, pmode}.
Definition at line 127 of file plic.hh.
Referenced by clear(), init(), gem5::Plic::PlicRegisters::init(), initContextFromHartConfig(), initContextFromNContexts(), post(), propagateOutput(), updateInt(), and writePriority().
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Definition at line 253 of file plic.hh.
Referenced by clear(), init(), post(), propagateOutput(), serialize(), unserialize(), writeEnable(), and writePriority().
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Definition at line 255 of file plic.hh.
Referenced by init(), readClaim(), serialize(), unserialize(), updateInt(), and writeClaim().
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Definition at line 118 of file plic.hh.
Referenced by clear(), init(), gem5::Plic::PlicRegisters::init(), and writeEnable().
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Number of 32-bit pending registers needed = ceil(nSrc / 32)
Definition at line 123 of file plic.hh.
Referenced by init(), and gem5::Plic::PlicRegisters::init().
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Definition at line 256 of file plic.hh.
Referenced by init(), readClaim(), serialize(), unserialize(), updateInt(), and updateOutput().
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Definition at line 276 of file plic.hh.
Referenced by propagateOutput(), serialize(), unserialize(), and updateOutput().
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Definition at line 251 of file plic.hh.
Referenced by clear(), init(), post(), serialize(), unserialize(), writeEnable(), and writePriority().
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Referenced by clear(), init(), post(), read(), readClaim(), serialize(), unserialize(), updateInt(), write(), and writePriority().
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Definition at line 115 of file plic.hh.
Referenced by updateInt().
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Definition at line 277 of file plic.hh.
Referenced by propagateOutput(), unserialize(), and updateOutput().