gem5 v24.0.0.0
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pseudo_inst.cc
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1/*
2 * Copyright (c) 2010-2012, 2015, 2017 ARM Limited
3 * Copyright (c) 2020 Barkhausen Institut
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license
11 * terms below provided that you ensure that this notice is replicated
12 * unmodified and in its entirety in all distributions of the software,
13 * modified or unmodified, in source code or in binary form.
14 *
15 * Copyright (c) 2011 Advanced Micro Devices, Inc.
16 * Copyright (c) 2003-2006 The Regents of The University of Michigan
17 * All rights reserved.
18 *
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions are
21 * met: redistributions of source code must retain the above copyright
22 * notice, this list of conditions and the following disclaimer;
23 * redistributions in binary form must reproduce the above copyright
24 * notice, this list of conditions and the following disclaimer in the
25 * documentation and/or other materials provided with the distribution;
26 * neither the name of the copyright holders nor the names of its
27 * contributors may be used to endorse or promote products derived from
28 * this software without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
31 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
32 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
33 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
34 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
35 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
36 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
37 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
38 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 */
42
43#include "sim/pseudo_inst.hh"
44
45#include <fcntl.h>
46#include <unistd.h>
47
48#include <array>
49#include <cerrno>
50#include <fstream>
51#include <string>
52#include <vector>
53
54#include "base/debug.hh"
55#include "base/output.hh"
56#include "cpu/base.hh"
57#include "cpu/thread_context.hh"
58#include "debug/Loader.hh"
59#include "debug/Quiesce.hh"
60#include "debug/WorkItems.hh"
61#include "dev/net/dist_iface.hh"
64#include "params/BaseCPU.hh"
65#include "sim/full_system.hh"
66#include "sim/process.hh"
67#include "sim/serialize.hh"
68#include "sim/sim_events.hh"
69#include "sim/sim_exit.hh"
70#include "sim/stat_control.hh"
71#include "sim/stats.hh"
72#include "sim/system.hh"
73
74namespace gem5
75{
76
77using namespace statistics;
78
79namespace pseudo_inst
80{
81
88namespace
89{
90
94const std::string DEFAULT = "";
98const std::string DIST_RANK = "dist-rank";
102const std::string DIST_SIZE = "dist-size";
103
104} // anonymous namespace
105
106void
108{
109 DPRINTF(PseudoInst, "pseudo_inst::arm()\n");
110
111 auto *workload = tc->getSystemPtr()->workload;
112 if (workload)
113 workload->recordArm();
114}
115
116void
118{
119 DPRINTF(PseudoInst, "pseudo_inst::quiesce()\n");
120 tc->quiesce();
121}
122
123void
125{
126 DPRINTF(PseudoInst, "pseudo_inst::quiesceSkip()\n");
127 tc->quiesceTick(tc->getCpuPtr()->nextCycle() + 1);
128}
129
130void
132{
133 DPRINTF(PseudoInst, "pseudo_inst::quiesceNs(%i)\n", ns);
135}
136
137void
138quiesceCycles(ThreadContext *tc, uint64_t cycles)
139{
140 DPRINTF(PseudoInst, "pseudo_inst::quiesceCycles(%i)\n", cycles);
141 tc->quiesceTick(tc->getCpuPtr()->clockEdge(Cycles(cycles)));
142}
143
144uint64_t
146{
147 DPRINTF(PseudoInst, "pseudo_inst::quiesceTime()\n");
148
149 return (tc->readLastActivate() - tc->readLastSuspend()) /
151}
152
153uint64_t
155{
156 DPRINTF(PseudoInst, "pseudo_inst::rpns()\n");
158}
159
160void
162{
163 DPRINTF(PseudoInst, "pseudo_inst::wakeCPU(%i)\n", cpuid);
164 System *sys = tc->getSystemPtr();
165
166 if (sys->threads.size() <= cpuid) {
167 warn("pseudo_inst::wakeCPU(%i), cpuid greater than number of contexts"
168 "(%i)\n", cpuid, sys->threads.size());
169 return;
170 }
171
172 ThreadContext *other_tc = sys->threads[cpuid];
173 if (other_tc->status() == ThreadContext::Suspended)
174 other_tc->activate();
175}
176
177void
179{
180 DPRINTF(PseudoInst, "pseudo_inst::m5exit(%i)\n", delay);
181 if (DistIface::readyToExit(delay)) {
182 Tick when = curTick() + delay * sim_clock::as_int::ns;
183 exitSimLoop("m5_exit instruction encountered", 0, when, 0, true);
184 }
185}
186
187// m5sum is for sanity checking the gem5 op interface.
188uint64_t
189m5sum(ThreadContext *tc, uint64_t a, uint64_t b, uint64_t c,
190 uint64_t d, uint64_t e, uint64_t f)
191{
192 DPRINTF(PseudoInst, "pseudo_inst::m5sum(%#x, %#x, %#x, %#x, %#x, %#x)\n",
193 a, b, c, d, e, f);
194 return a + b + c + d + e + f;
195}
196
197void
198m5fail(ThreadContext *tc, Tick delay, uint64_t code)
199{
200 DPRINTF(PseudoInst, "pseudo_inst::m5fail(%i, %i)\n", delay, code);
201 Tick when = curTick() + delay * sim_clock::as_int::ns;
202 exitSimLoop("m5_fail instruction encountered", code, when, 0, true);
203}
204
205void
207{
208 DPRINTF(PseudoInst, "pseudo_inst::loadsymbol()\n");
209
210 const std::string &filename = tc->getCpuPtr()->system->params().symbolfile;
211 if (filename.empty()) {
212 return;
213 }
214
215 std::string buffer;
216 std::ifstream file(filename.c_str());
217
218 if (!file)
219 fatal("file error: Can't open symbol table file %s\n", filename);
220
221 while (!file.eof()) {
222 getline(file, buffer);
223
224 if (buffer.empty())
225 continue;
226
227 std::string::size_type idx = buffer.find(' ');
228 if (idx == std::string::npos)
229 continue;
230
231 std::string address = "0x" + buffer.substr(0, idx);
232 eat_white(address);
233 if (address.empty())
234 continue;
235
236 // Skip over letter and space
237 std::string symbol = buffer.substr(idx + 3);
238 eat_white(symbol);
239 if (symbol.empty())
240 continue;
241
242 Addr addr;
243 if (!to_number(address, addr))
244 continue;
245
247 { loader::Symbol::Binding::Global,
248 loader::Symbol::SymbolType::Function, symbol, addr })) {
249 continue;
250 }
251
252
253 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
254 }
255 file.close();
256}
257
258void
260{
261 DPRINTF(PseudoInst, "pseudo_inst::addsymbol(0x%x, 0x%x)\n",
262 addr.addr, symbolAddr.addr);
263
264 std::string symbol;
265 TranslatingPortProxy fs_proxy(tc);
266 SETranslatingPortProxy se_proxy(tc);
267 PortProxy &virt_proxy = FullSystem ? fs_proxy : se_proxy;
268
269 virt_proxy.readString(symbol, symbolAddr.addr);
270
271 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr.addr);
272
276 );
280 );
281}
282
283uint64_t
284initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2)
285{
286 DPRINTF(PseudoInst, "pseudo_inst::initParam() key:%s%s\n",
287 (char *)&key_str1, (char *)&key_str2);
288
289 // The key parameter string is passed in via two 64-bit registers. We copy
290 // out the characters from the 64-bit integer variables here, and
291 // concatenate them in the key character buffer
292 const int len = 2 * sizeof(uint64_t) + 1;
293 char key[len];
294 std::memset(key, '\0', len);
295
296 std::array<uint64_t, 2> key_regs = {{ key_str1, key_str2 }};
297 key_regs = letoh(key_regs);
298 std::memcpy(key, key_regs.data(), sizeof(key_regs));
299
300 // Check key parameter to figure out what to return.
301 const std::string key_str(key);
302 if (key == DEFAULT)
303 return tc->getCpuPtr()->system->init_param;
304 else if (key == DIST_RANK)
305 return DistIface::rankParam();
306 else if (key == DIST_SIZE)
307 return DistIface::sizeParam();
308 else
309 panic("Unknown key for initparam pseudo instruction:\"%s\"", key_str);
310}
311
312
313void
315{
316 DPRINTF(PseudoInst, "pseudo_inst::resetstats(%i, %i)\n", delay, period);
317 if (!tc->getCpuPtr()->params().do_statistics_insts)
318 return;
319
320
321 Tick when = curTick() + delay * sim_clock::as_int::ns;
322 Tick repeat = period * sim_clock::as_int::ns;
323
324 statistics::schedStatEvent(false, true, when, repeat);
325}
326
327void
328dumpstats(ThreadContext *tc, Tick delay, Tick period)
329{
330 DPRINTF(PseudoInst, "pseudo_inst::dumpstats(%i, %i)\n", delay, period);
331 if (!tc->getCpuPtr()->params().do_statistics_insts)
332 return;
333
334
335 Tick when = curTick() + delay * sim_clock::as_int::ns;
336 Tick repeat = period * sim_clock::as_int::ns;
337
338 statistics::schedStatEvent(true, false, when, repeat);
339}
340
341void
343{
344 DPRINTF(PseudoInst, "pseudo_inst::dumpresetstats(%i, %i)\n", delay,
345 period);
346 if (!tc->getCpuPtr()->params().do_statistics_insts)
347 return;
348
349
350 Tick when = curTick() + delay * sim_clock::as_int::ns;
351 Tick repeat = period * sim_clock::as_int::ns;
352
353 statistics::schedStatEvent(true, true, when, repeat);
354}
355
356void
358{
359 DPRINTF(PseudoInst, "pseudo_inst::m5checkpoint(%i, %i)\n", delay, period);
360 if (!tc->getCpuPtr()->params().do_checkpoint_insts)
361 return;
362
363 if (DistIface::readyToCkpt(delay, period)) {
364 Tick when = curTick() + delay * sim_clock::as_int::ns;
365 Tick repeat = period * sim_clock::as_int::ns;
366 exitSimLoop("checkpoint", 0, when, repeat);
367 }
368}
369
370uint64_t
372{
373 DPRINTF(PseudoInst, "pseudo_inst::readfile(0x%x, 0x%x, 0x%x)\n",
374 vaddr.addr, len, offset);
375
376 const std::string &file = tc->getSystemPtr()->params().readfile;
377 if (file.empty()) {
378 return 0;
379 }
380
381 uint64_t result = 0;
382
383 int fd = ::open(file.c_str(), O_RDONLY, 0);
384 if (fd < 0)
385 panic("could not open file %s\n", file);
386
387 if (::lseek(fd, offset, SEEK_SET) < 0)
388 panic("could not seek: %s", strerror(errno));
389
390 char *buf = new char[len];
391 char *p = buf;
392 while (len > 0) {
393 int bytes = ::read(fd, p, len);
394 if (bytes <= 0)
395 break;
396
397 p += bytes;
398 result += bytes;
399 len -= bytes;
400 }
401
402 close(fd);
403 TranslatingPortProxy fs_proxy(tc);
404 SETranslatingPortProxy se_proxy(tc);
405 PortProxy &virt_proxy = FullSystem ? fs_proxy : se_proxy;
406
407 virt_proxy.writeBlob(vaddr.addr, buf, result);
408 delete [] buf;
409 return result;
410}
411
412uint64_t
414 GuestAddr filename_addr)
415{
416 DPRINTF(PseudoInst, "pseudo_inst::writefile(0x%x, 0x%x, 0x%x, 0x%x)\n",
417 vaddr.addr, len, offset, filename_addr.addr);
418
419 // copy out target filename
420 std::string filename;
421 TranslatingPortProxy fs_proxy(tc);
422 SETranslatingPortProxy se_proxy(tc);
423 PortProxy &virt_proxy = FullSystem ? fs_proxy : se_proxy;
424
425 virt_proxy.readString(filename, filename_addr.addr);
426
427 OutputStream *out;
428 if (offset == 0) {
429 // create a new file (truncate)
430 out = simout.create(filename, true, true);
431 } else {
432 // do not truncate file if offset is non-zero
433 // (ios::in flag is required as well to keep the existing data
434 // intact, otherwise existing data will be zeroed out.)
435 out = simout.open(filename,
436 std::ios::in | std::ios::out | std::ios::binary, true);
437 }
438
439 std::ostream *os(out->stream());
440 if (!os)
441 panic("could not open file %s\n", filename);
442
443 if (offset != 0) {
444 // seek to offset
445 os->seekp(offset);
446 }
447
448 // copy out data and write to file
449 char *buf = new char[len];
450
451 virt_proxy.readBlob(vaddr.addr, buf, len);
452 os->write(buf, len);
453 if (os->fail() || os->bad())
454 panic("Error while doing writefile!\n");
455
456 simout.close(out);
457
458 delete [] buf;
459
460 return len;
461}
462
463void
465{
466 DPRINTF(PseudoInst, "pseudo_inst::debugbreak()\n");
468}
469
470void
472{
473 DPRINTF(PseudoInst, "pseudo_inst::switchcpu()\n");
474 exitSimLoop("switchcpu");
475}
476
477void
479{
480 DPRINTF(PseudoInst, "pseudo_inst::togglesync()\n");
482}
483
484void
486{
487 DPRINTF(PseudoInst, "pseudo_inst::triggerWorkloadEvent()\n");
488 tc->getSystemPtr()->workload->event(tc);
489}
490
491//
492// This function is executed when annotated work items begin. Depending on
493// what the user specified at the command line, the simulation may exit and/or
494// take a checkpoint when a certain work item begins.
495//
496void
497workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
498{
499 DPRINTF(PseudoInst, "pseudo_inst::workbegin(%i, %i)\n", workid, threadid);
500 System *sys = tc->getSystemPtr();
501 const System::Params &params = sys->params();
502
503 if (params.exit_on_work_items) {
504 exitSimLoop("workbegin", static_cast<int>(workid));
505 return;
506 }
507
508 DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid,
509 threadid);
510 tc->getCpuPtr()->workItemBegin();
511 sys->workItemBegin(threadid, workid);
512
513 //
514 // If specified, determine if this is the specific work item the user
515 // identified
516 //
517 if (params.work_item_id == -1 || params.work_item_id == workid) {
518
519 uint64_t systemWorkBeginCount = sys->incWorkItemsBegin();
520 int cpuId = tc->getCpuPtr()->cpuId();
521
522 if (params.work_cpus_ckpt_count != 0 &&
523 sys->markWorkItem(cpuId) >= params.work_cpus_ckpt_count) {
524 //
525 // If active cpus equals checkpoint count, create checkpoint
526 //
527 exitSimLoop("checkpoint");
528 }
529
530 if (systemWorkBeginCount == params.work_begin_ckpt_count) {
531 //
532 // Note: the string specified as the cause of the exit event must
533 // exactly equal "checkpoint" inorder to create a checkpoint
534 //
535 exitSimLoop("checkpoint");
536 }
537
538 if (systemWorkBeginCount == params.work_begin_exit_count) {
539 //
540 // If a certain number of work items started, exit simulation
541 //
542 exitSimLoop("work started count reach");
543 }
544
545 if (cpuId == params.work_begin_cpu_id_exit) {
546 //
547 // If work started on the cpu id specified, exit simulation
548 //
549 exitSimLoop("work started on specific cpu");
550 }
551 }
552}
553
554//
555// This function is executed when annotated work items end. Depending on
556// what the user specified at the command line, the simulation may exit and/or
557// take a checkpoint when a certain work item ends.
558//
559void
560workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
561{
562 DPRINTF(PseudoInst, "pseudo_inst::workend(%i, %i)\n", workid, threadid);
563 System *sys = tc->getSystemPtr();
564 const System::Params &params = sys->params();
565
566 if (params.exit_on_work_items) {
567 exitSimLoop("workend", static_cast<int>(workid));
568 return;
569 }
570
571 DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid);
572 tc->getCpuPtr()->workItemEnd();
573 sys->workItemEnd(threadid, workid);
574
575 //
576 // If specified, determine if this is the specific work item the user
577 // identified
578 //
579 if (params.work_item_id == -1 || params.work_item_id == workid) {
580
581 uint64_t systemWorkEndCount = sys->incWorkItemsEnd();
582 int cpuId = tc->getCpuPtr()->cpuId();
583
584 if (params.work_cpus_ckpt_count != 0 &&
585 sys->markWorkItem(cpuId) >= params.work_cpus_ckpt_count) {
586 //
587 // If active cpus equals checkpoint count, create checkpoint
588 //
589 exitSimLoop("checkpoint");
590 }
591
592 if (params.work_end_ckpt_count != 0 &&
593 systemWorkEndCount == params.work_end_ckpt_count) {
594 //
595 // If total work items completed equals checkpoint count, create
596 // checkpoint
597 //
598 exitSimLoop("checkpoint");
599 }
600
601 if (params.work_end_exit_count != 0 &&
602 systemWorkEndCount == params.work_end_exit_count) {
603 //
604 // If total work items completed equals exit count, exit simulation
605 //
606 exitSimLoop("work items exit count reached");
607 }
608 }
609}
610
611} // namespace pseudo_inst
612} // namespace gem5
#define DPRINTF(x,...)
Definition trace.hh:210
System * system
Definition base.hh:392
void workItemBegin()
Definition base.hh:218
int cpuId() const
Reads this CPU's ID.
Definition base.hh:187
void workItemEnd()
Definition base.hh:219
Tick clockEdge(Cycles cycles=Cycles(0)) const
Determine the tick when a cycle begins, by default the current one, but the argument also enables the...
Tick nextCycle() const
Based on the clock of the object, determine the start tick of the first cycle that is at least one cy...
Cycles is a wrapper class for representing cycle counts, i.e.
Definition types.hh:79
static uint64_t rankParam()
Getter for the dist rank param.
static bool readyToExit(Tick delay)
Initiate the exit from the simulation.
static void toggleSync(ThreadContext *tc)
Trigger the primary to start/stop synchronization.
static bool readyToCkpt(Tick delay, Tick period)
Initiate taking a checkpoint.
static uint64_t sizeParam()
Getter for the dist size param.
void close(OutputStream *file)
Closes an output file and free the corresponding OutputFile.
Definition output.cc:147
OutputStream * open(const std::string &name, std::ios_base::openmode mode, bool recreateable=true, bool no_gz=false)
Open a file in this directory (optionally compressed).
Definition output.cc:224
OutputStream * create(const std::string &name, bool binary=false, bool no_gz=false)
Creates a file in this directory (optionally compressed).
Definition output.cc:210
std::ostream * stream() const
Get the output underlying output stream.
Definition output.hh:62
This object is a proxy for a port or other object which implements the functional response protocol,...
Definition port_proxy.hh:87
void readBlob(Addr addr, void *p, uint64_t size) const
Higher level interfaces based on the above.
void writeBlob(Addr addr, const void *p, uint64_t size) const
Same as tryWriteBlob, but insists on success.
void readString(std::string &str, Addr addr) const
Same as tryReadString, but insists on success.
SimObjectParams Params
int size() const
Definition system.hh:210
int markWorkItem(int index)
Called by pseudo_inst to mark the cpus actively executing work items.
Definition system.hh:538
uint64_t incWorkItemsEnd()
Called by pseudo_inst to track the number of work items completed by this system.
Definition system.hh:527
uint64_t incWorkItemsBegin()
Called by pseudo_inst to track the number of work items started by this system.
Definition system.hh:517
void workItemEnd(uint32_t tid, uint32_t workid)
Definition system.cc:377
Workload * workload
OS kernel.
Definition system.hh:326
uint64_t init_param
Definition system.hh:319
void workItemBegin(uint32_t tid, uint32_t workid)
Definition system.hh:545
Threads threads
Definition system.hh:310
ThreadContext is the external interface to all thread state for anything outside of the CPU.
virtual void activate()=0
Set the status to Active.
virtual System * getSystemPtr()=0
virtual BaseCPU * getCpuPtr()=0
virtual Tick readLastActivate()=0
void quiesceTick(Tick resume)
Quiesce, suspend, and schedule activate at resume.
virtual Tick readLastSuspend()=0
void quiesce()
Quiesce thread context.
@ Suspended
Temporarily inactive.
virtual Status status() const =0
This proxy attempts to translate virtual addresses using the TLBs.
virtual void event(ThreadContext *tc)
Definition workload.hh:119
void recordArm()
Definition workload.hh:91
virtual bool insertSymbol(const loader::Symbol &symbol)=0
bool insert(const Symbol &symbol)
Insert a new symbol in the table if it does not already exist.
Definition symtab.cc:66
#define panic(...)
This implements a cprintf based panic() function.
Definition logging.hh:188
#define fatal(...)
This implements a cprintf based fatal() function.
Definition logging.hh:200
const Params & params() const
#define warn(...)
Definition logging.hh:256
Bitfield< 14, 12 > fd
Definition types.hh:150
Bitfield< 18, 16 > len
Bitfield< 7 > b
Bitfield< 23, 0 > offset
Definition types.hh:144
Bitfield< 9 > e
Definition misc_types.hh:65
Bitfield< 0 > ns
Bitfield< 29 > c
Definition misc_types.hh:53
Bitfield< 8 > a
Definition misc_types.hh:66
Bitfield< 6 > f
Definition misc_types.hh:68
Bitfield< 9 > d
Definition misc_types.hh:64
Bitfield< 0 > p
Bitfield< 28, 21 > cpuid
Bitfield< 17 > os
Definition misc.hh:838
Bitfield< 3 > addr
Definition types.hh:84
void breakpoint()
Definition debug.cc:64
SymbolTable debugSymbolTable
Global unified debugging symbol table (for target).
Definition symtab.cc:55
uint64_t m5sum(ThreadContext *tc, uint64_t a, uint64_t b, uint64_t c, uint64_t d, uint64_t e, uint64_t f)
uint64_t rpns(ThreadContext *tc)
void loadsymbol(ThreadContext *tc)
void quiesceCycles(ThreadContext *tc, uint64_t cycles)
void arm(ThreadContext *tc)
void debugbreak(ThreadContext *tc)
void m5fail(ThreadContext *tc, Tick delay, uint64_t code)
void quiesce(ThreadContext *tc)
void quiesceNs(ThreadContext *tc, uint64_t ns)
void m5exit(ThreadContext *tc, Tick delay)
void quiesceSkip(ThreadContext *tc)
void togglesync(ThreadContext *tc)
uint64_t writefile(ThreadContext *tc, GuestAddr vaddr, uint64_t len, uint64_t offset, GuestAddr filename_addr)
void resetstats(ThreadContext *tc, Tick delay, Tick period)
void workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
uint64_t initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2)
void triggerWorkloadEvent(ThreadContext *tc)
void addsymbol(ThreadContext *tc, GuestAddr addr, GuestAddr symbolAddr)
uint64_t quiesceTime(ThreadContext *tc)
void wakeCPU(ThreadContext *tc, uint64_t cpuid)
uint64_t readfile(ThreadContext *tc, GuestAddr vaddr, uint64_t len, uint64_t offset)
void m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
void workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
void switchcpu(ThreadContext *tc)
void dumpstats(ThreadContext *tc, Tick delay, Tick period)
void dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
Tick ns
nanosecond
Definition core.cc:68
void schedStatEvent(bool dump, bool reset, Tick when, Tick repeat)
Schedule statistics dumping.
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
T letoh(T value)
Definition byteswap.hh:173
bool to_number(const std::string &value, Pixel &retval)
Definition pixel.hh:217
Tick curTick()
The universal simulation clock.
Definition cur_tick.hh:46
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
bool FullSystem
The FullSystem variable can be used to determine the current mode of simulation.
Definition root.cc:220
OutputDirectory simout
Definition output.cc:62
uint64_t Tick
Tick count type.
Definition types.hh:58
void exitSimLoop(const std::string &message, int exit_code, Tick when, Tick repeat, bool serialize)
Schedule an event to exit the simulation loop (returning to Python) at the end of the current cycle (...
Definition sim_events.cc:88
void eat_white(std::string &s)
Definition str.hh:68
This struct wrapper for Addr enables m5ops for systems with 32 bit pointer, since it allows to distin...

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