gem5  v21.1.0.2
simple_thread.cc
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40 
41 #include "cpu/simple_thread.hh"
42 
43 #include <string>
44 
45 #include "base/callback.hh"
46 #include "base/compiler.hh"
47 #include "base/cprintf.hh"
48 #include "base/output.hh"
49 #include "base/trace.hh"
50 #include "config/the_isa.hh"
51 #include "cpu/base.hh"
52 #include "cpu/simple/base.hh"
53 #include "cpu/thread_context.hh"
56 #include "params/BaseCPU.hh"
57 #include "sim/faults.hh"
58 #include "sim/full_system.hh"
59 #include "sim/process.hh"
60 #include "sim/serialize.hh"
61 #include "sim/sim_exit.hh"
62 #include "sim/system.hh"
63 
64 namespace gem5
65 {
66 
67 // constructor
68 SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
69  Process *_process, BaseMMU *_mmu,
70  BaseISA *_isa)
71  : ThreadState(_cpu, _thread_num, _process),
72  isa(dynamic_cast<TheISA::ISA *>(_isa)),
73  predicate(true), memAccPredicate(true),
74  comInstEventQueue("instruction-based event queue"),
75  system(_sys), mmu(_mmu), decoder(isa),
76  htmTransactionStarts(0), htmTransactionStops(0)
77 {
78  assert(isa);
79  const auto &regClasses = isa->regClasses();
80  intRegs.resize(regClasses.at(IntRegClass).size());
81  floatRegs.resize(regClasses.at(FloatRegClass).size());
82  vecRegs.resize(regClasses.at(VecRegClass).size());
83  vecPredRegs.resize(regClasses.at(VecPredRegClass).size());
84  ccRegs.resize(regClasses.at(CCRegClass).size());
85  clearArchRegs();
86 }
87 
88 SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
89  BaseMMU *_mmu, BaseISA *_isa)
90  : SimpleThread(_cpu, _thread_num, _sys, nullptr, _mmu, _isa)
91 {}
92 
93 void
95 {
96  gem5::takeOverFrom(*this, *oldContext);
97  decoder.takeOverFrom(oldContext->getDecoderPtr());
98 
99  isa->takeOverFrom(this, oldContext);
100 
101  storeCondFailures = 0;
102 }
103 
104 void
106 {
107  // copy over functional state
108  _status = oldContext->status();
109  copyArchRegs(oldContext);
110 
111  _threadId = oldContext->threadId();
112  _contextId = oldContext->contextId();
113 }
114 
115 void
117 {
119  gem5::serialize(*this, cp);
120 }
121 
122 
123 void
125 {
127  gem5::unserialize(*this, cp);
128 }
129 
130 void
132 {
133  if (status() == ThreadContext::Active)
134  return;
135 
136  lastActivate = curTick();
139 }
140 
141 void
143 {
145  return;
146 
147  lastActivate = curTick();
148  lastSuspend = curTick();
151 }
152 
153 
154 void
156 {
157  if (status() == ThreadContext::Halted)
158  return;
159 
162 }
163 
164 void
166 {
167  getIsaPtr()->copyRegsFrom(src_tc);
168 }
169 
170 // hardware transactional memory
171 void
173 {
174  BaseSimpleCPU *baseSimpleCpu = dynamic_cast<BaseSimpleCPU*>(baseCpu);
175  assert(baseSimpleCpu);
176 
177  baseSimpleCpu->htmSendAbortSignal(cause);
178 
179  // these must be reset after the abort signal has been sent
182 }
183 
186 {
187  return _htmCheckpoint;
188 }
189 
190 void
192 {
193  _htmCheckpoint = std::move(new_cpt);
194 }
195 
196 } // namespace gem5
gem5::curTick
Tick curTick()
The universal simulation clock.
Definition: cur_tick.hh:46
gem5::unserialize
void unserialize(ThreadContext &tc, CheckpointIn &cp)
Definition: thread_context.cc:206
gem5::CCRegClass
@ CCRegClass
Condition-code register.
Definition: reg_class.hh:64
gem5::ThreadContext::Active
@ Active
Running.
Definition: thread_context.hh:108
gem5::BaseHTMCheckpointPtr
std::unique_ptr< BaseHTMCheckpoint > BaseHTMCheckpointPtr
Definition: htm.hh:125
gem5::SimpleThread::htmTransactionStops
int64_t htmTransactionStops
Definition: simple_thread.hh:140
system.hh
gem5::BaseISA::copyRegsFrom
virtual void copyRegsFrom(ThreadContext *src)=0
gem5::ThreadContext::Halted
@ Halted
Permanently shut down.
Definition: thread_context.hh:121
serialize.hh
gem5::HtmFailureFaultCause
HtmFailureFaultCause
Definition: htm.hh:47
gem5::ThreadState
Struct for holding general thread state that is needed across CPU models.
Definition: thread_state.hh:47
gem5::ArmISA::ISA
Definition: isa.hh:68
gem5::SimpleThread::copyArchRegs
void copyArchRegs(ThreadContext *tc) override
Definition: simple_thread.cc:165
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::FloatRegClass
@ FloatRegClass
Floating-point register.
Definition: reg_class.hh:58
translating_port_proxy.hh
gem5::ThreadState::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: thread_state.cc:66
gem5::SimpleThread::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: simple_thread.cc:124
gem5::ThreadState::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: thread_state.cc:60
gem5::VecPredRegClass
@ VecPredRegClass
Definition: reg_class.hh:63
gem5::ThreadContext::contextId
virtual ContextID contextId() const =0
gem5::ThreadState::_contextId
ContextID _contextId
Definition: thread_state.hh:128
gem5::X86ISA::system
Bitfield< 15 > system
Definition: misc.hh:1003
gem5::SimpleThread::SimpleThread
SimpleThread(BaseCPU *_cpu, int _thread_num, System *_system, BaseMMU *_mmu, BaseISA *_isa)
Definition: simple_thread.cc:88
gem5::SimpleThread::clearArchRegs
void clearArchRegs() override
Definition: simple_thread.hh:257
gem5::SimpleThread::_htmCheckpoint
std::unique_ptr< BaseHTMCheckpoint > _htmCheckpoint
Definition: simple_thread.hh:110
gem5::SimpleThread::activate
void activate() override
Set the status to Active.
Definition: simple_thread.cc:131
faults.hh
sim_exit.hh
gem5::SimpleThread::htmTransactionStarts
int64_t htmTransactionStarts
Definition: simple_thread.hh:139
gem5::SimpleThread
The SimpleThread object provides a combination of the ThreadState object and the ThreadContext interf...
Definition: simple_thread.hh:94
output.hh
gem5::ThreadContext::getDecoderPtr
virtual TheISA::Decoder * getDecoderPtr()=0
gem5::takeOverFrom
void takeOverFrom(ThreadContext &ntc, ThreadContext &otc)
Copy state between thread contexts in preparation for CPU handover.
Definition: thread_context.cc:254
gem5::BaseMMU
Definition: mmu.hh:50
gem5::ThreadContext::status
virtual Status status() const =0
gem5::BaseSimpleCPU::htmSendAbortSignal
virtual void htmSendAbortSignal(HtmFailureFaultCause cause)=0
This function is used to instruct the memory subsystem that a transaction should be aborted and the s...
gem5::SimpleThread::htmAbortTransaction
void htmAbortTransaction(uint64_t htm_uid, HtmFailureFaultCause cause) override
Definition: simple_thread.cc:172
gem5::ThreadState::lastSuspend
Tick lastSuspend
Last time suspend was called on this thread.
Definition: thread_state.hh:138
gem5::SimpleThread::decoder
TheISA::Decoder decoder
Definition: simple_thread.hh:136
gem5::BaseCPU::suspendContext
virtual void suspendContext(ThreadID thread_num)
Notify the CPU that the indicated context is now suspended.
Definition: base.cc:502
gem5::System
Definition: system.hh:77
gem5::SimpleThread::copyState
void copyState(ThreadContext *oldContext)
Definition: simple_thread.cc:105
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:93
gem5::SimpleThread::isa
TheISA::ISA *const isa
Definition: simple_thread.hh:105
gem5::SimpleThread::setHtmCheckpointPtr
void setHtmCheckpointPtr(BaseHTMCheckpointPtr new_cpt) override
Definition: simple_thread.cc:191
gem5::ThreadContext::Suspended
@ Suspended
Temporarily inactive.
Definition: thread_context.hh:112
gem5::ThreadState::storeCondFailures
unsigned storeCondFailures
Definition: thread_state.hh:152
gem5::BaseCPU::haltContext
virtual void haltContext(ThreadID thread_num)
Notify the CPU that the indicated context is now halted.
Definition: base.cc:528
process.hh
gem5::SimpleThread::getIsaPtr
BaseISA * getIsaPtr() override
Definition: simple_thread.hh:213
gem5::SimpleThread::takeOverFrom
void takeOverFrom(ThreadContext *oldContext) override
Definition: simple_thread.cc:94
gem5::BaseCPU
Definition: base.hh:107
cprintf.hh
gem5::BaseSimpleCPU
Definition: base.hh:80
compiler.hh
gem5::SimpleThread::floatRegs
std::vector< RegVal > floatRegs
Definition: simple_thread.hh:100
gem5::serialize
void serialize(const ThreadContext &tc, CheckpointOut &cp)
Thread context serialization helpers.
Definition: thread_context.cc:157
gem5::SimpleThread::halt
void halt() override
Set the status to Halted.
Definition: simple_thread.cc:155
gem5::SimpleThread::getHtmCheckpointPtr
BaseHTMCheckpointPtr & getHtmCheckpointPtr() override
Definition: simple_thread.cc:185
full_system.hh
gem5::Process
Definition: process.hh:67
base.hh
gem5::SimpleThread::ccRegs
std::vector< RegVal > ccRegs
Definition: simple_thread.hh:104
gem5::ThreadState::lastActivate
Tick lastActivate
Last time activate was called on this thread.
Definition: thread_state.hh:135
gem5::VecRegClass
@ VecRegClass
Vector Register.
Definition: reg_class.hh:60
simple_thread.hh
gem5::BaseCPU::activateContext
virtual void activateContext(ThreadID thread_num)
Notify the CPU that the indicated context is now active.
Definition: base.cc:488
gem5::SimpleThread::suspend
void suspend() override
Set the status to Suspended.
Definition: simple_thread.cc:142
base.hh
gem5::ThreadState::_status
ThreadContext::Status _status
Definition: thread_state.hh:122
gem5::SimpleThread::vecPredRegs
std::vector< TheISA::VecPredRegContainer > vecPredRegs
Definition: simple_thread.hh:103
gem5::SimpleThread::vecRegs
std::vector< TheISA::VecRegContainer > vecRegs
Definition: simple_thread.hh:102
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
se_translating_port_proxy.hh
gem5::ThreadContext::threadId
virtual int threadId() const =0
trace.hh
decoder
output decoder
Definition: nop.cc:61
gem5::BaseISA
Definition: isa.hh:54
gem5::IntRegClass
@ IntRegClass
Integer register.
Definition: reg_class.hh:57
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::SimpleThread::intRegs
std::vector< RegVal > intRegs
Definition: simple_thread.hh:101
gem5::ThreadState::baseCpu
BaseCPU * baseCpu
Definition: thread_state.hh:125
gem5::SimpleThread::status
Status status() const override
Definition: simple_thread.hh:230
thread_context.hh
callback.hh
gem5::SimpleThread::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: simple_thread.cc:116
gem5::ThreadState::_threadId
ThreadID _threadId
Definition: thread_state.hh:131

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