42 #ifndef __CPU_SIMPLE_THREAD_HH__
43 #define __CPU_SIMPLE_THREAD_HH__
57 #include "debug/CCRegs.hh"
58 #include "debug/FloatRegs.hh"
59 #include "debug/IntRegs.hh"
60 #include "debug/VecPredRegs.hh"
61 #include "debug/VecRegs.hh"
228 void halt()
override;
319 const auto ®_class = reg_file.regClass;
322 DPRINTFV(reg_class.debug(),
"Reading %s reg %s (%d) as %#x.\n",
323 reg.className(), reg_class.regName(arch_reg), idx,
val);
335 const auto ®_class = reg_file.regClass;
337 reg_file.get(idx,
val);
338 DPRINTFV(reg_class.debug(),
"Reading %s register %s (%d) as %s.\n",
339 reg.className(), reg_class.regName(arch_reg), idx,
340 reg_class.valString(
val));
350 return reg_file.ptr(idx);
364 const auto ®_class = reg_file.regClass;
366 DPRINTFV(reg_class.debug(),
"Setting %s register %s (%d) to %#x.\n",
367 reg.className(), reg_class.regName(arch_reg), idx,
val);
368 reg_file.reg(idx) =
val;
379 const auto ®_class = reg_file.regClass;
381 DPRINTFV(reg_class.debug(),
"Setting %s register %s (%d) to %s.\n",
382 reg.className(), reg_class.regName(arch_reg), idx,
383 reg_class.valString(
val));
384 reg_file.set(idx,
val);
Generic definitions for hardware transactional memory.
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
virtual void setMiscReg(RegIndex idx, RegVal val)=0
virtual RegVal readMiscReg(RegIndex idx)=0
virtual RegVal readMiscRegNoEffect(RegIndex idx) const =0
virtual void setMiscRegNoEffect(RegIndex idx, RegVal val)=0
virtual PCStateBase * newPCState(Addr new_inst_addr=0) const =0
void demapPage(Addr vaddr, uint64_t asn)
Queue of events sorted in time order.
virtual std::string name() const
bool remove(PCEvent *event) override
bool schedule(PCEvent *event) override
Register ID: describe an architectural register with its class and index.
RegId flatten(const BaseISA &isa) const
The SimpleThread object provides a combination of the ThreadState object and the ThreadContext interf...
void setReg(const RegId &arch_reg, const void *val) override
RegVal readMiscRegNoEffect(RegIndex misc_reg) const override
int threadId() const override
ThreadContext * getTC()
Returns the pointer to this SimpleThread's ThreadContext.
void serialize(CheckpointOut &cp) const override
Serialize an object.
bool readPredicate() const
bool predicate
Did this instruction execute or is it predicated false.
void setPredicate(bool val)
BaseCPU * getCpuPtr() override
const PCStateBase & pcState() const override
Status status() const override
System * getSystemPtr() override
void pcState(const PCStateBase &val) override
int64_t htmTransactionStops
PCEventQueue pcEventQueue
void suspend() override
Set the status to Suspended.
void setProcessPtr(Process *p) override
BaseISA * getIsaPtr() const override
bool readMemAccPredicate()
void setHtmCheckpointPtr(BaseHTMCheckpointPtr new_cpt) override
void activate() override
Set the status to Active.
int cpuId() const override
void setContextId(ContextID id) override
bool remove(PCEvent *e) override
CheckerCPU * getCheckerCpuPtr() override
InstDecoder * getDecoderPtr() override
EventQueue comInstEventQueue
An instruction-based event queue.
void setStCondFailures(unsigned sc_failures) override
void pcStateNoRecord(const PCStateBase &val) override
std::array< RegFile, CCRegClass+1 > regFiles
std::unique_ptr< PCStateBase > _pcState
void setMiscReg(RegIndex misc_reg, RegVal val) override
void copyState(ThreadContext *oldContext)
void copyArchRegs(ThreadContext *tc) override
void demapPage(Addr vaddr, uint64_t asn)
void unserialize(CheckpointIn &cp) override
Unserialize an object.
void clearArchRegs() override
ThreadContext::Status Status
void * getWritableReg(const RegId &arch_reg) override
void takeOverFrom(ThreadContext *oldContext) override
Process * getProcessPtr() override
void setStatus(Status newStatus) override
void setThreadId(int id) override
void getReg(const RegId &arch_reg, void *val) const override
BaseHTMCheckpointPtr & getHtmCheckpointPtr() override
ContextID contextId() const override
Tick getCurrentInstCount() override
Tick readLastSuspend() override
std::unique_ptr< BaseHTMCheckpoint > _htmCheckpoint
unsigned readStCondFailures() const override
void descheduleInstCountEvent(Event *event) override
bool memAccPredicate
True if the memory access should be skipped for this instruction.
void setReg(const RegId &arch_reg, RegVal val) override
int64_t htmTransactionStarts
bool schedule(PCEvent *e) override
void setMiscRegNoEffect(RegIndex misc_reg, RegVal val) override
RegVal readMiscReg(RegIndex misc_reg) override
void htmAbortTransaction(uint64_t htm_uid, HtmFailureFaultCause cause) override
void setMemAccPredicate(bool val)
void halt() override
Set the status to Halted.
SimpleThread(BaseCPU *_cpu, int _thread_num, System *_system, BaseMMU *_mmu, BaseISA *_isa, InstDecoder *_decoder)
RegVal getReg(const RegId &arch_reg) const override
BaseMMU * getMMUPtr() override
void scheduleInstCountEvent(Event *event, Tick count) override
uint32_t socketId() const override
Tick readLastActivate() override
ThreadContext is the external interface to all thread state for anything outside of the CPU.
void schedule(Event *event, Tick when, bool global=false)
Schedule the given event on this queue.
void deschedule(Event *event)
Deschedule the specified event.
Tick getCurTick() const
While curTick() is useful for any object assigned to this event queue, if an object that is assigned ...
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
std::ostream CheckpointOut
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
uint64_t Tick
Tick count type.
int ContextID
Globally unique thread context ID.
std::string csprintf(const char *format, const Args &...args)
std::unique_ptr< BaseHTMCheckpoint > BaseHTMCheckpointPtr
Declarations of a non-full system Page Table.
Declaration of a request, the overall memory request consisting of the parts of the request that are ...
Struct for holding general thread state that is needed across CPU models.
ThreadID threadId() const
Tick readLastActivate() const
Process * getProcessPtr()
unsigned storeCondFailures
Tick readLastSuspend() const
void setProcessPtr(Process *p)
uint32_t socketId() const
ContextID contextId() const
ThreadContext::Status _status
void setContextId(ContextID id)
void setThreadId(ThreadID id)