gem5  v22.0.0.1
thread_context.hh
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27 
28 #ifndef __ARCH_ARM_FASTMODEL_CORTEXA76_THREAD_CONTEXT_HH__
29 #define __ARCH_ARM_FASTMODEL_CORTEXA76_THREAD_CONTEXT_HH__
30 
32 
33 namespace gem5
34 {
35 
36 GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
37 namespace fastmodel
38 {
39 
40 // This ThreadContext class translates accesses to state using gem5's native
41 // to the Iris API. This includes extracting and translating register indices.
43 {
44  protected:
52 
53  public:
54  CortexA76TC(gem5::BaseCPU *cpu, int id, System *system,
55  gem5::BaseMMU *mmu, gem5::BaseISA *isa,
56  iris::IrisConnectionInterface *iris_if,
57  const std::string &iris_path);
58 
59  bool translateAddress(Addr &paddr, Addr vaddr) override;
60 
61  void initFromIrisInstance(const ResourceMap &resources) override;
62 
63  RegVal readIntRegFlat(RegIndex idx) const override;
64  void setIntRegFlat(RegIndex idx, RegVal val) override;
65 
66  RegVal readCCRegFlat(RegIndex idx) const override;
67  void setCCRegFlat(RegIndex idx, RegVal val) override;
68 
69  const std::vector<iris::MemorySpaceId> &getBpSpaceIds() const override;
70 };
71 
72 } // namespace fastmodel
73 } // namespace gem5
74 
75 #endif // __ARCH_ARM_FASTMODEL_CORTEXA76_THREAD_CONTEXT_HH__
gem5::fastmodel::CortexA76TC::ccRegIdxNameMap
static IdxNameMap ccRegIdxNameMap
Definition: thread_context.hh:49
gem5::fastmodel::CortexA76TC::bpSpaceIds
static std::vector< iris::MemorySpaceId > bpSpaceIds
Definition: thread_context.hh:51
gem5::Iris::ThreadContext::IdxNameMap
std::map< int, std::string > IdxNameMap
Definition: thread_context.hh:59
gem5::RegVal
uint64_t RegVal
Definition: types.hh:173
gem5::fastmodel::CortexA76TC::getBpSpaceIds
const std::vector< iris::MemorySpaceId > & getBpSpaceIds() const override
Definition: thread_context.cc:181
gem5::fastmodel::CortexA76TC::CortexA76TC
CortexA76TC(gem5::BaseCPU *cpu, int id, System *system, gem5::BaseMMU *mmu, gem5::BaseISA *isa, iris::IrisConnectionInterface *iris_if, const std::string &iris_path)
Definition: thread_context.cc:42
gem5::fastmodel::CortexA76TC::initFromIrisInstance
void initFromIrisInstance(const ResourceMap &resources) override
Definition: thread_context.cc:80
gem5::fastmodel::CortexA76TC::vecRegIdxNameMap
static IdxNameMap vecRegIdxNameMap
Definition: thread_context.hh:50
gem5::X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:769
gem5::X86ISA::system
Bitfield< 15 > system
Definition: misc.hh:997
std::vector< iris::MemorySpaceId >
gem5::fastmodel::CortexA76TC::miscRegIdxNameMap
static IdxNameMap miscRegIdxNameMap
Definition: thread_context.hh:45
gem5::BaseMMU
Definition: mmu.hh:53
gem5::System
Definition: system.hh:75
gem5::Iris::ThreadContext
Definition: thread_context.hh:53
gem5::fastmodel::CortexA76TC::intReg32IdxNameMap
static IdxNameMap intReg32IdxNameMap
Definition: thread_context.hh:46
gem5::fastmodel::CortexA76TC::intReg64IdxNameMap
static IdxNameMap intReg64IdxNameMap
Definition: thread_context.hh:47
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::fastmodel::CortexA76TC::readCCRegFlat
RegVal readCCRegFlat(RegIndex idx) const override
Definition: thread_context.cc:141
gem5::GEM5_DEPRECATED_NAMESPACE
GEM5_DEPRECATED_NAMESPACE(GuestABI, guest_abi)
gem5::fastmodel::CortexA76TC::flattenedIntIdxNameMap
static IdxNameMap flattenedIntIdxNameMap
Definition: thread_context.hh:48
gem5::fastmodel::CortexA76TC
Definition: thread_context.hh:42
gem5::Iris::ThreadContext::ResourceMap
std::map< std::string, iris::ResourceInfo > ResourceMap
Definition: thread_context.hh:56
gem5::fastmodel::CortexA76TC::translateAddress
bool translateAddress(Addr &paddr, Addr vaddr) override
Definition: thread_context.cc:50
gem5::fastmodel::CortexA76TC::readIntRegFlat
RegVal readIntRegFlat(RegIndex idx) const override
Definition: thread_context.cc:99
gem5::MipsISA::vaddr
vaddr
Definition: pra_constants.hh:278
gem5::BaseISA
Definition: isa.hh:57
gem5::RegIndex
uint16_t RegIndex
Definition: types.hh:176
gem5::fastmodel::CortexA76TC::setCCRegFlat
void setCCRegFlat(RegIndex idx, RegVal val) override
Definition: thread_context.cc:158
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
thread_context.hh
gem5::fastmodel::CortexA76TC::setIntRegFlat
void setIntRegFlat(RegIndex idx, RegVal val) override
Definition: thread_context.cc:122

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