gem5  v21.2.1.1
se_workload.cc
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38 
40 
41 #include <sys/syscall.h>
42 
43 #include "arch/x86/linux/linux.hh"
44 #include "arch/x86/page_size.hh"
45 #include "arch/x86/process.hh"
46 #include "arch/x86/regs/int.hh"
47 #include "arch/x86/se_workload.hh"
48 #include "base/trace.hh"
49 #include "cpu/thread_context.hh"
50 #include "kern/linux/linux.hh"
52 #include "sim/process.hh"
53 #include "sim/syscall_desc.hh"
54 #include "sim/syscall_emul.hh"
55 
56 namespace gem5
57 {
58 
59 namespace
60 {
61 
62 class LinuxLoader : public Process::Loader
63 {
64  public:
65  Process *
66  load(const ProcessParams &params, loader::ObjectFile *obj_file)
67  {
68  auto arch = obj_file->getArch();
69  auto opsys = obj_file->getOpSys();
70 
71  if (arch != loader::X86_64 && arch != loader::I386)
72  return nullptr;
73 
74  if (opsys == loader::UnknownOpSys) {
75  warn("Unknown operating system; assuming Linux.");
76  opsys = loader::Linux;
77  }
78 
79  if (opsys != loader::Linux)
80  return nullptr;
81 
82  if (arch == loader::X86_64)
83  return new X86ISA::X86_64Process(params, obj_file);
84  else
85  return new X86ISA::I386Process(params, obj_file);
86  }
87 };
88 
89 LinuxLoader linuxLoader;
90 
91 } // anonymous namespace
92 
93 namespace X86ISA
94 {
95 
97 {}
98 
100  INTREG_RDI, INTREG_RSI, INTREG_RDX, INTREG_R10W, INTREG_R8W, INTREG_R9W
101 };
102 
104  INTREG_EBX, INTREG_ECX, INTREG_EDX, INTREG_ESI, INTREG_EDI, INTREG_EBP
105 };
106 
107 void
109 {
110  Process *process = tc->getProcessPtr();
111  // Call the syscall function in the base Process class to update stats.
112  // This will move into the base SEWorkload function at some point.
113  process->Process::syscall(tc);
114 
115  RegVal rax = tc->readIntReg(INTREG_RAX);
116  if (dynamic_cast<X86_64Process *>(process)) {
117  syscallDescs64.get(rax)->doSyscall(tc);
118  } else if (auto *proc32 = dynamic_cast<I386Process *>(process)) {
119  PCState pc = tc->pcState().as<PCState>();
120  Addr eip = pc.pc();
121  const auto &vsyscall = proc32->getVSyscallPage();
122  if (eip >= vsyscall.base && eip < vsyscall.base + vsyscall.size) {
123  pc.set(vsyscall.base + vsyscall.vsysexitOffset);
124  tc->pcState(pc);
125  }
126  syscallDescs32.get(rax)->doSyscall(tc);
127  } else {
128  panic("Unrecognized process type.");
129  }
130 }
131 
132 void
134 {
135  Process *process = tc->getProcessPtr();
136  Addr pc = tc->pcState().instAddr();
137 
138  if (process->kvmInSE) {
139  Addr pc_page = mbits(pc, 63, 12);
140  if (pc_page == syscallCodeVirtAddr) {
141  syscall(tc);
142  return;
143  } else if (pc_page == PFHandlerVirtAddr) {
144  pageFault(tc);
145  return;
146  }
147  }
148  warn("Unexpected workload event at pc %#x.", pc);
149 }
150 
151 void
153 {
154  Process *p = tc->getProcessPtr();
155  if (!p->fixupFault(tc->readMiscReg(MISCREG_CR2))) {
156  SETranslatingPortProxy proxy(tc);
157  // at this point we should have 6 values on the interrupt stack
158  int size = 6;
159  uint64_t is[size];
160  // reading the interrupt handler stack
161  proxy.readBlob(ISTVirtAddr + PageBytes - size * sizeof(uint64_t),
162  &is, sizeof(is));
163  panic("Page fault at addr %#x\n\tInterrupt handler stack:\n"
164  "\tss: %#x\n"
165  "\trsp: %#x\n"
166  "\trflags: %#x\n"
167  "\tcs: %#x\n"
168  "\trip: %#x\n"
169  "\terr_code: %#x\n",
171  is[5], is[4], is[3], is[2], is[1], is[0]);
172  }
173 }
174 
175 } // namespace X86ISA
176 } // namespace gem5
gem5::X86ISA::pc
Bitfield< 19 > pc
Definition: misc.hh:811
gem5::SETranslatingPortProxy
Definition: se_translating_port_proxy.hh:49
gem5::PCStateBase::instAddr
Addr instAddr() const
Returns the memory address of the instruction this PC points to.
Definition: pcstate.hh:107
gem5::ThreadContext::readMiscReg
virtual RegVal readMiscReg(RegIndex misc_reg)=0
warn
#define warn(...)
Definition: logging.hh:246
linux.hh
gem5::RegVal
uint64_t RegVal
Definition: types.hh:173
se_workload.hh
gem5::PCStateBase::as
Target & as()
Definition: pcstate.hh:72
gem5::X86ISA::PFHandlerVirtAddr
const Addr PFHandlerVirtAddr
Definition: se_workload.hh:46
gem5::ThreadContext::pcState
virtual const PCStateBase & pcState() const =0
gem5::loader::X86_64
@ X86_64
Definition: object_file.hh:56
gem5::X86ISA::EmuLinux::syscallDescs64
static SyscallDescTable< SyscallABI64 > syscallDescs64
Definition: se_workload.hh:91
std::vector< IntRegIndex >
gem5::X86ISA::PageShift
const Addr PageShift
Definition: page_size.hh:48
gem5::X86ISA::EmuLinux::event
void event(ThreadContext *tc) override
Definition: se_workload.cc:133
gem5::mbits
constexpr T mbits(T val, unsigned first, unsigned last)
Mask off the given bits in place like bits() but without shifting.
Definition: bitfield.hh:103
gem5::MipsISA::is
Bitfield< 24, 22 > is
Definition: pra_constants.hh:235
gem5::X86ISA::I386Process
Definition: process.hh:137
gem5::loader::UnknownOpSys
@ UnknownOpSys
Definition: object_file.hh:71
gem5::X86ISA::MISCREG_CR2
@ MISCREG_CR2
Definition: misc.hh:113
gem5::X86ISA::EmuLinux::SyscallABI32::ArgumentRegs
static const std::vector< IntRegIndex > ArgumentRegs
Definition: se_workload.hh:87
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:94
int.hh
process.hh
page_size.hh
gem5::PortProxy::readBlob
void readBlob(Addr addr, void *p, int size) const
Higher level interfaces based on the above.
Definition: port_proxy.hh:182
gem5::ArmISA::SEWorkload
Definition: se_workload.hh:42
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::ThreadContext::readIntReg
virtual RegVal readIntReg(RegIndex reg_idx) const =0
se_workload.hh
gem5::X86ISA::EmuLinux::EmuLinux
EmuLinux(const Params &p)
Definition: se_workload.cc:96
gem5::ArmISA::SEWorkload::Params
ArmSEWorkloadParams Params
Definition: se_workload.hh:45
gem5::Process
Definition: process.hh:68
gem5::ThreadContext::getProcessPtr
virtual Process * getProcessPtr()=0
gem5::X86ISA::EmuLinux::syscall
void syscall(ThreadContext *tc) override
Definition: se_workload.cc:108
syscall_emul.hh
process.hh
gem5::X86ISA::EmuLinux::pageFault
void pageFault(ThreadContext *tc)
Definition: se_workload.cc:152
gem5::X86ISA::ISTVirtAddr
const Addr ISTVirtAddr
Definition: se_workload.hh:45
gem5::X86ISA::EmuLinux::syscallDescs32
static SyscallDescTable< SyscallABI32 > syscallDescs32
Definition: se_workload.hh:92
linux.hh
gem5::X86ISA::PCState
Definition: pcstate.hh:50
gem5::loader::I386
@ I386
Definition: object_file.hh:57
gem5::X86ISA::p
Bitfield< 0 > p
Definition: pagetable.hh:151
se_translating_port_proxy.hh
trace.hh
gem5::X86ISA::X86_64Process
Definition: process.hh:99
gem5::X86ISA::EmuLinux::SyscallABI64::ArgumentRegs
static const std::vector< IntRegIndex > ArgumentRegs
Definition: se_workload.hh:81
gem5::X86ISA::PageBytes
const Addr PageBytes
Definition: page_size.hh:49
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
gem5::Process::kvmInSE
bool kvmInSE
Definition: process.hh:181
gem5::X86ISA::syscallCodeVirtAddr
const Addr syscallCodeVirtAddr
Definition: se_workload.hh:40
thread_context.hh
gem5::loader::Linux
@ Linux
Definition: object_file.hh:73
syscall_desc.hh
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:178

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