gem5 v24.0.0.0
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se_workload.cc
Go to the documentation of this file.
1/*
2 * Copyright 2007 The Hewlett-Packard Development Company
3 *
4 * The license below extends only to copyright in the software and shall
5 * not be construed as granting a license to any other intellectual
6 * property including but not limited to intellectual property relating
7 * to a hardware implementation of the functionality of the software
8 * licensed hereunder. You may use the software subject to the license
9 * terms below provided that you ensure that this notice is replicated
10 * unmodified and in its entirety in all distributions of the software,
11 * modified or unmodified, in source code or in binary form.
12 *
13 * Copyright 2020 Google Inc.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions are
17 * met: redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer;
19 * redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution;
22 * neither the name of the copyright holders nor the names of its
23 * contributors may be used to endorse or promote products derived from
24 * this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 */
38
40
41#include <sys/syscall.h>
42
44#include "arch/x86/page_size.hh"
45#include "arch/x86/process.hh"
46#include "arch/x86/regs/int.hh"
47#include "arch/x86/regs/misc.hh"
49#include "base/trace.hh"
50#include "cpu/thread_context.hh"
51#include "kern/linux/linux.hh"
53#include "sim/process.hh"
54#include "sim/syscall_desc.hh"
55#include "sim/syscall_emul.hh"
56
57namespace gem5
58{
59
60namespace
61{
62
63class LinuxLoader : public Process::Loader
64{
65 public:
66 Process *
67 load(const ProcessParams &params, loader::ObjectFile *obj_file)
68 {
69 auto arch = obj_file->getArch();
70 auto opsys = obj_file->getOpSys();
71
72 if (arch != loader::X86_64 && arch != loader::I386)
73 return nullptr;
74
75 if (opsys == loader::UnknownOpSys) {
76 warn("Unknown operating system; assuming Linux.");
77 opsys = loader::Linux;
78 }
79
80 if (opsys != loader::Linux)
81 return nullptr;
82
83 if (arch == loader::X86_64)
84 return new X86ISA::X86_64Process(params, obj_file);
85 else
86 return new X86ISA::I386Process(params, obj_file);
87 }
88};
89
90LinuxLoader linuxLoader;
91
92} // anonymous namespace
93
94namespace X86ISA
95{
96
99
103};
104
108};
109
110void
112{
113 Process *process = tc->getProcessPtr();
114 // Call the syscall function in the base Process class to update stats.
115 // This will move into the base SEWorkload function at some point.
116 process->Process::syscall(tc);
117
118 RegVal rax = tc->getReg(int_reg::Rax);
119 if (dynamic_cast<X86_64Process *>(process)) {
120 syscallDescs64.get(rax)->doSyscall(tc);
121 } else if (auto *proc32 = dynamic_cast<I386Process *>(process)) {
122 PCState pc = tc->pcState().as<PCState>();
123 Addr eip = pc.pc();
124 const auto &vsyscall = proc32->getVSyscallPage();
125 if (eip >= vsyscall.base && eip < vsyscall.base + vsyscall.size) {
126 pc.set(vsyscall.base + vsyscall.vsysexitOffset);
127 tc->pcState(pc);
128 }
129 syscallDescs32.get(rax)->doSyscall(tc);
130 } else {
131 panic("Unrecognized process type.");
132 }
133}
134
135void
137{
138 Process *process = tc->getProcessPtr();
139 Addr pc = tc->pcState().instAddr();
140
141 if (process->kvmInSE) {
142 Addr pc_page = mbits(pc, 63, 12);
143 if (pc_page == syscallCodeVirtAddr) {
144 syscall(tc);
145 return;
146 } else if (pc_page == PFHandlerVirtAddr) {
147 pageFault(tc);
148 return;
149 }
150 }
151 warn("Unexpected workload event at pc %#x.", pc);
152}
153
154void
156{
157 Process *p = tc->getProcessPtr();
158 if (!p->fixupFault(tc->readMiscReg(misc_reg::Cr2))) {
159 SETranslatingPortProxy proxy(tc);
160 // at this point we should have 6 values on the interrupt stack
161 int size = 6;
162 uint64_t is[size];
163 // reading the interrupt handler stack
164 proxy.readBlob(ISTVirtAddr + PageBytes - size * sizeof(uint64_t),
165 &is, sizeof(is));
166 panic("Page fault at addr %#x\n\tInterrupt handler stack:\n"
167 "\tss: %#x\n"
168 "\trsp: %#x\n"
169 "\trflags: %#x\n"
170 "\tcs: %#x\n"
171 "\trip: %#x\n"
172 "\terr_code: %#x\n",
174 is[5], is[4], is[3], is[2], is[1], is[0]);
175 }
176}
177
178} // namespace X86ISA
179} // namespace gem5
Target & as()
Definition pcstate.hh:73
Addr instAddr() const
Returns the memory address of the instruction this PC points to.
Definition pcstate.hh:108
void readBlob(Addr addr, void *p, uint64_t size) const
Higher level interfaces based on the above.
SEWorkloadParams Params
ThreadContext is the external interface to all thread state for anything outside of the CPU.
virtual RegVal readMiscReg(RegIndex misc_reg)=0
virtual RegVal getReg(const RegId &reg) const
virtual const PCStateBase & pcState() const =0
virtual Process * getProcessPtr()=0
static SyscallDescTable< SyscallABI64 > syscallDescs64
void event(ThreadContext *tc) override
void pageFault(ThreadContext *tc)
EmuLinux(const Params &p)
static SyscallDescTable< SyscallABI32 > syscallDescs32
void syscall(ThreadContext *tc) override
STL vector class.
Definition stl.hh:37
constexpr T mbits(T val, unsigned first, unsigned last)
Mask off the given bits in place like bits() but without shifting.
Definition bitfield.hh:106
#define panic(...)
This implements a cprintf based panic() function.
Definition logging.hh:188
#define warn(...)
Definition logging.hh:256
Bitfield< 24, 22 > is
constexpr RegId R9
Definition int.hh:141
constexpr RegId R8
Definition int.hh:140
constexpr auto & Ebp
Definition int.hh:163
constexpr auto & Ecx
Definition int.hh:159
constexpr RegId Rsi
Definition int.hh:138
constexpr RegId Rax
Definition int.hh:132
constexpr RegId Rdx
Definition int.hh:134
constexpr RegId Rdi
Definition int.hh:139
constexpr auto & Edx
Definition int.hh:160
constexpr auto & Edi
Definition int.hh:165
constexpr auto & Esi
Definition int.hh:164
constexpr RegId R10
Definition int.hh:142
constexpr auto & Ebx
Definition int.hh:161
Bitfield< 19 > pc
Definition misc.hh:840
const Addr PageShift
Definition page_size.hh:48
const Addr ISTVirtAddr
Bitfield< 0 > p
Definition pagetable.hh:151
const Addr syscallCodeVirtAddr
const Addr PFHandlerVirtAddr
const Addr PageBytes
Definition page_size.hh:49
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
uint64_t RegVal
Definition types.hh:173
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
static const std::vector< RegId > ArgumentRegs
Definition reg_abi.hh:45
static const std::vector< RegId > ArgumentRegs
Definition reg_abi.hh:50
This file defines objects used to emulate syscalls from the target application on the host machine.

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