ExecContext bears the exec_context interface for Minor. More...

#include <exec_context.hh>

Inheritance diagram for gem5::minor::ExecContext:

Public Member Functions
	ExecContext (MinorCPU &cpu_, SimpleThread &thread_, Execute &execute_, MinorDynInstPtr inst_)

	~ExecContext ()

Fault	initiateMemRead (Addr addr, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable) override
	Initiate a timing memory read operation.

Fault	initiateMemMgmtCmd (Request::Flags flags) override
	Initiate a memory management command with no valid address.

Fault	writeMem (uint8_t data, unsigned int size, Addr addr, Request::Flags flags, uint64_t res, const std::vector< bool > &byte_enable) override
	For atomic-mode contexts, perform an atomic memory write operation.

Fault	initiateMemAMO (Addr addr, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op) override
	For timing-mode contexts, initiate an atomic AMO (atomic read-modify-write memory operation)

RegVal	getRegOperand (const StaticInst *si, int idx) override

void	getRegOperand (const StaticInst si, int idx, void val) override

void *	getWritableRegOperand (const StaticInst *si, int idx) override

void	setRegOperand (const StaticInst *si, int idx, RegVal val) override

void	setRegOperand (const StaticInst si, int idx, const void val) override

bool	readPredicate () const override

void	setPredicate (bool val) override

bool	readMemAccPredicate () const override

void	setMemAccPredicate (bool val) override

uint64_t	getHtmTransactionUid () const override

uint64_t	newHtmTransactionUid () const override

bool	inHtmTransactionalState () const override

uint64_t	getHtmTransactionalDepth () const override

const PCStateBase &	pcState () const override

void	pcState (const PCStateBase &val) override

RegVal	readMiscRegNoEffect (int misc_reg) const

RegVal	readMiscReg (int misc_reg) override
	Reads a miscellaneous register, handling any architectural side effects due to reading that register.

void	setMiscReg (int misc_reg, RegVal val) override
	Sets a miscellaneous register, handling any architectural side effects due to writing that register.

RegVal	readMiscRegOperand (const StaticInst *si, int idx) override

void	setMiscRegOperand (const StaticInst *si, int idx, RegVal val) override

ThreadContext *	tcBase () const override
	Returns a pointer to the ThreadContext.

unsigned int	readStCondFailures () const override
	Returns the number of consecutive store conditional failures.

void	setStCondFailures (unsigned int st_cond_failures) override
	Sets the number of consecutive store conditional failures.

ContextID	contextId ()

void	demapPage (Addr vaddr, uint64_t asn) override
	Invalidate a page in the DTLB and ITLB.

BaseCPU *	getCpuPtr ()

void	armMonitor (Addr address) override

bool	mwait (PacketPtr pkt) override

void	mwaitAtomic (ThreadContext *tc) override

AddressMonitor *	getAddrMonitor () override

Public Member Functions inherited from gem5::ExecContext
virtual Fault	readMem (Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable)
	Perform an atomic memory read operation.

virtual Fault	amoMem (Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op)
	For atomic-mode contexts, perform an atomic AMO (a.k.a., Atomic Read-Modify-Write Memory Operation)

Public Attributes
MinorCPU &	cpu

SimpleThread &	thread
	ThreadState object, provides all the architectural state.

Execute &	execute
	The execute stage so we can peek at its contents.

MinorDynInstPtr	inst
	Instruction for the benefit of memory operations and for PC.

Detailed Description

ExecContext bears the exec_context interface for Minor.

This nicely separates that interface from other classes such as Pipeline, MinorCPU and DynMinorInst and makes it easier to see what state is accessed by it.

Definition at line 72 of file exec_context.hh.

Constructor & Destructor Documentation

◆ ExecContext()

gem5::minor::ExecContext::ExecContext	(	MinorCPU &	cpu_,
		SimpleThread &	thread_,
		Execute &	execute_,
		MinorDynInstPtr	inst_ )

inline

Definition at line 86 of file exec_context.hh.

References DPRINTF, inst, pcState(), setMemAccPredicate(), and setPredicate().

◆ ~ExecContext()

gem5::minor::ExecContext::~ExecContext ( )

inline

Definition at line 101 of file exec_context.hh.

References inst, readMemAccPredicate(), and readPredicate().

Member Function Documentation

◆ armMonitor()

void gem5::minor::ExecContext::armMonitor ( Addr address )

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 306 of file exec_context.hh.

References gem5::BaseCPU::armMonitor(), getCpuPtr(), and inst.

◆ contextId()

ContextID gem5::minor::ExecContext::contextId ( )

inline

Definition at line 291 of file exec_context.hh.

References gem5::SimpleThread::contextId(), and thread.

◆ demapPage()

void gem5::minor::ExecContext::demapPage	(	Addr	vaddr,
		uint64_t	asn )

inlineoverridevirtual

Invalidate a page in the DTLB and ITLB.

Implements gem5::ExecContext.

Definition at line 296 of file exec_context.hh.

References gem5::BaseMMU::demapPage(), gem5::SimpleThread::getMMUPtr(), thread, and gem5::MipsISA::vaddr.

◆ getAddrMonitor()

AddressMonitor * gem5::minor::ExecContext::getAddrMonitor ( )

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 324 of file exec_context.hh.

References gem5::BaseCPU::getCpuAddrMonitor(), getCpuPtr(), and inst.

◆ getCpuPtr()

BaseCPU * gem5::minor::ExecContext::getCpuPtr ( )

inline

Definition at line 301 of file exec_context.hh.

References cpu.

Referenced by armMonitor(), getAddrMonitor(), mwait(), and mwaitAtomic().

◆ getHtmTransactionalDepth()

uint64_t gem5::minor::ExecContext::getHtmTransactionalDepth ( ) const

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 232 of file exec_context.hh.

References panic.

◆ getHtmTransactionUid()

uint64_t gem5::minor::ExecContext::getHtmTransactionUid ( ) const

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 208 of file exec_context.hh.

References panic.

◆ getRegOperand() [1/2]

RegVal gem5::minor::ExecContext::getRegOperand	(	const StaticInst *	si,
		int	idx )

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 147 of file exec_context.hh.

References gem5::SimpleThread::getReg(), gem5::InvalidRegClass, gem5::X86ISA::reg, gem5::ArmISA::si, and thread.

◆ getRegOperand() [2/2]

void gem5::minor::ExecContext::getRegOperand	(	const StaticInst *	si,
		int	idx,
		void *	val )

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 156 of file exec_context.hh.

References gem5::SimpleThread::getReg(), gem5::ArmISA::si, thread, and gem5::X86ISA::val.

◆ getWritableRegOperand()

void * gem5::minor::ExecContext::getWritableRegOperand	(	const StaticInst *	si,
		int	idx )

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 162 of file exec_context.hh.

References gem5::SimpleThread::getWritableReg(), gem5::ArmISA::si, and thread.

◆ inHtmTransactionalState()

bool gem5::minor::ExecContext::inHtmTransactionalState ( ) const

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 224 of file exec_context.hh.

◆ initiateMemAMO()

Fault gem5::minor::ExecContext::initiateMemAMO	(	Addr	addr,
		unsigned int	size,
		Request::Flags	flags,
		AtomicOpFunctorPtr	amo_op )

inlineoverridevirtual

For timing-mode contexts, initiate an atomic AMO (atomic read-modify-write memory operation)

Reimplemented from gem5::ExecContext.

Definition at line 137 of file exec_context.hh.

References gem5::X86ISA::addr, execute, flags, gem5::minor::Execute::getLSQ(), inst, and gem5::minor::LSQ::pushRequest().

◆ initiateMemMgmtCmd()

Fault gem5::minor::ExecContext::initiateMemMgmtCmd ( Request::Flags flags )

inlineoverridevirtual

Initiate a memory management command with no valid address.

Currently, these instructions need to bypass squashing in the O3 model Examples include HTM commands and TLBI commands. e.g. tell Ruby we're starting/stopping a HTM transaction, or tell Ruby to issue a TLBI operation

Implements gem5::ExecContext.

Definition at line 118 of file exec_context.hh.

References gem5::NoFault, and panic.

◆ initiateMemRead()

Fault gem5::minor::ExecContext::initiateMemRead	(	Addr	addr,
		unsigned int	size,
		Request::Flags	flags,
		const std::vector< bool > &	byte_enable )

inlineoverridevirtual

Initiate a timing memory read operation.

Must be overridden for exec contexts that support timing memory mode. Not pure virtual since exec contexts that only support atomic memory mode need not override (though in that case this function should never be called).

Reimplemented from gem5::ExecContext.

Definition at line 108 of file exec_context.hh.

References gem5::X86ISA::addr, execute, flags, gem5::minor::Execute::getLSQ(), inst, and gem5::minor::LSQ::pushRequest().

◆ mwait()

bool gem5::minor::ExecContext::mwait ( PacketPtr pkt )

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 312 of file exec_context.hh.

References getCpuPtr(), inst, and gem5::BaseCPU::mwait().

◆ mwaitAtomic()

void gem5::minor::ExecContext::mwaitAtomic ( ThreadContext * tc )

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 318 of file exec_context.hh.

References getCpuPtr(), inst, gem5::SimpleThread::mmu, gem5::BaseCPU::mwaitAtomic(), and thread.

◆ newHtmTransactionUid()

uint64_t gem5::minor::ExecContext::newHtmTransactionUid ( ) const

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 216 of file exec_context.hh.

References panic.

◆ pcState() [1/2]

const PCStateBase & gem5::minor::ExecContext::pcState ( ) const

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 240 of file exec_context.hh.

References gem5::SimpleThread::pcState(), and thread.

Referenced by ExecContext().

◆ pcState() [2/2]

void gem5::minor::ExecContext::pcState ( const PCStateBase & val )

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 246 of file exec_context.hh.

References gem5::SimpleThread::pcState(), thread, and gem5::X86ISA::val.

◆ readMemAccPredicate()

bool gem5::minor::ExecContext::readMemAccPredicate ( ) const

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 195 of file exec_context.hh.

References gem5::SimpleThread::readMemAccPredicate(), and thread.

Referenced by gem5::minor::Execute::executeMemRefInst(), gem5::minor::Execute::handleMemResponse(), and ~ExecContext().

◆ readMiscReg()

RegVal gem5::minor::ExecContext::readMiscReg ( int misc_reg )

inlineoverridevirtual

Reads a miscellaneous register, handling any architectural side effects due to reading that register.

Implements gem5::ExecContext.

Definition at line 258 of file exec_context.hh.

References gem5::SimpleThread::readMiscReg(), and thread.

◆ readMiscRegNoEffect()

RegVal gem5::minor::ExecContext::readMiscRegNoEffect ( int misc_reg ) const

inline

Definition at line 252 of file exec_context.hh.

References gem5::SimpleThread::readMiscRegNoEffect(), and thread.

◆ readMiscRegOperand()

RegVal gem5::minor::ExecContext::readMiscRegOperand	(	const StaticInst *	si,
		int	idx )

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 270 of file exec_context.hh.

References gem5::MiscRegClass, gem5::SimpleThread::readMiscReg(), gem5::X86ISA::reg, gem5::ArmISA::si, and thread.

◆ readPredicate()

bool gem5::minor::ExecContext::readPredicate ( ) const

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 183 of file exec_context.hh.

References gem5::SimpleThread::readPredicate(), and thread.

Referenced by gem5::minor::Execute::commitInst(), gem5::minor::Execute::executeMemRefInst(), gem5::minor::Execute::handleMemResponse(), and ~ExecContext().

◆ readStCondFailures()

unsigned int gem5::minor::ExecContext::readStCondFailures ( ) const

inlineoverridevirtual

Returns the number of consecutive store conditional failures.

Implements gem5::ExecContext.

Definition at line 288 of file exec_context.hh.

◆ setMemAccPredicate()

void gem5::minor::ExecContext::setMemAccPredicate ( bool val )

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 201 of file exec_context.hh.

References gem5::SimpleThread::setMemAccPredicate(), thread, and gem5::X86ISA::val.

Referenced by gem5::minor::LSQ::LSQRequest::completeDisabledMemAccess(), and ExecContext().

◆ setMiscReg()

void gem5::minor::ExecContext::setMiscReg	(	int	misc_reg,
		RegVal	val )

inlineoverridevirtual

Sets a miscellaneous register, handling any architectural side effects due to writing that register.

Implements gem5::ExecContext.

Definition at line 264 of file exec_context.hh.

References gem5::SimpleThread::setMiscReg(), thread, and gem5::X86ISA::val.

◆ setMiscRegOperand()

void gem5::minor::ExecContext::setMiscRegOperand	(	const StaticInst *	si,
		int	idx,
		RegVal	val )

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 278 of file exec_context.hh.

References gem5::MiscRegClass, gem5::X86ISA::reg, gem5::SimpleThread::setMiscReg(), gem5::ArmISA::si, thread, and gem5::X86ISA::val.

◆ setPredicate()

void gem5::minor::ExecContext::setPredicate ( bool val )

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 189 of file exec_context.hh.

References gem5::SimpleThread::setPredicate(), thread, and gem5::X86ISA::val.

Referenced by ExecContext().

◆ setRegOperand() [1/2]

void gem5::minor::ExecContext::setRegOperand	(	const StaticInst *	si,
		int	idx,
		const void *	val )

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 177 of file exec_context.hh.

References gem5::SimpleThread::setReg(), gem5::ArmISA::si, thread, and gem5::X86ISA::val.

◆ setRegOperand() [2/2]

void gem5::minor::ExecContext::setRegOperand	(	const StaticInst *	si,
		int	idx,
		RegVal	val )

inlineoverridevirtual

Implements gem5::ExecContext.

Definition at line 168 of file exec_context.hh.

References gem5::InvalidRegClass, gem5::X86ISA::reg, gem5::SimpleThread::setReg(), gem5::ArmISA::si, thread, and gem5::X86ISA::val.

◆ setStCondFailures()

void gem5::minor::ExecContext::setStCondFailures ( unsigned int sc_failures )

inlineoverridevirtual

Sets the number of consecutive store conditional failures.

Implements gem5::ExecContext.

Definition at line 289 of file exec_context.hh.

◆ tcBase()

ThreadContext * gem5::minor::ExecContext::tcBase ( ) const

inlineoverridevirtual

Returns a pointer to the ThreadContext.

Implements gem5::ExecContext.

Definition at line 285 of file exec_context.hh.

References gem5::SimpleThread::getTC(), and thread.

◆ writeMem()

Fault gem5::minor::ExecContext::writeMem	(	uint8_t *	data,
		unsigned int	size,
		Addr	addr,
		Request::Flags	flags,
		uint64_t *	res,
		const std::vector< bool > &	byte_enable )

inlineoverridevirtual

For atomic-mode contexts, perform an atomic memory write operation.

For timing-mode contexts, initiate a timing memory write operation.

Implements gem5::ExecContext.

Definition at line 126 of file exec_context.hh.

References gem5::X86ISA::addr, data, execute, flags, gem5::minor::Execute::getLSQ(), inst, and gem5::minor::LSQ::pushRequest().

Member Data Documentation

◆ cpu

MinorCPU& gem5::minor::ExecContext::cpu

Definition at line 75 of file exec_context.hh.

Referenced by getCpuPtr().

◆ execute

Execute& gem5::minor::ExecContext::execute

The execute stage so we can peek at its contents.

Definition at line 81 of file exec_context.hh.

Referenced by initiateMemAMO(), initiateMemRead(), and writeMem().

◆ inst

MinorDynInstPtr gem5::minor::ExecContext::inst

Instruction for the benefit of memory operations and for PC.

Definition at line 84 of file exec_context.hh.

Referenced by armMonitor(), ExecContext(), getAddrMonitor(), initiateMemAMO(), initiateMemRead(), mwait(), mwaitAtomic(), writeMem(), and ~ExecContext().

◆ thread

SimpleThread& gem5::minor::ExecContext::thread

ThreadState object, provides all the architectural state.

Definition at line 78 of file exec_context.hh.

Referenced by contextId(), demapPage(), getRegOperand(), getRegOperand(), getWritableRegOperand(), mwaitAtomic(), pcState(), pcState(), readMemAccPredicate(), readMiscReg(), readMiscRegNoEffect(), readMiscRegOperand(), readPredicate(), setMemAccPredicate(), setMiscReg(), setMiscRegOperand(), setPredicate(), setRegOperand(), setRegOperand(), and tcBase().

The documentation for this class was generated from the following file:

cpu/minor/exec_context.hh

Public Member Functions

Public Attributes

Detailed Description

Constructor & Destructor Documentation

◆ ExecContext()

◆ ~ExecContext()

Member Function Documentation

◆ armMonitor()

◆ contextId()

◆ demapPage()

◆ getAddrMonitor()

◆ getCpuPtr()

◆ getHtmTransactionalDepth()

◆ getHtmTransactionUid()

◆ getRegOperand() [1/2]

◆ getRegOperand() [2/2]

◆ getWritableRegOperand()

◆ inHtmTransactionalState()

◆ initiateMemAMO()

◆ initiateMemMgmtCmd()

◆ initiateMemRead()

◆ mwait()

◆ mwaitAtomic()

◆ newHtmTransactionUid()

◆ pcState() [1/2]

◆ pcState() [2/2]

◆ readMemAccPredicate()

◆ readMiscReg()

◆ readMiscRegNoEffect()

◆ readMiscRegOperand()

◆ readPredicate()

◆ readStCondFailures()

◆ setMemAccPredicate()

◆ setMiscReg()

◆ setMiscRegOperand()

◆ setPredicate()

◆ setRegOperand() [1/2]

◆ setRegOperand() [2/2]

◆ setStCondFailures()

◆ tcBase()

◆ writeMem()

Member Data Documentation

◆ cpu

◆ execute

◆ inst

◆ thread