gem5 v24.0.0.0
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#include <HTMSequencer.hh>
Public Member Functions | |
HTMSequencer (const RubyHTMSequencerParams &p) | |
~HTMSequencer () | |
void | htmCallback (Addr, const HtmCallbackMode, const HtmFailedInCacheReason) |
bool | empty () const override |
void | print (std::ostream &out) const override |
void | wakeup () override |
Public Member Functions inherited from gem5::ruby::Sequencer | |
Sequencer (const Params &) | |
~Sequencer () | |
void | writeCallbackScFail (Addr address, DataBlock &data) |
Proxy function to writeCallback that first invalidates the line address in the local monitor. | |
void | resetStats () override |
Callback to reset stats. | |
void | collateStats () |
void | writeCallback (Addr address, DataBlock &data, const bool externalHit=false, const MachineType mach=MachineType_NUM, const Cycles initialRequestTime=Cycles(0), const Cycles forwardRequestTime=Cycles(0), const Cycles firstResponseTime=Cycles(0), const bool noCoales=false) |
void | writeUniqueCallback (Addr address, DataBlock &data) |
void | readCallback (Addr address, DataBlock &data, const bool externalHit=false, const MachineType mach=MachineType_NUM, const Cycles initialRequestTime=Cycles(0), const Cycles forwardRequestTime=Cycles(0), const Cycles firstResponseTime=Cycles(0)) |
void | atomicCallback (Addr address, DataBlock &data, const bool externalHit=false, const MachineType mach=MachineType_NUM, const Cycles initialRequestTime=Cycles(0), const Cycles forwardRequestTime=Cycles(0), const Cycles firstResponseTime=Cycles(0)) |
void | unaddressedCallback (Addr unaddressedReqId, RubyRequestType requestType, const MachineType mach=MachineType_NUM, const Cycles initialRequestTime=Cycles(0), const Cycles forwardRequestTime=Cycles(0), const Cycles firstResponseTime=Cycles(0)) |
void | completeHitCallback (std::vector< PacketPtr > &list) |
void | invL1Callback () |
void | invL1 () |
RequestStatus | makeRequest (PacketPtr pkt) override |
int | outstandingCount () const override |
bool | isDeadlockEventScheduled () const override |
void | descheduleDeadlockEvent () override |
void | markRemoved () |
void | evictionCallback (Addr address) |
int | coreId () const |
virtual int | functionalWrite (Packet *func_pkt) override |
void | recordRequestType (SequencerRequestType requestType) |
statistics::Histogram & | getOutstandReqHist () |
statistics::Histogram & | getLatencyHist () |
statistics::Histogram & | getTypeLatencyHist (uint32_t t) |
statistics::Histogram & | getHitLatencyHist () |
statistics::Histogram & | getHitTypeLatencyHist (uint32_t t) |
statistics::Histogram & | getHitMachLatencyHist (uint32_t t) |
statistics::Histogram & | getHitTypeMachLatencyHist (uint32_t r, uint32_t t) |
statistics::Histogram & | getMissLatencyHist () |
statistics::Histogram & | getMissTypeLatencyHist (uint32_t t) |
statistics::Histogram & | getMissMachLatencyHist (uint32_t t) const |
statistics::Histogram & | getMissTypeMachLatencyHist (uint32_t r, uint32_t t) const |
statistics::Histogram & | getIssueToInitialDelayHist (uint32_t t) const |
statistics::Histogram & | getInitialToForwardDelayHist (const MachineType t) const |
statistics::Histogram & | getForwardRequestToFirstResponseHist (const MachineType t) const |
statistics::Histogram & | getFirstResponseToCompletionDelayHist (const MachineType t) const |
statistics::Counter | getIncompleteTimes (const MachineType t) const |
bool | llscCheckMonitor (const Addr) |
Searches for cache line address in the global monitor tagged with this Sequencer object's version id. | |
void | llscClearLocalMonitor () |
Removes all addresses from the local monitor. | |
Public Member Functions inherited from gem5::ruby::RubyPort | |
RubyPort (const Params &p) | |
virtual | ~RubyPort () |
void | init () override |
init() is called after all C++ SimObjects have been created and all ports are connected. | |
Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
Get a port with a given name and index. | |
void | setController (AbstractController *_cntrl) |
uint32_t | getId () |
DrainState | drain () override |
Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are partially executed or are partially in flight. | |
bool | isCPUSequencer () |
Public Member Functions inherited from gem5::ClockedObject | |
ClockedObject (const ClockedObjectParams &p) | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. | |
Public Member Functions inherited from gem5::SimObject | |
const Params & | params () const |
SimObject (const Params &p) | |
virtual | ~SimObject () |
virtual void | loadState (CheckpointIn &cp) |
loadState() is called on each SimObject when restoring from a checkpoint. | |
virtual void | initState () |
initState() is called on each SimObject when not restoring from a checkpoint. | |
virtual void | regProbePoints () |
Register probe points for this object. | |
virtual void | regProbeListeners () |
Register probe listeners for this object. | |
ProbeManager * | getProbeManager () |
Get the probe manager for this object. | |
virtual void | startup () |
startup() is the final initialization call before simulation. | |
DrainState | drain () override |
Provide a default implementation of the drain interface for objects that don't need draining. | |
virtual void | memWriteback () |
Write back dirty buffers to memory using functional writes. | |
virtual void | memInvalidate () |
Invalidate the contents of memory buffers. | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. | |
Public Member Functions inherited from gem5::EventManager | |
EventQueue * | eventQueue () const |
void | schedule (Event &event, Tick when) |
void | deschedule (Event &event) |
void | reschedule (Event &event, Tick when, bool always=false) |
void | schedule (Event *event, Tick when) |
void | deschedule (Event *event) |
void | reschedule (Event *event, Tick when, bool always=false) |
void | wakeupEventQueue (Tick when=(Tick) -1) |
This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. | |
void | setCurTick (Tick newVal) |
EventManager (EventManager &em) | |
Event manger manages events in the event queue. | |
EventManager (EventManager *em) | |
EventManager (EventQueue *eq) | |
Public Member Functions inherited from gem5::Serializable | |
Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Member Functions inherited from gem5::Drainable | |
DrainState | drainState () const |
Return the current drain state of an object. | |
virtual void | notifyFork () |
Notify a child process of a fork. | |
Public Member Functions inherited from gem5::statistics::Group | |
Group (Group *parent, const char *name=nullptr) | |
Construct a new statistics group. | |
virtual | ~Group () |
virtual void | regStats () |
Callback to set stat parameters. | |
virtual void | preDumpStats () |
Callback before stats are dumped. | |
void | addStat (statistics::Info *info) |
Register a stat with this group. | |
const std::map< std::string, Group * > & | getStatGroups () const |
Get all child groups associated with this object. | |
const std::vector< Info * > & | getStats () const |
Get all stats associated with this object. | |
void | addStatGroup (const char *name, Group *block) |
Add a stat block as a child of this block. | |
const Info * | resolveStat (std::string name) const |
Resolve a stat by its name within this group. | |
void | mergeStatGroup (Group *block) |
Merge the contents (stats & children) of a block to this block. | |
Group ()=delete | |
Group (const Group &)=delete | |
Group & | operator= (const Group &)=delete |
Public Member Functions inherited from gem5::Named | |
Named (const std::string &name_) | |
virtual | ~Named ()=default |
virtual std::string | name () const |
Public Member Functions inherited from gem5::Clocked | |
void | updateClockPeriod () |
Update the tick to the current tick. | |
Tick | clockEdge (Cycles cycles=Cycles(0)) const |
Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. | |
Cycles | curCycle () const |
Determine the current cycle, corresponding to a tick aligned to a clock edge. | |
Tick | nextCycle () const |
Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. | |
uint64_t | frequency () const |
Tick | clockPeriod () const |
double | voltage () const |
Cycles | ticksToCycles (Tick t) const |
Tick | cyclesToTicks (Cycles c) const |
Private Member Functions | |
HtmCacheFailure | htmRetCodeConversion (const HtmFailedInCacheReason rc) |
Htm return code conversion. | |
void | rubyHtmCallback (PacketPtr pkt, const HtmFailedInCacheReason fail_r) |
RequestStatus | insertRequest (PacketPtr pkt, RubyRequestType primary_type, RubyRequestType secondary_type) override |
HTMSequencer (const HTMSequencer &obj) | |
HTMSequencer & | operator= (const HTMSequencer &obj) |
Private Attributes | |
std::deque< SequencerRequest * > | m_htmCmdRequestTable |
Tick | m_htmstart_tick |
Counter | m_htmstart_instruction |
statistics::Histogram | m_htm_transaction_cycles |
Histogram of cycle latencies of HTM transactions. | |
statistics::Histogram | m_htm_transaction_instructions |
Histogram of instruction lengths of HTM transactions. | |
statistics::Vector | m_htm_transaction_abort_cause |
Causes for HTM transaction aborts. | |
Additional Inherited Members | |
Public Types inherited from gem5::ruby::Sequencer | |
typedef RubySequencerParams | Params |
Public Types inherited from gem5::ruby::RubyPort | |
typedef RubyPortParams | Params |
Public Types inherited from gem5::ClockedObject | |
using | Params = ClockedObjectParams |
Parameters of ClockedObject. | |
Public Types inherited from gem5::SimObject | |
typedef SimObjectParams | Params |
Static Public Member Functions inherited from gem5::SimObject | |
static void | serializeAll (const std::string &cpt_dir) |
Create a checkpoint by serializing all SimObjects in the system. | |
static SimObject * | find (const char *name) |
Find the SimObject with the given name and return a pointer to it. | |
static void | setSimObjectResolver (SimObjectResolver *resolver) |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
static SimObjectResolver * | getSimObjectResolver () |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
Static Public Member Functions inherited from gem5::Serializable | |
static const std::string & | currentSection () |
Gets the fully-qualified name of the active section. | |
static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
Generate a checkpoint file so that the serialization can be routed to it. | |
Public Attributes inherited from gem5::ClockedObject | |
PowerState * | powerState |
Protected Member Functions inherited from gem5::ruby::RubyPort | |
void | trySendRetries () |
void | ruby_hit_callback (PacketPtr pkt) |
void | ruby_unaddressed_callback (PacketPtr pkt) |
void | ruby_stale_translation_callback (Addr txnId) |
void | testDrainComplete () |
void | ruby_eviction_callback (Addr address) |
bool | recvTimingResp (PacketPtr pkt, PortID request_port_id) |
Called by the PIO port when receiving a timing response. | |
Protected Member Functions inherited from gem5::Drainable | |
Drainable () | |
virtual | ~Drainable () |
virtual void | drainResume () |
Resume execution after a successful drain. | |
void | signalDrainDone () const |
Signal that an object is drained. | |
Protected Member Functions inherited from gem5::Clocked | |
Clocked (ClockDomain &clk_domain) | |
Create a clocked object and set the clock domain based on the parameters. | |
Clocked (Clocked &)=delete | |
Clocked & | operator= (Clocked &)=delete |
virtual | ~Clocked () |
Virtual destructor due to inheritance. | |
void | resetClock () const |
Reset the object's clock using the current global tick value. | |
virtual void | clockPeriodUpdated () |
A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. | |
Protected Attributes inherited from gem5::ruby::Sequencer | |
std::unordered_map< Addr, std::list< SequencerRequest > > | m_RequestTable |
std::unordered_map< uint64_t, SequencerRequest > | m_UnaddressedRequestTable |
Cycles | m_deadlock_threshold |
Protected Attributes inherited from gem5::ruby::RubyPort | |
RubySystem * | m_ruby_system |
uint32_t | m_version |
AbstractController * | m_controller |
MessageBuffer * | m_mandatory_q_ptr |
bool | m_usingRubyTester |
System * | system |
std::vector< MemResponsePort * > | response_ports |
Protected Attributes inherited from gem5::SimObject | |
const SimObjectParams & | _params |
Cached copy of the object parameters. | |
Protected Attributes inherited from gem5::EventManager | |
EventQueue * | eventq |
A pointer to this object's event queue. | |
Definition at line 57 of file HTMSequencer.hh.
gem5::ruby::HTMSequencer::HTMSequencer | ( | const RubyHTMSequencerParams & | p | ) |
Definition at line 69 of file HTMSequencer.cc.
References gem5::statistics::dist, gem5::statistics::DataWrap< Derived, InfoProxyType >::flags(), gem5::htmFailureToStr(), gem5::statistics::Histogram::init(), gem5::statistics::VectorBase< Derived, Stor >::init(), m_htm_transaction_abort_cause, m_htm_transaction_cycles, m_htm_transaction_instructions, m_htmstart_instruction, m_htmstart_tick, gem5::statistics::nonan, gem5::statistics::nozero, gem5::NUM_CAUSES, gem5::statistics::pdf, gem5::statistics::DataWrapVec< Derived, InfoProxyType >::subname(), and gem5::statistics::total.
gem5::ruby::HTMSequencer::~HTMSequencer | ( | ) |
Definition at line 106 of file HTMSequencer.cc.
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Reimplemented from gem5::ruby::Sequencer.
Definition at line 279 of file HTMSequencer.cc.
References gem5::ruby::Sequencer::empty(), and m_htmCmdRequestTable.
void gem5::ruby::HTMSequencer::htmCallback | ( | Addr | address, |
const HtmCallbackMode | mode, | ||
const HtmFailedInCacheReason | htm_return_code ) |
Definition at line 111 of file HTMSequencer.cc.
References DPRINTF, gem5::Packet::getHtmTransactionUid(), gem5::Packet::getPtr(), gem5::Packet::getSize(), gem5::htmFailureToStr(), gem5::INVALID, gem5::ruby::isHtmCmdRequest(), m_htm_transaction_abort_cause, m_htm_transaction_cycles, m_htm_transaction_instructions, m_htmCmdRequestTable, m_htmstart_instruction, m_htmstart_tick, gem5::ruby::Sequencer::m_RequestTable, gem5::ruby::SequencerRequest::m_type, gem5::ruby::makeLineAddress(), gem5::ruby::Sequencer::markRemoved(), gem5::ArmISA::mode, panic, gem5::ruby::SequencerRequest::pkt, gem5::Packet::req, rubyHtmCallback(), gem5::statistics::DistBase< Derived, Stor >::sample(), gem5::ruby::RubyPort::testDrainComplete(), and gem5::Clocked::ticksToCycles().
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Htm return code conversion.
This helper is a hack meant to convert the autogenerated ruby enum (HtmFailedInCacheReason) to the manually defined one (HtmCacheFailure). This is needed since the cpu code would otherwise have to include the ruby generated headers in order to handle the htm return code.
Definition at line 52 of file HTMSequencer.cc.
References gem5::FAIL_OTHER, gem5::FAIL_REMOTE, gem5::FAIL_SELF, gem5::NO_FAIL, and panic.
Referenced by rubyHtmCallback().
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overrideprivatevirtual |
Reimplemented from gem5::ruby::Sequencer.
Definition at line 312 of file HTMSequencer.cc.
References gem5::Clocked::curCycle(), gem5::ruby::Sequencer::insertRequest(), gem5::ruby::isHtmCmdRequest(), m_htmCmdRequestTable, and gem5::Packet::req.
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overridevirtual |
Reimplemented from gem5::ruby::Sequencer.
Definition at line 300 of file HTMSequencer.cc.
References m_htmCmdRequestTable, gem5::ruby::RubyPort::m_version, and gem5::ruby::Sequencer::print().
Referenced by gem5::ruby::operator<<().
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Definition at line 213 of file HTMSequencer.cc.
References gem5::curTick(), DPRINTF, gem5::Packet::getAddr(), htmRetCodeConversion(), gem5::System::isDeviceMemAddr(), gem5::System::isMemAddr(), gem5::Packet::isRequest(), gem5::Packet::makeHtmTransactionalReqResponse(), gem5::Packet::needsResponse(), gem5::Packet::popSenderState(), gem5::ruby::RubyPort::SenderState::port, gem5::Packet::req, gem5::safe_cast(), gem5::QueuedResponsePort::schedTimingResp(), gem5::ruby::RubyPort::system, and gem5::ruby::RubyPort::trySendRetries().
Referenced by htmCallback().
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Reimplemented from gem5::ruby::Sequencer.
Definition at line 249 of file HTMSequencer.cc.
References gem5::Clocked::clockPeriod(), gem5::Clocked::curCycle(), gem5::ruby::SequencerRequest::issue_time, gem5::ruby::Sequencer::m_deadlock_threshold, m_htmCmdRequestTable, gem5::ruby::RubyPort::m_version, panic, and gem5::ruby::Sequencer::wakeup().
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Causes for HTM transaction aborts.
Definition at line 107 of file HTMSequencer.hh.
Referenced by htmCallback(), and HTMSequencer().
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Histogram of cycle latencies of HTM transactions.
Definition at line 103 of file HTMSequencer.hh.
Referenced by htmCallback(), and HTMSequencer().
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Histogram of instruction lengths of HTM transactions.
Definition at line 105 of file HTMSequencer.hh.
Referenced by htmCallback(), and HTMSequencer().
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Definition at line 97 of file HTMSequencer.hh.
Referenced by empty(), htmCallback(), insertRequest(), print(), and wakeup().
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Definition at line 100 of file HTMSequencer.hh.
Referenced by htmCallback(), and HTMSequencer().
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Definition at line 99 of file HTMSequencer.hh.
Referenced by htmCallback(), and HTMSequencer().