gem5  v21.1.0.2
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gem5::IGbE Class Reference

#include <i8254xGBe.hh>

Inheritance diagram for gem5::IGbE:
gem5::EtherDevice gem5::PciDevice gem5::DmaDevice gem5::PioDevice gem5::ClockedObject gem5::SimObject gem5::Clocked gem5::EventManager gem5::Serializable gem5::Drainable gem5::statistics::Group gem5::Named

Classes

class  DescCache
 
class  RxDescCache
 
class  TxDescCache
 

Public Member Functions

 PARAMS (IGbE)
 
 IGbE (const Params &params)
 
 ~IGbE ()
 
void init () override
 init() is called after all C++ SimObjects have been created and all ports are connected. More...
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Get a port with a given name and index. More...
 
Tick read (PacketPtr pkt) override
 Pure virtual function that the device must implement. More...
 
Tick write (PacketPtr pkt) override
 Pure virtual function that the device must implement. More...
 
Tick writeConfig (PacketPtr pkt) override
 Write to the PCI config space data that is stored locally. More...
 
bool ethRxPkt (EthPacketPtr packet)
 
void ethTxDone ()
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
DrainState drain () override
 Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are partially executed or are partially in flight. More...
 
void drainResume () override
 Resume execution after a successful drain. More...
 
- Public Member Functions inherited from gem5::EtherDevice
 EtherDevice (const Params &params)
 
- Public Member Functions inherited from gem5::PciDevice
virtual Tick readConfig (PacketPtr pkt)
 Read from the PCI config space data that is stored locally. More...
 
Addr pciToDma (Addr pci_addr) const
 
void intrPost ()
 
void intrClear ()
 
uint8_t interruptLine () const
 
AddrRangeList getAddrRanges () const override
 Determine the address ranges that this device responds to. More...
 
 PciDevice (const PciDeviceParams &params)
 Constructor for PCI Dev. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize this object to the given output stream. More...
 
void unserialize (CheckpointIn &cp) override
 Reconstruct the state of this object from a checkpoint. More...
 
const PciBusAddrbusAddr () const
 
- Public Member Functions inherited from gem5::DmaDevice
 DmaDevice (const Params &p)
 
virtual ~DmaDevice ()=default
 
void dmaWrite (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)
 
void dmaWrite (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)
 
void dmaRead (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)
 
void dmaRead (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)
 
bool dmaPending () const
 
unsigned int cacheBlockSize () const
 
- Public Member Functions inherited from gem5::PioDevice
 PioDevice (const Params &p)
 
virtual ~PioDevice ()
 
- Public Member Functions inherited from gem5::ClockedObject
 ClockedObject (const ClockedObjectParams &p)
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::SimObject
const Paramsparams () const
 
 SimObject (const Params &p)
 
virtual ~SimObject ()
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint. More...
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint. More...
 
virtual void regProbePoints ()
 Register probe points for this object. More...
 
virtual void regProbeListeners ()
 Register probe listeners for this object. More...
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object. More...
 
virtual void startup ()
 startup() is the final initialization call before simulation. More...
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining. More...
 
virtual void memWriteback ()
 Write back dirty buffers to memory using functional writes. More...
 
virtual void memInvalidate ()
 Invalidate the contents of memory buffers. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue. More...
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from gem5::Drainable
DrainState drainState () const
 Return the current drain state of an object. More...
 
virtual void notifyFork ()
 Notify a child process of a fork. More...
 
- Public Member Functions inherited from gem5::statistics::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group. More...
 
virtual ~Group ()
 
virtual void regStats ()
 Callback to set stat parameters. More...
 
virtual void resetStats ()
 Callback to reset stats. More...
 
virtual void preDumpStats ()
 Callback before stats are dumped. More...
 
void addStat (statistics::Info *info)
 Register a stat with this group. More...
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object. More...
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object. More...
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block. More...
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group. More...
 
void mergeStatGroup (Group *block)
 Merge the contents (stats & children) of a block to this block. More...
 
 Group ()=delete
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 
- Public Member Functions inherited from gem5::Clocked
void updateClockPeriod ()
 Update the tick to the current tick. More...
 
Tick clockEdge (Cycles cycles=Cycles(0)) const
 Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...
 
Cycles curCycle () const
 Determine the current cycle, corresponding to a tick aligned to a clock edge. More...
 
Tick nextCycle () const
 Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...
 
uint64_t frequency () const
 
Tick clockPeriod () const
 
double voltage () const
 
Cycles ticksToCycles (Tick t) const
 
Tick cyclesToTicks (Cycles c) const
 

Public Attributes

Tick lastInterrupt
 
- Public Attributes inherited from gem5::ClockedObject
PowerStatepowerState
 

Private Member Functions

void rdtrProcess ()
 
void radvProcess ()
 
void tadvProcess ()
 
void tidvProcess ()
 
void tick ()
 
void rxStateMachine ()
 
void txStateMachine ()
 
void txWire ()
 
void postInterrupt (igbreg::IntTypes t, bool now=false)
 Write an interrupt into the interrupt pending register and check mask and interrupt limit timer before sending interrupt to CPU. More...
 
void chkInterrupt ()
 Check and see if changes to the mask register have caused an interrupt to need to be sent or perhaps removed an interrupt cause. More...
 
void delayIntEvent ()
 Send an interrupt to the cpu. More...
 
void cpuPostInt ()
 
void cpuClearInt ()
 Clear the interupt line to the cpu. More...
 
Tick intClock ()
 
void restartClock ()
 This function is used to restart the clock so it can handle things like draining and resume in one place. More...
 
void checkDrain ()
 Check if all the draining things that need to occur have occured and handle the drain event if so. More...
 

Private Attributes

IGbEIntetherInt
 
igbreg::Regs regs
 
int eeOpBits
 
int eeAddrBits
 
int eeDataBits
 
uint8_t eeOpcode
 
uint8_t eeAddr
 
uint16_t flash [igbreg::EEPROM_SIZE]
 
PacketFifo rxFifo
 
PacketFifo txFifo
 
EthPacketPtr txPacket
 
bool inTick
 
bool rxTick
 
bool txTick
 
bool txFifoTick
 
bool rxDmaPacket
 
unsigned pktOffset
 
Tick fetchDelay
 
Tick wbDelay
 
Tick fetchCompDelay
 
Tick wbCompDelay
 
Tick rxWriteDelay
 
Tick txReadDelay
 
EventFunctionWrapper rdtrEvent
 
EventFunctionWrapper radvEvent
 
EventFunctionWrapper tadvEvent
 
EventFunctionWrapper tidvEvent
 
EventFunctionWrapper tickEvent
 
uint64_t macAddr
 
EventFunctionWrapper interEvent
 
RxDescCache rxDescCache
 
TxDescCache txDescCache
 

Friends

class RxDescCache
 
class TxDescCache
 

Additional Inherited Members

- Public Types inherited from gem5::EtherDevice
using Params = EtherDeviceParams
 
- Public Types inherited from gem5::DmaDevice
typedef DmaDeviceParams Params
 
- Public Types inherited from gem5::PioDevice
using Params = PioDeviceParams
 
- Public Types inherited from gem5::ClockedObject
using Params = ClockedObjectParams
 Parameters of ClockedObject. More...
 
- Public Types inherited from gem5::SimObject
typedef SimObjectParams Params
 
- Static Public Member Functions inherited from gem5::SimObject
static void serializeAll (const std::string &cpt_dir)
 Create a checkpoint by serializing all SimObjects in the system. More...
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it. More...
 
static void setSimObjectResolver (SimObjectResolver *resolver)
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
static SimObjectResolvergetSimObjectResolver ()
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section. More...
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it. More...
 
- Protected Member Functions inherited from gem5::PciDevice
bool getBAR (Addr addr, int &num, Addr &offs)
 Which base address register (if any) maps the given address? More...
 
- Protected Member Functions inherited from gem5::Drainable
 Drainable ()
 
virtual ~Drainable ()
 
void signalDrainDone () const
 Signal that an object is drained. More...
 
- Protected Member Functions inherited from gem5::Clocked
 Clocked (ClockDomain &clk_domain)
 Create a clocked object and set the clock domain based on the parameters. More...
 
 Clocked (Clocked &)=delete
 
Clockedoperator= (Clocked &)=delete
 
virtual ~Clocked ()
 Virtual destructor due to inheritance. More...
 
void resetClock () const
 Reset the object's clock using the current global tick value. More...
 
virtual void clockPeriodUpdated ()
 A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More...
 
- Protected Attributes inherited from gem5::EtherDevice
gem5::EtherDevice::EtherDeviceStats etherDeviceStats
 
- Protected Attributes inherited from gem5::PciDevice
const PciBusAddr _busAddr
 
PCIConfig config
 The current config space. More...
 
std::vector< MSIXTablemsix_table
 MSIX Table and PBA Structures. More...
 
std::vector< MSIXPbaEntrymsix_pba
 
std::array< PciBar *, 6 > BARs {}
 
PciHost::DeviceInterface hostInterface
 
Tick pioDelay
 
Tick configDelay
 
const int PMCAP_BASE
 The capability list structures and base addresses. More...
 
const int PMCAP_ID_OFFSET
 
const int PMCAP_PC_OFFSET
 
const int PMCAP_PMCS_OFFSET
 
PMCAP pmcap
 
const int MSICAP_BASE
 
MSICAP msicap
 
const int MSIXCAP_BASE
 
const int MSIXCAP_ID_OFFSET
 
const int MSIXCAP_MXC_OFFSET
 
const int MSIXCAP_MTAB_OFFSET
 
const int MSIXCAP_MPBA_OFFSET
 
int MSIX_TABLE_OFFSET
 
int MSIX_TABLE_END
 
int MSIX_PBA_OFFSET
 
int MSIX_PBA_END
 
MSIXCAP msixcap
 
const int PXCAP_BASE
 
PXCAP pxcap
 
- Protected Attributes inherited from gem5::DmaDevice
DmaPort dmaPort
 
- Protected Attributes inherited from gem5::PioDevice
Systemsys
 
PioPort< PioDevicepioPort
 The pioPort that handles the requests for us and provides us requests that it sees. More...
 
- Protected Attributes inherited from gem5::SimObject
const SimObjectParams & _params
 Cached copy of the object parameters. More...
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue. More...
 

Detailed Description

Definition at line 60 of file i8254xGBe.hh.

Constructor & Destructor Documentation

◆ IGbE()

gem5::IGbE::IGbE ( const Params params)

Definition at line 61 of file i8254xGBe.cc.

References rdtrProcess().

◆ ~IGbE()

gem5::IGbE::~IGbE ( )

Definition at line 131 of file i8254xGBe.cc.

References etherInt.

Member Function Documentation

◆ checkDrain()

void gem5::IGbE::checkDrain ( )
private

Check if all the draining things that need to occur have occured and handle the drain event if so.

Definition at line 2048 of file i8254xGBe.cc.

References DPRINTF, gem5::Draining, gem5::Drainable::drainState(), gem5::IGbE::RxDescCache::hasOutstandingEvents(), gem5::IGbE::TxDescCache::hasOutstandingEvents(), rxDescCache, rxTick, gem5::Drainable::signalDrainDone(), txDescCache, txFifoTick, and txTick.

◆ chkInterrupt()

void gem5::IGbE::chkInterrupt ( )
private

Check and see if changes to the mask register have caused an interrupt to need to be sent or perhaps removed an interrupt cause.

Definition at line 791 of file i8254xGBe.cc.

References cpuClearInt(), cpuPostInt(), gem5::curTick(), gem5::EventManager::deschedule(), DPRINTF, gem5::igbreg::Regs::icr, gem5::igbreg::Regs::imr, interEvent, gem5::igbreg::Regs::itr, gem5::sim_clock::as_int::ns, regs, gem5::EventManager::schedule(), gem5::Event::scheduled(), and gem5::ArmISA::t.

Referenced by read(), and write().

◆ cpuClearInt()

void gem5::IGbE::cpuClearInt ( )
private

Clear the interupt line to the cpu.

Definition at line 779 of file i8254xGBe.cc.

References DPRINTF, gem5::igbreg::Regs::icr, gem5::PciDevice::intrClear(), and regs.

Referenced by chkInterrupt().

◆ cpuPostInt()

void gem5::IGbE::cpuPostInt ( )
private

◆ delayIntEvent()

void gem5::IGbE::delayIntEvent ( )
private

Send an interrupt to the cpu.

Definition at line 728 of file i8254xGBe.cc.

References cpuPostInt().

◆ drain()

DrainState gem5::IGbE::drain ( )
overridevirtual

Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are partially executed or are partially in flight.

Draining is mostly used before forking and creating a check point.

This function notifies an object that it needs to drain its state.

If the object does not need further simulation to drain internal buffers, it returns DrainState::Drained and automatically switches to the Drained state. If the object needs more simulation, it returns DrainState::Draining and automatically enters the Draining state. Other return values are invalid.

Note
An object that has entered the Drained state can be disturbed by other objects in the system and consequently stop being drained. These perturbations are not visible in the drain state. The simulator therefore repeats the draining process until all objects return DrainState::Drained on the first call to drain().
Returns
DrainState::Drained if the object is drained at this point in time, DrainState::Draining if it needs further simulation.

Implements gem5::Drainable.

Definition at line 2012 of file i8254xGBe.cc.

References gem5::X86ISA::count, gem5::EventManager::deschedule(), DPRINTF, gem5::Drained, gem5::Draining, gem5::IGbE::RxDescCache::hasOutstandingEvents(), gem5::IGbE::TxDescCache::hasOutstandingEvents(), rxDescCache, rxTick, gem5::Event::scheduled(), tickEvent, txDescCache, txFifoTick, and txTick.

◆ drainResume()

void gem5::IGbE::drainResume ( )
overridevirtual

Resume execution after a successful drain.

Reimplemented from gem5::Drainable.

Definition at line 2035 of file i8254xGBe.cc.

References DPRINTF, gem5::Drainable::drainResume(), restartClock(), rxTick, txFifoTick, and txTick.

◆ ethRxPkt()

bool gem5::IGbE::ethRxPkt ( EthPacketPtr  packet)

◆ ethTxDone()

void gem5::IGbE::ethTxDone ( )

◆ getPort()

Port & gem5::IGbE::getPort ( const std::string &  if_name,
PortID  idx = InvalidPortID 
)
overridevirtual

Get a port with a given name and index.

This is used at binding time and returns a reference to a protocol-agnostic port.

gem5 has a request and response port interface. All memory objects are connected together via ports. These ports provide a rigid interface between these memory objects. These ports implement three different memory system modes: timing, atomic, and functional. The most important mode is the timing mode and here timing mode is used for conducting cycle-level timing experiments. The other modes are only used in special circumstances and should not be used to conduct cycle-level timing experiments. The other modes are only used in special circumstances. These ports allow SimObjects to communicate with each other.

Parameters
if_namePort name
idxIndex in the case of a VectorPort
Returns
A reference to the given port

Reimplemented from gem5::DmaDevice.

Definition at line 143 of file i8254xGBe.cc.

References etherInt, and gem5::DmaDevice::getPort().

◆ init()

void gem5::IGbE::init ( )
overridevirtual

init() is called after all C++ SimObjects have been created and all ports are connected.

Initializations that are independent of unserialization but rely on a fully instantiated and connected SimObject graph should be done here.

Reimplemented from gem5::DmaDevice.

Definition at line 137 of file i8254xGBe.cc.

References gem5::DmaDevice::init().

◆ intClock()

Tick gem5::IGbE::intClock ( )
inlineprivate

Definition at line 169 of file i8254xGBe.hh.

References gem5::sim_clock::as_int::ns.

◆ PARAMS()

gem5::IGbE::PARAMS ( IGbE  )

◆ postInterrupt()

void gem5::IGbE::postInterrupt ( igbreg::IntTypes  t,
bool  now = false 
)
private

Write an interrupt into the interrupt pending register and check mask and interrupt limit timer before sending interrupt to CPU.

Parameters
tthe type of interrupt we are posting
nowshould we ignore the interrupt limiting timer

Definition at line 695 of file i8254xGBe.cc.

References cpuPostInt(), gem5::curTick(), gem5::EventManager::deschedule(), DPRINTF, gem5::igbreg::Regs::icr, interEvent, gem5::igbreg::Regs::itr, lastInterrupt, gem5::sim_clock::as_int::ns, regs, gem5::EventManager::schedule(), gem5::Event::scheduled(), and gem5::ArmISA::t.

Referenced by ethRxPkt(), radvProcess(), rdtrProcess(), read(), rxStateMachine(), tadvProcess(), tidvProcess(), txStateMachine(), and write().

◆ radvProcess()

void gem5::IGbE::radvProcess ( )
inlineprivate

◆ rdtrProcess()

void gem5::IGbE::rdtrProcess ( )
inlineprivate

◆ read()

Tick gem5::IGbE::read ( PacketPtr  pkt)
overridevirtual

Pure virtual function that the device must implement.

Called when a read command is recieved by the port.

Parameters
pktPacket describing this request
Returns
number of ticks it took to complete

Implements gem5::PioDevice.

Definition at line 170 of file i8254xGBe.cc.

References chkInterrupt(), gem5::igbreg::Regs::ctrl, gem5::igbreg::Regs::ctrl_ext, DPRINTF, gem5::igbreg::Regs::eecd, gem5::igbreg::Regs::eerd, gem5::igbreg::Regs::fcrth, gem5::igbreg::Regs::fcrtl, gem5::igbreg::Regs::fcttv, gem5::igbreg::Regs::fwsm, gem5::Packet::getAddr(), gem5::PciDevice::getBAR(), gem5::Packet::getSize(), gem5::igbreg::Regs::iam, gem5::igbreg::Regs::icr, gem5::igbreg::Regs::imr, IN_RANGE, gem5::igbreg::IT_RXT, gem5::igbreg::Regs::itr, gem5::Packet::makeAtomicResponse(), gem5::igbreg::Regs::manc, gem5::mask(), gem5::igbreg::Regs::mdic, gem5::igbreg::MULTICAST_TABLE_SIZE, panic, gem5::igbreg::Regs::pba, gem5::PciDevice::pioDelay, postInterrupt(), gem5::igbreg::Regs::radv, gem5::igbreg::Regs::rctl, gem5::igbreg::RCV_ADDRESS_TABLE_SIZE, gem5::igbreg::Regs::rdba, gem5::igbreg::Regs::rdh, gem5::igbreg::Regs::rdlen, gem5::igbreg::Regs::rdt, gem5::igbreg::Regs::rdtr, gem5::igbreg::REG_CRCERRS, gem5::igbreg::REG_CTRL, gem5::igbreg::REG_CTRL_EXT, gem5::igbreg::REG_EECD, gem5::igbreg::REG_EERD, gem5::igbreg::REG_EICR, gem5::igbreg::REG_FCRTH, gem5::igbreg::REG_FCRTL, gem5::igbreg::REG_FCTTV, gem5::igbreg::REG_FWSM, gem5::igbreg::REG_ICR, gem5::igbreg::REG_ITR, gem5::igbreg::REG_LEDCTL, gem5::igbreg::REG_MANC, gem5::igbreg::REG_MDIC, gem5::igbreg::REG_MTA, gem5::igbreg::REG_PBA, gem5::igbreg::REG_RADV, gem5::igbreg::REG_RAL, gem5::igbreg::REG_RCTL, gem5::igbreg::REG_RDBAH, gem5::igbreg::REG_RDBAL, gem5::igbreg::REG_RDH, gem5::igbreg::REG_RDLEN, gem5::igbreg::REG_RDT, gem5::igbreg::REG_RDTR, gem5::igbreg::REG_RFCTL, gem5::igbreg::REG_RLPML, gem5::igbreg::REG_RXCSUM, gem5::igbreg::REG_RXDCTL, gem5::igbreg::REG_SRRCTL, gem5::igbreg::REG_STATUS, gem5::igbreg::REG_SWFWSYNC, gem5::igbreg::REG_SWSM, gem5::igbreg::REG_TADV, gem5::igbreg::REG_TCTL, gem5::igbreg::REG_TDBAH, gem5::igbreg::REG_TDBAL, gem5::igbreg::REG_TDH, gem5::igbreg::REG_TDLEN, gem5::igbreg::REG_TDT, gem5::igbreg::REG_TDWBAH, gem5::igbreg::REG_TDWBAL, gem5::igbreg::REG_TIDV, gem5::igbreg::REG_TXDCA_CTL, gem5::igbreg::REG_TXDCTL, gem5::igbreg::REG_VFTA, gem5::igbreg::REG_WUC, gem5::igbreg::REG_WUFC, gem5::igbreg::REG_WUS, regs, gem5::igbreg::Regs::rfctl, gem5::igbreg::Regs::rlpml, gem5::igbreg::Regs::rxcsum, gem5::igbreg::Regs::rxdctl, rxDescCache, gem5::Packet::setLE(), gem5::igbreg::Regs::srrctl, gem5::igbreg::STATS_REGS_SIZE, gem5::igbreg::Regs::sts, gem5::igbreg::Regs::sw_fw_sync, gem5::igbreg::Regs::swsm, gem5::igbreg::Regs::tadv, gem5::igbreg::Regs::tctl, gem5::igbreg::Regs::tdba, gem5::igbreg::Regs::tdh, gem5::igbreg::Regs::tdlen, gem5::igbreg::Regs::tdt, gem5::igbreg::Regs::tdwba, gem5::igbreg::Regs::tidv, gem5::igbreg::Regs::txdca_ctl, gem5::igbreg::Regs::txdctl, gem5::igbreg::VLAN_FILTER_TABLE_SIZE, and gem5::IGbE::DescCache< T >::writeback().

◆ restartClock()

void gem5::IGbE::restartClock ( )
private

This function is used to restart the clock so it can handle things like draining and resume in one place.

Definition at line 2004 of file i8254xGBe.cc.

References gem5::Clocked::clockEdge(), gem5::Drainable::drainState(), gem5::Running, rxTick, gem5::EventManager::schedule(), gem5::Event::scheduled(), tickEvent, txFifoTick, and txTick.

Referenced by drainResume(), ethRxPkt(), ethTxDone(), and write().

◆ rxStateMachine()

void gem5::IGbE::rxStateMachine ( )
private

◆ serialize()

void gem5::IGbE::serialize ( CheckpointOut cp) const
overridevirtual

◆ tadvProcess()

void gem5::IGbE::tadvProcess ( )
inlineprivate

◆ tick()

void gem5::IGbE::tick ( )
private

◆ tidvProcess()

void gem5::IGbE::tidvProcess ( )
inlineprivate

◆ txStateMachine()

void gem5::IGbE::txStateMachine ( )
private

◆ txWire()

void gem5::IGbE::txWire ( )
private

◆ unserialize()

void gem5::IGbE::unserialize ( CheckpointIn cp)
overridevirtual

◆ write()

Tick gem5::IGbE::write ( PacketPtr  pkt)
overridevirtual

Pure virtual function that the device must implement.

Called when a write command is recieved by the port.

Parameters
pktPacket describing this request
Returns
number of ticks it took to complete

Implements gem5::PioDevice.

Definition at line 358 of file i8254xGBe.cc.

References gem5::IGbE::DescCache< T >::areaChanged(), gem5::bits(), chkInterrupt(), gem5::PacketFifo::clear(), gem5::IGbE::TxDescCache::completionWriteback(), gem5::igbreg::Regs::ctrl, gem5::igbreg::Regs::ctrl_ext, DPRINTF, gem5::Drainable::drainState(), eeAddr, eeAddrBits, gem5::igbreg::Regs::eecd, eeDataBits, eeOpBits, eeOpcode, gem5::igbreg::EEPROM_RDSR_OPCODE_SPI, gem5::igbreg::EEPROM_READ_OPCODE_SPI, gem5::EEPROM_SIZE, gem5::igbreg::Regs::eerd, gem5::igbreg::Regs::fcrth, gem5::igbreg::Regs::fcrtl, gem5::igbreg::Regs::fcttv, gem5::IGbE::DescCache< T >::fetchDescriptors(), flash, gem5::igbreg::Regs::fwsm, gem5::Packet::getAddr(), gem5::PciDevice::getBAR(), gem5::Packet::getLE(), gem5::Packet::getSize(), gem5::igbreg::Regs::iam, gem5::igbreg::Regs::icr, gem5::igbreg::Regs::imr, IN_RANGE, gem5::igbreg::Regs::itr, gem5::Packet::makeAtomicResponse(), gem5::igbreg::Regs::manc, gem5::mask(), gem5::igbreg::Regs::mdic, gem5::igbreg::MULTICAST_TABLE_SIZE, panic, gem5::SimObject::params(), gem5::igbreg::Regs::pba, gem5::igbreg::PHY_AGC, gem5::igbreg::PHY_EPID, gem5::igbreg::PHY_EPSTATUS, gem5::igbreg::PHY_GSTATUS, gem5::igbreg::PHY_PID, gem5::igbreg::PHY_PSTATUS, gem5::PciDevice::pioDelay, postInterrupt(), gem5::igbreg::Regs::radv, gem5::igbreg::Regs::rctl, gem5::igbreg::RCV_ADDRESS_TABLE_SIZE, gem5::igbreg::Regs::rdba, gem5::igbreg::Regs::rdh, gem5::igbreg::Regs::rdlen, gem5::igbreg::Regs::rdt, gem5::igbreg::Regs::rdtr, gem5::igbreg::REG_AIFS, gem5::igbreg::REG_CTRL, gem5::igbreg::REG_CTRL_EXT, gem5::igbreg::REG_EECD, gem5::igbreg::REG_EERD, gem5::igbreg::REG_FCAH, gem5::igbreg::REG_FCAL, gem5::igbreg::REG_FCRTH, gem5::igbreg::REG_FCRTL, gem5::igbreg::REG_FCT, gem5::igbreg::REG_FCTTV, gem5::igbreg::REG_IAM, gem5::igbreg::REG_ICR, gem5::igbreg::REG_ICS, gem5::igbreg::REG_IMC, gem5::igbreg::REG_IMS, gem5::igbreg::REG_ITR, gem5::igbreg::REG_IVAR0, gem5::igbreg::REG_LEDCTL, gem5::igbreg::REG_MANC, gem5::igbreg::REG_MDIC, gem5::igbreg::REG_MTA, gem5::igbreg::REG_PBA, gem5::igbreg::REG_RADV, gem5::igbreg::REG_RAL, gem5::igbreg::REG_RCTL, gem5::igbreg::REG_RDBAH, gem5::igbreg::REG_RDBAL, gem5::igbreg::REG_RDH, gem5::igbreg::REG_RDLEN, gem5::igbreg::REG_RDT, gem5::igbreg::REG_RDTR, gem5::igbreg::REG_RFCTL, gem5::igbreg::REG_RLPML, gem5::igbreg::REG_RXCSUM, gem5::igbreg::REG_RXDCTL, gem5::igbreg::REG_SRRCTL, gem5::igbreg::REG_STATUS, gem5::igbreg::REG_SWFWSYNC, gem5::igbreg::REG_SWSM, gem5::igbreg::REG_TADV, gem5::igbreg::REG_TCTL, gem5::igbreg::REG_TDBAH, gem5::igbreg::REG_TDBAL, gem5::igbreg::REG_TDH, gem5::igbreg::REG_TDLEN, gem5::igbreg::REG_TDT, gem5::igbreg::REG_TDWBAH, gem5::igbreg::REG_TDWBAL, gem5::igbreg::REG_TIDV, gem5::igbreg::REG_TIPG, gem5::igbreg::REG_TXDCA_CTL, gem5::igbreg::REG_TXDCTL, gem5::igbreg::REG_VET, gem5::igbreg::REG_VFTA, gem5::igbreg::REG_WUC, gem5::igbreg::REG_WUFC, gem5::igbreg::REG_WUS, regs, gem5::IGbE::DescCache< T >::reset(), restartClock(), gem5::igbreg::Regs::rfctl, gem5::igbreg::Regs::rlpml, gem5::Running, gem5::igbreg::Regs::rxcsum, gem5::igbreg::Regs::rxdctl, rxDescCache, rxFifo, rxTick, gem5::igbreg::Regs::srrctl, gem5::igbreg::Regs::sts, gem5::igbreg::Regs::sw_fw_sync, gem5::igbreg::Regs::swsm, gem5::igbreg::Regs::tadv, gem5::igbreg::Regs::tctl, gem5::igbreg::Regs::tdba, gem5::igbreg::Regs::tdh, gem5::igbreg::Regs::tdlen, gem5::igbreg::Regs::tdt, gem5::igbreg::Regs::tdwba, gem5::igbreg::Regs::tidv, gem5::igbreg::Regs::txdca_ctl, gem5::igbreg::Regs::txdctl, txDescCache, txTick, gem5::X86ISA::val, gem5::igbreg::VLAN_FILTER_TABLE_SIZE, and warn.

◆ writeConfig()

Tick gem5::IGbE::writeConfig ( PacketPtr  pkt)
overridevirtual

Write to the PCI config space data that is stored locally.

This may be overridden by the device but at some point it will eventually call this for normal operations that it does not need to override.

Parameters
pktpacket containing the write the offset into config space

Reimplemented from gem5::PciDevice.

Definition at line 151 of file i8254xGBe.cc.

References gem5::PciDevice::configDelay, gem5::Packet::getAddr(), gem5::ArmISA::offset, panic, PCI_CONFIG_SIZE, PCI_DEVICE_SPECIFIC, and gem5::PciDevice::writeConfig().

Friends And Related Function Documentation

◆ RxDescCache

friend class RxDescCache
friend

Definition at line 362 of file i8254xGBe.hh.

◆ TxDescCache

friend class TxDescCache
friend

Definition at line 474 of file i8254xGBe.hh.

Member Data Documentation

◆ eeAddr

uint8_t gem5::IGbE::eeAddr
private

Definition at line 70 of file i8254xGBe.hh.

Referenced by serialize(), unserialize(), and write().

◆ eeAddrBits

int gem5::IGbE::eeAddrBits
private

Definition at line 69 of file i8254xGBe.hh.

Referenced by serialize(), unserialize(), and write().

◆ eeDataBits

int gem5::IGbE::eeDataBits
private

Definition at line 69 of file i8254xGBe.hh.

Referenced by serialize(), unserialize(), and write().

◆ eeOpBits

int gem5::IGbE::eeOpBits
private

Definition at line 69 of file i8254xGBe.hh.

Referenced by serialize(), unserialize(), and write().

◆ eeOpcode

uint8_t gem5::IGbE::eeOpcode
private

Definition at line 70 of file i8254xGBe.hh.

Referenced by serialize(), unserialize(), and write().

◆ etherInt

IGbEInt* gem5::IGbE::etherInt
private

Definition at line 63 of file i8254xGBe.hh.

Referenced by getPort(), txWire(), and ~IGbE().

◆ fetchCompDelay

Tick gem5::IGbE::fetchCompDelay
private

Definition at line 93 of file i8254xGBe.hh.

◆ fetchDelay

Tick gem5::IGbE::fetchDelay
private

Definition at line 92 of file i8254xGBe.hh.

◆ flash

uint16_t gem5::IGbE::flash[igbreg::EEPROM_SIZE]
private

Definition at line 71 of file i8254xGBe.hh.

Referenced by serialize(), unserialize(), and write().

◆ interEvent

EventFunctionWrapper gem5::IGbE::interEvent
private

Definition at line 163 of file i8254xGBe.hh.

Referenced by chkInterrupt(), cpuPostInt(), postInterrupt(), serialize(), and unserialize().

◆ inTick

bool gem5::IGbE::inTick
private

Definition at line 81 of file i8254xGBe.hh.

Referenced by ethTxDone(), and tick().

◆ lastInterrupt

Tick gem5::IGbE::lastInterrupt

Definition at line 488 of file i8254xGBe.hh.

Referenced by cpuPostInt(), postInterrupt(), serialize(), and unserialize().

◆ macAddr

uint64_t gem5::IGbE::macAddr
private

Definition at line 140 of file i8254xGBe.hh.

◆ pktOffset

unsigned gem5::IGbE::pktOffset
private

Definition at line 89 of file i8254xGBe.hh.

Referenced by rxStateMachine(), serialize(), and unserialize().

◆ radvEvent

EventFunctionWrapper gem5::IGbE::radvEvent
private

Definition at line 114 of file i8254xGBe.hh.

Referenced by cpuPostInt(), serialize(), and unserialize().

◆ rdtrEvent

EventFunctionWrapper gem5::IGbE::rdtrEvent
private

Definition at line 104 of file i8254xGBe.hh.

Referenced by cpuPostInt(), serialize(), and unserialize().

◆ regs

igbreg::Regs gem5::IGbE::regs
private

◆ rxDescCache

RxDescCache gem5::IGbE::rxDescCache
private

◆ rxDmaPacket

bool gem5::IGbE::rxDmaPacket
private

Definition at line 86 of file i8254xGBe.hh.

Referenced by rxStateMachine().

◆ rxFifo

PacketFifo gem5::IGbE::rxFifo
private

Definition at line 74 of file i8254xGBe.hh.

Referenced by ethRxPkt(), rxStateMachine(), serialize(), unserialize(), and write().

◆ rxTick

bool gem5::IGbE::rxTick
private

◆ rxWriteDelay

Tick gem5::IGbE::rxWriteDelay
private

Definition at line 94 of file i8254xGBe.hh.

◆ tadvEvent

EventFunctionWrapper gem5::IGbE::tadvEvent
private

Definition at line 124 of file i8254xGBe.hh.

Referenced by cpuPostInt(), serialize(), and unserialize().

◆ tickEvent

EventFunctionWrapper gem5::IGbE::tickEvent
private

Definition at line 137 of file i8254xGBe.hh.

Referenced by drain(), ethRxPkt(), restartClock(), and tick().

◆ tidvEvent

EventFunctionWrapper gem5::IGbE::tidvEvent
private

Definition at line 133 of file i8254xGBe.hh.

Referenced by cpuPostInt(), serialize(), and unserialize().

◆ txDescCache

TxDescCache gem5::IGbE::txDescCache
private

◆ txFifo

PacketFifo gem5::IGbE::txFifo
private

Definition at line 75 of file i8254xGBe.hh.

Referenced by serialize(), txStateMachine(), txWire(), and unserialize().

◆ txFifoTick

bool gem5::IGbE::txFifoTick
private

◆ txPacket

EthPacketPtr gem5::IGbE::txPacket
private

Definition at line 78 of file i8254xGBe.hh.

Referenced by serialize(), txStateMachine(), and unserialize().

◆ txReadDelay

Tick gem5::IGbE::txReadDelay
private

Definition at line 94 of file i8254xGBe.hh.

◆ txTick

bool gem5::IGbE::txTick
private

◆ wbCompDelay

Tick gem5::IGbE::wbCompDelay
private

Definition at line 93 of file i8254xGBe.hh.

◆ wbDelay

Tick gem5::IGbE::wbDelay
private

Definition at line 92 of file i8254xGBe.hh.


The documentation for this class was generated from the following files:

Generated on Tue Sep 21 2021 12:27:43 for gem5 by doxygen 1.8.17