53 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
105 std::stringstream dis_stream;
110 dis_stream <<
"0x" << std::hex << std::setfill(
'0') << std::setw(8)
117 dis_stream <<
"0x" << std::hex << std::setfill(
'0') << std::setw(8)
138 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
193 if (iFmt->
OP == 0x14)
203 std::stringstream dis_stream;
209 dis_stream <<
"0x" << std::hex << std::setfill(
'0')
215 dis_stream <<
"0x" << std::hex << std::setfill(
'0') << std::setw(4)
233 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
296 std::stringstream dis_stream;
301 dis_stream <<
"0x" << std::hex << std::setfill(
'0') << std::setw(8)
322 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
371 std::stringstream dis_stream;
375 dis_stream <<
"0x" << std::hex << std::setfill(
'0') << std::setw(8)
382 dis_stream <<
"0x" << std::hex << std::setfill(
'0') << std::setw(8)
439 std::stringstream dis_stream;
447 dis_stream <<
"label_" << std::hex << dest;
465 dis_stream <<
"vmcnt(" << vm_cnt <<
")";
468 if (lgkm_cnt != 0xf) {
472 dis_stream <<
"lgkmcnt(" << lgkm_cnt <<
")";
475 if (exp_cnt != 0x7) {
476 if (vm_cnt != 0xf || lgkm_cnt != 0xf)
479 dis_stream <<
"expcnt(" << exp_cnt <<
")";
502 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
567 std::stringstream dis_stream;
587 dis_stream <<
"0x" << std::hex << std::setfill(
'0') << std::setw(2)
609 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
689 iFmt->
OP == 0x18 || iFmt->
OP == 0x24 || iFmt->
OP == 0x25)
698 std::stringstream dis_stream;
703 dis_stream <<
"vcc, ";
708 dis_stream <<
"0x" << std::hex << std::setfill(
'0') << std::setw(8)
721 dis_stream <<
"0x" << std::hex << std::setfill(
'0') << std::setw(8)
725 dis_stream << std::resetiosflags(std::ios_base::basefield) <<
"v"
729 dis_stream <<
", vcc";
744 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
824 std::stringstream dis_stream;
831 dis_stream <<
"0x" << std::hex << std::setfill(
'0') << std::setw(8)
851 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
919 std::stringstream dis_stream;
920 dis_stream <<
_opcode <<
" vcc, ";
925 dis_stream <<
"0x" << std::hex << std::setfill(
'0') << std::setw(8)
964 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
982 for (opNum = 0; opNum < numSrc; opNum++) {
1004 true,
false,
false);
1020 std::stringstream dis_stream;
1031 num_regs - 1 <<
"], ";
1084 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
1102 for (opNum = 0; opNum < numSrc; opNum++) {
1110 true,
false,
false);
1118 false,
true,
false);
1124 true,
false,
false);
1140 std::stringstream dis_stream;
1176 dis_stream <<
", vcc";
1192 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
1208 false,
true,
false);
1215 false,
true,
false);
1231 std::stringstream dis_stream;
1256 dis_stream <<
" offset:" <<
offset;
1270 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
1299 false,
true,
false);
1305 false,
true,
false);
1323 false,
true,
false);
1341 std::stringstream dis_stream;
1344 dis_stream <<
"s[" << srsrc_val <<
":"
1345 << srsrc_val + 3 <<
"], ";
1363 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
1390 false,
true,
false);
1396 false,
true,
false);
1413 false,
true,
false);
1435 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
1463 false,
true,
false);
1469 false,
true,
false);
1488 false,
true,
false);
1510 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
1527 for (opNum = 0; opNum < 4; opNum++) {
1529 false,
true,
false);
1547 if (iFmt->
SEG == 0) {
1549 }
else if (iFmt->
SEG == 2) {
1552 panic(
"Unknown flat segment: %d\n", iFmt->
SEG);
1559 _srcLiteral = *
reinterpret_cast<uint32_t*
>(&iFmt[1]);
1583 panic(
"Unknown flat subtype!\n");
1604 false,
true,
false);
1610 false,
true,
false);
1617 false,
true,
false);
1641 false,
true,
false);
1649 true,
false,
false);
1657 false,
true,
false);
1664 true,
false,
false);
1672 false,
true,
false);
1701 panic(
"Unknown flat subtype!\n");
1708 std::stringstream dis_stream;
1726 std::string global_opcode =
_opcode;
1727 global_opcode.replace(0, 4,
"global");
1729 std::stringstream dis_stream;
1730 dis_stream << global_opcode <<
" ";
1744 dis_stream <<
", off";
virtual int numDstRegOperands()=0
std::vector< OperandInfo > srcOps
std::vector< OperandInfo > dstOps
bool isFlatGlobal() const
virtual int getNumOperands()=0
const std::string _opcode
virtual int numSrcRegOperands()=0
void initOperandInfo() override
Inst_DS(InFmt_DS *, const std::string &opcode)
void generateDisassembly() override
int instSize() const override
Inst_EXP(InFmt_EXP *, const std::string &opcode)
void initOperandInfo() override
int instSize() const override
void generateFlatDisassembly()
void initFlatOperandInfo()
Inst_FLAT(InFmt_FLAT *, const std::string &opcode)
void initGlobalOperandInfo()
void generateDisassembly() override
void initOperandInfo() override
void generateGlobalDisassembly()
int instSize() const override
int instSize() const override
void initOperandInfo() override
Inst_MIMG(InFmt_MIMG *, const std::string &opcode)
int instSize() const override
void initOperandInfo() override
Inst_MTBUF(InFmt_MTBUF *, const std::string &opcode)
void initOperandInfo() override
void generateDisassembly() override
Inst_MUBUF(InFmt_MUBUF *, const std::string &opcode)
int instSize() const override
void initOperandInfo() override
Inst_SMEM(InFmt_SMEM *, const std::string &opcode)
void generateDisassembly() override
int instSize() const override
int instSize() const override
void generateDisassembly() override
void initOperandInfo() override
Inst_SOP1(InFmt_SOP1 *, const std::string &opcode)
bool hasSecondDword(InFmt_SOP1 *)
bool hasSecondDword(InFmt_SOP2 *)
void generateDisassembly() override
Inst_SOP2(InFmt_SOP2 *, const std::string &opcode)
void initOperandInfo() override
int instSize() const override
int instSize() const override
bool hasSecondDword(InFmt_SOPC *)
void generateDisassembly() override
void initOperandInfo() override
Inst_SOPC(InFmt_SOPC *, const std::string &opcode)
Inst_SOPK(InFmt_SOPK *, const std::string &opcode)
int instSize() const override
void generateDisassembly() override
bool hasSecondDword(InFmt_SOPK *)
void initOperandInfo() override
void generateDisassembly() override
void initOperandInfo() override
int instSize() const override
Inst_SOPP(InFmt_SOPP *, const std::string &opcode)
int instSize() const override
Inst_VINTRP(InFmt_VINTRP *, const std::string &opcode)
Inst_VOP1(InFmt_VOP1 *, const std::string &opcode)
void generateDisassembly() override
void initOperandInfo() override
int instSize() const override
bool hasSecondDword(InFmt_VOP1 *)
void initOperandInfo() override
int instSize() const override
bool hasSecondDword(InFmt_VOP2 *)
Inst_VOP2(InFmt_VOP2 *, const std::string &opcode)
void generateDisassembly() override
Inst_VOP3A(InFmt_VOP3A *, const std::string &opcode, bool sgpr_dst)
void generateDisassembly() override
const bool sgprDst
the v_cmp and readlane instructions in the VOP3 encoding are unique because they are the only instruc...
int instSize() const override
void initOperandInfo() override
Inst_VOP3B(InFmt_VOP3B *, const std::string &opcode)
void initOperandInfo() override
void generateDisassembly() override
int instSize() const override
bool hasSecondDword(InFmt_VOPC *)
void generateDisassembly() override
void initOperandInfo() override
int instSize() const override
Inst_VOPC(InFmt_VOPC *, const std::string &opcode)
ScalarRegU32 _srcLiteral
if the instruction has a src literal - an immediate value that is part of the instruction stream - we...
int getOperandSize(int opIdx) override
This is a simple scalar statistic, like a counter.
#define panic(...)
This implements a cprintf based panic() function.
Bitfield< 24, 21 > opcode
bool isVectorReg(int opIdx)
InstFormat * MachInst
used to represent the encoding of a VEGA inst.
std::string opSelectorToRegSym(int opIdx, int numRegs=0)
bool isScalarReg(int opIdx)
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....