gem5 v24.0.0.0
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#include <generic_timer.hh>
Public Member Functions | |
GenericTimerMem (const GenericTimerMemParams &p) | |
Public Member Functions inherited from gem5::PioDevice | |
PioDevice (const Params &p) | |
virtual | ~PioDevice () |
void | init () override |
init() is called after all C++ SimObjects have been created and all ports are connected. | |
Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
Get a port with a given name and index. | |
Public Member Functions inherited from gem5::ClockedObject | |
ClockedObject (const ClockedObjectParams &p) | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. | |
Public Member Functions inherited from gem5::SimObject | |
const Params & | params () const |
SimObject (const Params &p) | |
virtual | ~SimObject () |
virtual void | loadState (CheckpointIn &cp) |
loadState() is called on each SimObject when restoring from a checkpoint. | |
virtual void | initState () |
initState() is called on each SimObject when not restoring from a checkpoint. | |
virtual void | regProbePoints () |
Register probe points for this object. | |
virtual void | regProbeListeners () |
Register probe listeners for this object. | |
ProbeManager * | getProbeManager () |
Get the probe manager for this object. | |
virtual void | startup () |
startup() is the final initialization call before simulation. | |
DrainState | drain () override |
Provide a default implementation of the drain interface for objects that don't need draining. | |
virtual void | memWriteback () |
Write back dirty buffers to memory using functional writes. | |
virtual void | memInvalidate () |
Invalidate the contents of memory buffers. | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. | |
Public Member Functions inherited from gem5::EventManager | |
EventQueue * | eventQueue () const |
void | schedule (Event &event, Tick when) |
void | deschedule (Event &event) |
void | reschedule (Event &event, Tick when, bool always=false) |
void | schedule (Event *event, Tick when) |
void | deschedule (Event *event) |
void | reschedule (Event *event, Tick when, bool always=false) |
void | wakeupEventQueue (Tick when=(Tick) -1) |
This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. | |
void | setCurTick (Tick newVal) |
EventManager (EventManager &em) | |
Event manger manages events in the event queue. | |
EventManager (EventManager *em) | |
EventManager (EventQueue *eq) | |
Public Member Functions inherited from gem5::Serializable | |
Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Member Functions inherited from gem5::Drainable | |
DrainState | drainState () const |
Return the current drain state of an object. | |
virtual void | notifyFork () |
Notify a child process of a fork. | |
Public Member Functions inherited from gem5::statistics::Group | |
Group (Group *parent, const char *name=nullptr) | |
Construct a new statistics group. | |
virtual | ~Group () |
virtual void | regStats () |
Callback to set stat parameters. | |
virtual void | resetStats () |
Callback to reset stats. | |
virtual void | preDumpStats () |
Callback before stats are dumped. | |
void | addStat (statistics::Info *info) |
Register a stat with this group. | |
const std::map< std::string, Group * > & | getStatGroups () const |
Get all child groups associated with this object. | |
const std::vector< Info * > & | getStats () const |
Get all stats associated with this object. | |
void | addStatGroup (const char *name, Group *block) |
Add a stat block as a child of this block. | |
const Info * | resolveStat (std::string name) const |
Resolve a stat by its name within this group. | |
void | mergeStatGroup (Group *block) |
Merge the contents (stats & children) of a block to this block. | |
Group ()=delete | |
Group (const Group &)=delete | |
Group & | operator= (const Group &)=delete |
Public Member Functions inherited from gem5::Named | |
Named (const std::string &name_) | |
virtual | ~Named ()=default |
virtual std::string | name () const |
Public Member Functions inherited from gem5::Clocked | |
void | updateClockPeriod () |
Update the tick to the current tick. | |
Tick | clockEdge (Cycles cycles=Cycles(0)) const |
Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. | |
Cycles | curCycle () const |
Determine the current cycle, corresponding to a tick aligned to a clock edge. | |
Tick | nextCycle () const |
Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. | |
uint64_t | frequency () const |
Tick | clockPeriod () const |
double | voltage () const |
Cycles | ticksToCycles (Tick t) const |
Tick | cyclesToTicks (Cycles c) const |
Static Public Member Functions | |
static void | validateFrameRange (const AddrRange &range) |
Validates a Generic Timer register frame address range. | |
static bool | validateAccessPerm (ArmSystem &sys, bool is_sec) |
Validates an MMIO access permissions. | |
Static Public Member Functions inherited from gem5::SimObject | |
static void | serializeAll (const std::string &cpt_dir) |
Create a checkpoint by serializing all SimObjects in the system. | |
static SimObject * | find (const char *name) |
Find the SimObject with the given name and return a pointer to it. | |
static void | setSimObjectResolver (SimObjectResolver *resolver) |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
static SimObjectResolver * | getSimObjectResolver () |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. | |
Static Public Member Functions inherited from gem5::Serializable | |
static const std::string & | currentSection () |
Gets the fully-qualified name of the active section. | |
static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
Generate a checkpoint file so that the serialization can be routed to it. | |
Protected Member Functions | |
AddrRangeList | getAddrRanges () const override |
Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to. | |
Tick | read (PacketPtr pkt) override |
Pure virtual function that the device must implement. | |
Tick | write (PacketPtr pkt) override |
Pure virtual function that the device must implement. | |
Protected Member Functions inherited from gem5::Drainable | |
Drainable () | |
virtual | ~Drainable () |
virtual void | drainResume () |
Resume execution after a successful drain. | |
void | signalDrainDone () const |
Signal that an object is drained. | |
Protected Member Functions inherited from gem5::Clocked | |
Clocked (ClockDomain &clk_domain) | |
Create a clocked object and set the clock domain based on the parameters. | |
Clocked (Clocked &)=delete | |
Clocked & | operator= (Clocked &)=delete |
virtual | ~Clocked () |
Virtual destructor due to inheritance. | |
void | resetClock () const |
Reset the object's clock using the current global tick value. | |
virtual void | clockPeriodUpdated () |
A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. | |
Private Member Functions | |
uint64_t | counterCtrlRead (Addr addr, size_t size, bool is_sec) const |
CNTControlBase (System counter control frame) | |
void | counterCtrlWrite (Addr addr, size_t size, uint64_t data, bool is_sec) |
BitUnion32 (CNTCR) Bitfield< 17 | |
EndBitUnion (CNTCR) BitUnion32(CNTSR) Bitfield< 31 | |
EndBitUnion (CNTSR) static const Addr COUNTER_CTRL_CNTCR=0x00 | |
uint64_t | counterStatusRead (Addr addr, size_t size) const |
CNTReadBase (System counter status frame) | |
void | counterStatusWrite (Addr addr, size_t size, uint64_t data) |
uint64_t | timerCtrlRead (Addr addr, size_t size, bool is_sec) const |
CNTCTLBase (Memory-mapped timer global control frame) | |
void | timerCtrlWrite (Addr addr, size_t size, uint64_t data, bool is_sec) |
Private Attributes | |
const AddrRange | counterCtrlRange |
fcreq | |
Bitfield< 2 > | scen |
Bitfield< 1 > | hdbg |
Bitfield< 0 > | en |
fcack | |
const AddrRange | counterStatusRange |
const AddrRange | timerCtrlRange |
uint32_t | cnttidr |
ID register for reporting features of implemented timer frames. | |
const AddrRangeList | addrRanges |
All MMIO ranges GenericTimerMem responds to. | |
SystemCounter & | systemCounter |
System counter reference. | |
std::vector< GenericTimerFrame * > | frames |
Timer frame references. | |
ArmSystem & | system |
Static Private Attributes | |
static const Addr | COUNTER_CTRL_CNTSR = 0x04 |
static const Addr | COUNTER_CTRL_CNTCV_LO = 0x08 |
static const Addr | COUNTER_CTRL_CNTCV_HI = 0x0c |
static const Addr | COUNTER_CTRL_CNTSCR = 0x10 |
static const Addr | COUNTER_CTRL_CNTID = 0x1c |
static const Addr | COUNTER_CTRL_CNTFID = 0x20 |
static const Addr | COUNTER_STATUS_CNTCV_LO = 0x00 |
static const Addr | COUNTER_STATUS_CNTCV_HI = 0x04 |
static const Addr | TIMER_CTRL_CNTFRQ = 0x00 |
static const Addr | TIMER_CTRL_CNTNSAR = 0x04 |
static const Addr | TIMER_CTRL_CNTTIDR = 0x08 |
static const Addr | TIMER_CTRL_CNTACR = 0x40 |
static const Addr | TIMER_CTRL_CNTVOFF_LO = 0x80 |
static const Addr | TIMER_CTRL_CNTVOFF_HI = 0x84 |
static constexpr size_t | MAX_TIMER_FRAMES = 8 |
Maximum architectural number of memory-mapped timer frames. | |
Additional Inherited Members | |
Public Types inherited from gem5::PioDevice | |
using | Params = PioDeviceParams |
Public Types inherited from gem5::ClockedObject | |
using | Params = ClockedObjectParams |
Parameters of ClockedObject. | |
Public Types inherited from gem5::SimObject | |
typedef SimObjectParams | Params |
Public Attributes inherited from gem5::ClockedObject | |
PowerState * | powerState |
Protected Attributes inherited from gem5::PioDevice | |
System * | sys |
PioPort< PioDevice > | pioPort |
The pioPort that handles the requests for us and provides us requests that it sees. | |
Protected Attributes inherited from gem5::SimObject | |
const SimObjectParams & | _params |
Cached copy of the object parameters. | |
Protected Attributes inherited from gem5::EventManager | |
EventQueue * | eventq |
A pointer to this object's event queue. | |
Definition at line 517 of file generic_timer.hh.
gem5::GenericTimerMem::GenericTimerMem | ( | const GenericTimerMemParams & | p | ) |
Definition at line 1351 of file generic_timer.cc.
References addrRanges, cnttidr, fatal_if, frames, gem5::ArmISA::i, MAX_TIMER_FRAMES, gem5::MipsISA::p, gem5::replaceBits(), gem5::SystemCounter::validateCounterRef(), and validateFrameRange().
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CNTControlBase (System counter control frame)
Definition at line 1454 of file generic_timer.cc.
References gem5::SystemCounter::activeFreqEntry(), gem5::X86ISA::addr, COUNTER_CTRL_CNTCV_HI, COUNTER_CTRL_CNTCV_LO, COUNTER_CTRL_CNTFID, COUNTER_CTRL_CNTID, COUNTER_CTRL_CNTSCR, COUNTER_CTRL_CNTSR, gem5::SystemCounter::enabled(), gem5::SystemCounter::freqTable(), gem5::ArmISA::i, gem5::ArmISA::offset, system, systemCounter, validateAccessPerm(), gem5::SystemCounter::value(), and warn.
Referenced by read().
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Definition at line 1492 of file generic_timer.cc.
References gem5::SystemCounter::activeFreqEntry(), gem5::X86ISA::addr, COUNTER_CTRL_CNTCV_HI, COUNTER_CTRL_CNTCV_LO, COUNTER_CTRL_CNTFID, COUNTER_CTRL_CNTID, COUNTER_CTRL_CNTSCR, COUNTER_CTRL_CNTSR, data, gem5::SystemCounter::disable(), gem5::SystemCounter::enable(), gem5::SystemCounter::enabled(), gem5::SystemCounter::freqTable(), gem5::SystemCounter::freqUpdateSchedule(), gem5::ArmISA::i, gem5::insertBits(), gem5::ArmISA::offset, gem5::SystemCounter::setValue(), system, systemCounter, gem5::X86ISA::val, validateAccessPerm(), gem5::SystemCounter::value(), and warn.
Referenced by write().
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CNTReadBase (System counter status frame)
Definition at line 1566 of file generic_timer.cc.
References gem5::X86ISA::addr, COUNTER_STATUS_CNTCV_HI, COUNTER_STATUS_CNTCV_LO, systemCounter, gem5::SystemCounter::value(), and warn.
Referenced by read().
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Definition at line 1579 of file generic_timer.cc.
References gem5::X86ISA::addr, COUNTER_STATUS_CNTCV_HI, COUNTER_STATUS_CNTCV_LO, and warn.
Referenced by write().
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Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to.
Implements gem5::PioDevice.
Definition at line 1395 of file generic_timer.cc.
References addrRanges.
Pure virtual function that the device must implement.
Called when a read command is recieved by the port.
pkt | Packet describing this request |
Implements gem5::PioDevice.
Definition at line 1401 of file generic_timer.cc.
References gem5::X86ISA::addr, gem5::AddrRange::contains(), counterCtrlRange, counterCtrlRead(), counterStatusRange, counterStatusRead(), DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getSize(), gem5::Packet::isSecure(), gem5::Packet::makeResponse(), panic, panic_if, gem5::Packet::setUintX(), gem5::AddrRange::start(), timerCtrlRange, and timerCtrlRead().
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CNTCTLBase (Memory-mapped timer global control frame)
Definition at line 1593 of file generic_timer.cc.
References gem5::X86ISA::addr, cnttidr, frames, gem5::SystemCounter::freq(), gem5::ArmISA::i, system, systemCounter, TIMER_CTRL_CNTACR, TIMER_CTRL_CNTFRQ, TIMER_CTRL_CNTNSAR, TIMER_CTRL_CNTTIDR, TIMER_CTRL_CNTVOFF_HI, TIMER_CTRL_CNTVOFF_LO, validateAccessPerm(), and warn.
Referenced by read().
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Definition at line 1637 of file generic_timer.cc.
References gem5::X86ISA::addr, data, frames, gem5::SystemCounter::freq(), gem5::ArmISA::i, gem5::insertBits(), system, systemCounter, TIMER_CTRL_CNTACR, TIMER_CTRL_CNTFRQ, TIMER_CTRL_CNTNSAR, TIMER_CTRL_CNTTIDR, TIMER_CTRL_CNTVOFF_HI, TIMER_CTRL_CNTVOFF_LO, validateAccessPerm(), warn, and warn_if.
Referenced by write().
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Validates an MMIO access permissions.
sys | System reference where the acces is being made |
is_sec | If the access is to secure memory |
Definition at line 1389 of file generic_timer.cc.
References gem5::PioDevice::sys.
Referenced by counterCtrlRead(), counterCtrlWrite(), timerCtrlRead(), timerCtrlWrite(), gem5::GenericTimerFrame::timerRead(), and gem5::GenericTimerFrame::timerWrite().
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Validates a Generic Timer register frame address range.
base_addr | Range of the register frame |
Definition at line 1380 of file generic_timer.cc.
References fatal_if, gem5::ArmSystem::PageBytes, and gem5::AddrRange::start().
Referenced by GenericTimerMem().
Pure virtual function that the device must implement.
Called when a write command is recieved by the port.
pkt | Packet describing this request |
Implements gem5::PioDevice.
Definition at line 1428 of file generic_timer.cc.
References gem5::X86ISA::addr, gem5::AddrRange::contains(), counterCtrlRange, counterCtrlWrite(), counterStatusRange, counterStatusWrite(), data, DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getSize(), gem5::Packet::getUintX(), gem5::Packet::isSecure(), gem5::Packet::makeResponse(), panic, panic_if, gem5::AddrRange::start(), timerCtrlRange, and timerCtrlWrite().
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All MMIO ranges GenericTimerMem responds to.
Definition at line 585 of file generic_timer.hh.
Referenced by GenericTimerMem(), and getAddrRanges().
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ID register for reporting features of implemented timer frames.
Definition at line 575 of file generic_timer.hh.
Referenced by GenericTimerMem(), and timerCtrlRead().
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Definition at line 556 of file generic_timer.hh.
Referenced by counterCtrlRead(), and counterCtrlWrite().
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Definition at line 555 of file generic_timer.hh.
Referenced by counterCtrlRead(), and counterCtrlWrite().
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Definition at line 559 of file generic_timer.hh.
Referenced by counterCtrlRead(), and counterCtrlWrite().
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Definition at line 558 of file generic_timer.hh.
Referenced by counterCtrlRead(), and counterCtrlWrite().
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Definition at line 557 of file generic_timer.hh.
Referenced by counterCtrlRead(), and counterCtrlWrite().
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Definition at line 554 of file generic_timer.hh.
Referenced by counterCtrlRead(), and counterCtrlWrite().
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Definition at line 567 of file generic_timer.hh.
Referenced by counterStatusRead(), and counterStatusWrite().
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Definition at line 566 of file generic_timer.hh.
Referenced by counterStatusRead(), and counterStatusWrite().
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Definition at line 540 of file generic_timer.hh.
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Definition at line 564 of file generic_timer.hh.
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Definition at line 546 of file generic_timer.hh.
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Definition at line 550 of file generic_timer.hh.
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Definition at line 543 of file generic_timer.hh.
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Timer frame references.
Definition at line 594 of file generic_timer.hh.
Referenced by GenericTimerMem(), timerCtrlRead(), and timerCtrlWrite().
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Definition at line 545 of file generic_timer.hh.
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Maximum architectural number of memory-mapped timer frames.
Definition at line 591 of file generic_timer.hh.
Referenced by GenericTimerMem().
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Definition at line 544 of file generic_timer.hh.
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Definition at line 596 of file generic_timer.hh.
Referenced by counterCtrlRead(), counterCtrlWrite(), timerCtrlRead(), and timerCtrlWrite().
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System counter reference.
Definition at line 588 of file generic_timer.hh.
Referenced by counterCtrlRead(), counterCtrlWrite(), counterStatusRead(), timerCtrlRead(), and timerCtrlWrite().
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Definition at line 580 of file generic_timer.hh.
Referenced by timerCtrlRead(), and timerCtrlWrite().
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Definition at line 577 of file generic_timer.hh.
Referenced by timerCtrlRead(), and timerCtrlWrite().
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Definition at line 578 of file generic_timer.hh.
Referenced by timerCtrlRead(), and timerCtrlWrite().
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Definition at line 579 of file generic_timer.hh.
Referenced by timerCtrlRead(), and timerCtrlWrite().
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Definition at line 582 of file generic_timer.hh.
Referenced by timerCtrlRead(), and timerCtrlWrite().
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Definition at line 581 of file generic_timer.hh.
Referenced by timerCtrlRead(), and timerCtrlWrite().
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Definition at line 572 of file generic_timer.hh.