generic_timer.hh

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 * All rights reserved.
 *
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 * not be construed as granting a license to any other intellectual
 * property including but not limited to intellectual property relating
 * to a hardware implementation of the functionality of the software
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#ifndef __DEV_ARM_GENERIC_TIMER_HH__
#define __DEV_ARM_GENERIC_TIMER_HH__
 
#include <cstdint>
#include <vector>
 
#include "arch/arm/isa_device.hh"
#include "arch/arm/system.hh"
#include "base/addr_range.hh"
#include "base/bitunion.hh"
#include "base/types.hh"
#include "dev/arm/base_gic.hh"
#include "dev/arm/generic_timer_miscregs_types.hh"
#include "sim/drain.hh"
#include "sim/eventq.hh"
#include "sim/serialize.hh"
#include "sim/sim_object.hh"
 
 
namespace gem5
{
 
class Checkpoint;
struct SystemCounterParams;
struct GenericTimerParams;
struct GenericTimerFrameParams;
struct GenericTimerMemParams;
 
class SystemCounterListener
{
  public:
    virtual void notify(void) = 0;
};
 
class SystemCounter : public SimObject
{
  protected:
    bool _enabled;
    uint32_t _freq;
    uint64_t _value;
    uint64_t _increment;
    std::vector<uint32_t> _freqTable;
    size_t _activeFreqEntry;
    Tick _period;
    Tick _updateTick;
 
    std::vector<SystemCounterListener *> _listeners;
 
    static constexpr size_t MAX_FREQ_ENTRIES = 1004;
 
  public:
    SystemCounter(const SystemCounterParams &p);
 
    static void validateCounterRef(SystemCounter *sys_cnt);
 
    bool enabled() const { return _enabled; }
    uint32_t freq() const { return _freq; }
    uint64_t value();
    uint64_t increment() const { return _increment; }
    std::vector<uint32_t>& freqTable() { return _freqTable; }
    size_t activeFreqEntry() const { return _activeFreqEntry; }
    Tick period() const { return _period; }
 
    void enable();
    void disable();
 
    void freqUpdateSchedule(size_t new_freq_entry);
 
    void setValue(uint64_t new_value);
 
    void registerListener(SystemCounterListener *listener);
 
    Tick whenValue(uint64_t target_val);
    Tick whenValue(uint64_t cur_val, uint64_t target_val) const;
 
    void serialize(CheckpointOut &cp) const override;
    void unserialize(CheckpointIn &cp) override;
 
  private:
    // Disable copying
    SystemCounter(const SystemCounter &c);
 
    EventFunctionWrapper _freqUpdateEvent;
    size_t _nextFreqEntry;
    void freqUpdateCallback();
 
    void updateValue(void);
 
    void updateTick(void);
 
    void notifyListeners(void) const;
};
 
class ArchTimer : public SystemCounterListener, public Drainable,
                  public Serializable
{
  protected:
    BitUnion32(ArchTimerCtrl)
    Bitfield<0> enable;
    Bitfield<1> imask;
    Bitfield<2> istatus;
    EndBitUnion(ArchTimerCtrl)
 
    
    const std::string _name;
 
    SimObject &_parent;
 
    SystemCounter &_systemCounter;
 
    ArmInterruptPin * const _interrupt;
 
    ArchTimerCtrl _control;
    uint64_t _counterLimit;
    uint64_t _offset;
 
    void updateCounter();
 
    void counterLimitReached();
    EventFunctionWrapper _counterLimitReachedEvent;
 
    virtual bool scheduleEvents() { return true; }
 
  public:
    ArchTimer(const std::string &name,
              SimObject &parent,
              SystemCounter &sysctr,
              ArmInterruptPin *interrupt);
 
    std::string name() const { return _name; }
 
    uint64_t compareValue() const { return _counterLimit; }
    void setCompareValue(uint64_t val);
 
    uint32_t timerValue() const { return _counterLimit - value(); }
    void setTimerValue(uint32_t val);
 
    uint32_t control() const { return _control; }
    void setControl(uint32_t val);
 
    uint64_t offset() const { return _offset; }
    void setOffset(uint64_t val);
 
    uint64_t value() const;
    Tick whenValue(uint64_t target_val) {
        return _systemCounter.whenValue(value(), target_val);
    }
 
    void notify(void) override;
 
    // Serializable
    void serialize(CheckpointOut &cp) const override;
    void unserialize(CheckpointIn &cp) override;
 
    // Drainable
    DrainState drain() override;
    void drainResume() override;
 
  private:
    // Disable copying
    ArchTimer(const ArchTimer &t);
};
 
class ArchTimerKvm : public ArchTimer
{
  private:
    ArmSystem &system;
 
  public:
    ArchTimerKvm(const std::string &name,
                 ArmSystem &system,
                 SimObject &parent,
                 SystemCounter &sysctr,
                 ArmInterruptPin *interrupt)
      : ArchTimer(name, parent, sysctr, interrupt), system(system) {}
 
  protected:
    // For ArchTimer's in a GenericTimerISA with Kvm execution about
    // to begin, skip rescheduling the event.
    // Otherwise, we should reschedule the event (if necessary).
    bool scheduleEvents() override;
};
 
class GenericTimer : public SimObject
{
  public:
    PARAMS(GenericTimer);
 
    GenericTimer(const Params &p);
 
    void serialize(CheckpointOut &cp) const override;
    void unserialize(CheckpointIn &cp) override;
 
  public:
    void setMiscReg(int misc_reg, unsigned cpu, RegVal val);
    RegVal readMiscReg(int misc_reg, unsigned cpu);
 
  protected:
    class CoreTimers : public SystemCounterListener, public Serializable
    {
      public:
        CoreTimers(GenericTimer &_parent, ArmSystem &system, unsigned cpu,
                   ArmInterruptPin *irq_el3_phys,
                   ArmInterruptPin *irq_el1_phys,
                   ArmInterruptPin *irq_el1_virt,
                   ArmInterruptPin *irq_el2_ns_phys,
                   ArmInterruptPin *irq_el2_ns_virt,
                   ArmInterruptPin *irq_el2_s_phys,
                   ArmInterruptPin *irq_el2_s_virt);
 
        GenericTimer &parent;
 
        uint32_t cntfrq;
 
        ArmISA::CNTKCTL cntkctl;
 
        ArmISA::CNTHCTL cnthctl;
 
        ThreadContext *threadContext;
 
        ArmInterruptPin const *irqPhysEL3;
        ArmInterruptPin const *irqPhysEL1;
        ArmInterruptPin const *irqVirtEL1;
        ArmInterruptPin const *irqPhysNsEL2;
        ArmInterruptPin const *irqVirtNsEL2;
        ArmInterruptPin const *irqPhysSEL2;
        ArmInterruptPin const *irqVirtSEL2;
 
        ArchTimerKvm physEL3;
        ArchTimerKvm physEL1;
        ArchTimerKvm virtEL1;
        ArchTimerKvm physNsEL2;
        ArchTimerKvm virtNsEL2;
        ArchTimerKvm physSEL2;
        ArchTimerKvm virtSEL2;
 
        // Event Stream. Events are generated based on a configurable
        // transitionBit over the counter value. transitionTo indicates
        // the transition direction (0->1 or 1->0)
        struct EventStream
        {
            EventFunctionWrapper event;
            uint8_t transitionTo;
            uint8_t transitionBit;
 
            uint64_t
            eventTargetValue(uint64_t val) const
            {
                uint64_t bit_val = bits(val, transitionBit);
                uint64_t ret_val = mbits(val, 63, transitionBit);
                uint64_t incr_val = 1 << transitionBit;
                if (bit_val == transitionTo)
                    incr_val *= 2;
                return ret_val + incr_val;
            }
        };
 
        EventStream physEvStream;
        EventStream virtEvStream;
        void physEventStreamCallback();
        void virtEventStreamCallback();
        void eventStreamCallback() const;
        void schedNextEvent(EventStream &ev_stream, ArchTimer &timer);
 
        void notify(void) override;
 
        void serialize(CheckpointOut &cp) const override;
        void unserialize(CheckpointIn &cp) override;
 
      private:
        // Disable copying
        CoreTimers(const CoreTimers &c);
    };
 
    CoreTimers &getTimers(int cpu_id);
    void createTimers(unsigned cpus);
 
    SystemCounter &systemCounter;
 
    std::vector<std::unique_ptr<CoreTimers>> timers;
 
  protected: // Configuration
    ArmSystem &system;
 
    void handleStream(CoreTimers::EventStream *ev_stream,
        ArchTimer *timer, RegVal old_cnt_ctl, RegVal cnt_ctl);
};
 
class GenericTimerISA : public ArmISA::BaseISADevice
{
  public:
    GenericTimerISA(GenericTimer &_parent, unsigned _cpu)
        : parent(_parent), cpu(_cpu) {}
 
    void setMiscReg(int misc_reg, RegVal val) override;
    RegVal readMiscReg(int misc_reg) override;
 
  protected:
    GenericTimer &parent;
    unsigned cpu;
};
 
class GenericTimerFrame : public PioDevice
{
  public:
    GenericTimerFrame(const GenericTimerFrameParams &p);
 
    void serialize(CheckpointOut &cp) const override;
    void unserialize(CheckpointIn &cp) override;
 
    bool hasVirtualTimer() const;
 
    uint64_t getVirtOffset() const;
 
    void setVirtOffset(uint64_t new_offset);
 
    bool hasEl0View() const;
 
    uint8_t getAccessBits() const;
 
    void setAccessBits(uint8_t data);
 
    bool hasNonSecureAccess() const;
 
    void setNonSecureAccess();
 
    bool hasReadableVoff() const;
 
  protected:
    AddrRangeList getAddrRanges() const override;
    Tick read(PacketPtr pkt) override;
    Tick write(PacketPtr pkt) override;
 
  private:
    uint64_t timerRead(Addr addr, size_t size, bool is_sec, bool to_el0) const;
    void timerWrite(Addr addr, size_t size, uint64_t data, bool is_sec,
                    bool to_el0);
    const AddrRange timerRange;
    AddrRange timerEl0Range;
 
    static const Addr TIMER_CNTPCT_LO          = 0x00;
    static const Addr TIMER_CNTPCT_HI          = 0x04;
    static const Addr TIMER_CNTVCT_LO          = 0x08;
    static const Addr TIMER_CNTVCT_HI          = 0x0c;
    static const Addr TIMER_CNTFRQ             = 0x10;
    static const Addr TIMER_CNTEL0ACR          = 0x14;
    static const Addr TIMER_CNTVOFF_LO         = 0x18;
    static const Addr TIMER_CNTVOFF_HI         = 0x1c;
    static const Addr TIMER_CNTP_CVAL_LO       = 0x20;
    static const Addr TIMER_CNTP_CVAL_HI       = 0x24;
    static const Addr TIMER_CNTP_TVAL          = 0x28;
    static const Addr TIMER_CNTP_CTL           = 0x2c;
    static const Addr TIMER_CNTV_CVAL_LO       = 0x30;
    static const Addr TIMER_CNTV_CVAL_HI       = 0x34;
    static const Addr TIMER_CNTV_TVAL          = 0x38;
    static const Addr TIMER_CNTV_CTL           = 0x3c;
 
    AddrRangeList addrRanges;
 
    SystemCounter &systemCounter;
 
    ArchTimer physTimer;
    ArchTimer virtTimer;
 
    BitUnion8(AccessBits)
        Bitfield<5> rwpt;
        Bitfield<4> rwvt;
        Bitfield<3> rvoff;
        Bitfield<2> rfrq;
        Bitfield<1> rvct;
        Bitfield<0> rpct;
    EndBitUnion(AccessBits)
    AccessBits accessBits;
 
    // Reports access properties of the CNTEL0Base register frame elements
    BitUnion16(AccessBitsEl0)
        Bitfield<9> pten;
        Bitfield<8> vten;
        Bitfield<1> vcten;
        Bitfield<0> pcten;
    EndBitUnion(AccessBitsEl0)
    AccessBitsEl0 accessBitsEl0;
 
    bool nonSecureAccess;
 
    ArmSystem &system;
};
 
class GenericTimerMem : public PioDevice
{
  public:
    GenericTimerMem(const GenericTimerMemParams &p);
 
    static void validateFrameRange(const AddrRange &range);
 
    static bool validateAccessPerm(ArmSystem &sys, bool is_sec);
 
  protected:
    AddrRangeList getAddrRanges() const override;
    Tick read(PacketPtr pkt) override;
    Tick write(PacketPtr pkt) override;
 
  private:
    uint64_t counterCtrlRead(Addr addr, size_t size, bool is_sec) const;
    void counterCtrlWrite(Addr addr, size_t size, uint64_t data, bool is_sec);
    const AddrRange counterCtrlRange;
 
    BitUnion32(CNTCR)
        Bitfield<17,8> fcreq;
        Bitfield<2> scen;
        Bitfield<1> hdbg;
        Bitfield<0> en;
    EndBitUnion(CNTCR)
 
    BitUnion32(CNTSR)
        Bitfield<31,8> fcack;
    EndBitUnion(CNTSR)
 
    static const Addr COUNTER_CTRL_CNTCR       = 0x00;
    static const Addr COUNTER_CTRL_CNTSR       = 0x04;
    static const Addr COUNTER_CTRL_CNTCV_LO    = 0x08;
    static const Addr COUNTER_CTRL_CNTCV_HI    = 0x0c;
    static const Addr COUNTER_CTRL_CNTSCR      = 0x10;
    static const Addr COUNTER_CTRL_CNTID       = 0x1c;
    static const Addr COUNTER_CTRL_CNTFID      = 0x20;
 
    uint64_t counterStatusRead(Addr addr, size_t size) const;
    void counterStatusWrite(Addr addr, size_t size, uint64_t data);
    const AddrRange counterStatusRange;
 
    static const Addr COUNTER_STATUS_CNTCV_LO  = 0x00;
    static const Addr COUNTER_STATUS_CNTCV_HI  = 0x04;
 
    uint64_t timerCtrlRead(Addr addr, size_t size, bool is_sec) const;
    void timerCtrlWrite(Addr addr, size_t size, uint64_t data, bool is_sec);
    const AddrRange timerCtrlRange;
 
    uint32_t cnttidr;
 
    static const Addr TIMER_CTRL_CNTFRQ        = 0x00;
    static const Addr TIMER_CTRL_CNTNSAR       = 0x04;
    static const Addr TIMER_CTRL_CNTTIDR       = 0x08;
    static const Addr TIMER_CTRL_CNTACR        = 0x40;
    static const Addr TIMER_CTRL_CNTVOFF_LO    = 0x80;
    static const Addr TIMER_CTRL_CNTVOFF_HI    = 0x84;
 
    const AddrRangeList addrRanges;
 
    SystemCounter &systemCounter;
 
    static constexpr size_t MAX_TIMER_FRAMES = 8;
 
    std::vector<GenericTimerFrame *> frames;
 
    ArmSystem &system;
};
 
} // namespace gem5
 
#endif // __DEV_ARM_GENERIC_TIMER_HH__