#include <hdlcd.hh>

Inheritance diagram for gem5::HDLcd:

Classes
class	DmaEngine

struct	HDLcdStats

class	PixelPump

Public Member Functions
	HDLcd (const HDLcdParams &p)

void	serialize (CheckpointOut &cp) const override
	Serialize an object.

void	unserialize (CheckpointIn &cp) override
	Unserialize an object.

void	drainResume () override
	Resume execution after a successful drain.

Tick	read (PacketPtr pkt) override
	Pure virtual function that the device must implement.

Tick	write (PacketPtr pkt) override
	Pure virtual function that the device must implement.

AddrRangeList	getAddrRanges () const override
	Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to.

bool	pxlNext (Pixel &p)

size_t	lineNext (std::vector< Pixel >::iterator pixel_it, size_t line_length)

void	pxlVSyncBegin ()

void	pxlVSyncEnd ()

void	pxlUnderrun ()

void	pxlFrameDone ()

Public Member Functions inherited from gem5::AmbaDmaDevice
	AmbaDmaDevice (const Params &p, Addr pio_size=0)

Public Member Functions inherited from gem5::DmaDevice
	DmaDevice (const Params &p)

virtual	~DmaDevice ()=default

void	dmaWrite (Addr addr, int size, Event event, uint8_t data, uint32_t sid, uint32_t ssid, Tick delay=0)

void	dmaWrite (Addr addr, int size, Event event, uint8_t data, Tick delay=0)

void	dmaRead (Addr addr, int size, Event event, uint8_t data, uint32_t sid, uint32_t ssid, Tick delay=0)

void	dmaRead (Addr addr, int size, Event event, uint8_t data, Tick delay=0)

bool	dmaPending () const

void	init () override
	init() is called after all C++ SimObjects have been created and all ports are connected.

Addr	cacheBlockSize () const

Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	Get a port with a given name and index.

Public Member Functions inherited from gem5::PioDevice
	PioDevice (const Params &p)

virtual	~PioDevice ()

void	init () override
	init() is called after all C++ SimObjects have been created and all ports are connected.

Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	Get a port with a given name and index.

Public Member Functions inherited from gem5::ClockedObject
	ClockedObject (const ClockedObjectParams &p)

Public Member Functions inherited from gem5::SimObject
const Params &	params () const

	SimObject (const Params &p)

virtual	~SimObject ()

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint.

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint.

virtual void	regProbePoints ()
	Register probe points for this object.

virtual void	regProbeListeners ()
	Register probe listeners for this object.

ProbeManager *	getProbeManager ()
	Get the probe manager for this object.

virtual void	startup ()
	startup() is the final initialization call before simulation.

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining.

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes.

virtual void	memInvalidate ()
	Invalidate the contents of memory buffers.

void	serialize (CheckpointOut &cp) const override
	Serialize an object.

void	unserialize (CheckpointIn &cp) override
	Unserialize an object.

Public Member Functions inherited from gem5::EventManager
EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers.

void	setCurTick (Tick newVal)

	EventManager (EventManager &em)
	Event manger manages events in the event queue.

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

Public Member Functions inherited from gem5::Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section.

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object.

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from gem5::Drainable
DrainState	drainState () const
	Return the current drain state of an object.

virtual void	notifyFork ()
	Notify a child process of a fork.

Public Member Functions inherited from gem5::statistics::Group
	Group (Group parent, const char name=nullptr)
	Construct a new statistics group.

virtual	~Group ()

virtual void	regStats ()
	Callback to set stat parameters.

virtual void	resetStats ()
	Callback to reset stats.

virtual void	preDumpStats ()
	Callback before stats are dumped.

void	addStat (statistics::Info *info)
	Register a stat with this group.

const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object.

const std::vector< Info * > &	getStats () const
	Get all stats associated with this object.

void	addStatGroup (const char name, Group block)
	Add a stat block as a child of this block.

const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group.

void	mergeStatGroup (Group *block)
	Merge the contents (stats & children) of a block to this block.

	Group ()=delete

	Group (const Group &)=delete

Group &	operator= (const Group &)=delete

Public Member Functions inherited from gem5::Named
	Named (const std::string &name_)

virtual	~Named ()=default

virtual std::string	name () const

Public Member Functions inherited from gem5::Clocked
void	updateClockPeriod ()
	Update the tick to the current tick.

Tick	clockEdge (Cycles cycles=Cycles(0)) const
	Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle.

Cycles	curCycle () const
	Determine the current cycle, corresponding to a tick aligned to a clock edge.

Tick	nextCycle () const
	Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future.

uint64_t	frequency () const

Tick	clockPeriod () const

double	voltage () const

Cycles	ticksToCycles (Tick t) const

Tick	cyclesToTicks (Cycles c) const

Protected Types
enum	RegisterOffset { Version = 0x0000 , Int_RawStat = 0x0010 , Int_Clear = 0x0014 , Int_Mask = 0x0018 , Int_Status = 0x001C , Fb_Base = 0x0100 , Fb_Line_Length = 0x0104 , Fb_Line_Count = 0x0108 , Fb_Line_Pitch = 0x010C , Bus_Options = 0x0110 , V_Sync = 0x0200 , V_Back_Porch = 0x0204 , V_Data = 0x0208 , V_Front_Porch = 0x020C , H_Sync = 0x0210 , H_Back_Porch = 0x0214 , H_Data = 0x0218 , H_Front_Porch = 0x021C , Polarities = 0x0220 , Command = 0x0230 , Pixel_Format = 0x0240 , Red_Select = 0x0244 , Green_Select = 0x0248 , Blue_Select = 0x024C }
	ARM HDLcd register offsets. More...

Protected Member Functions
uint32_t	readReg (Addr offset)

void	writeReg (Addr offset, uint32_t value)

PixelConverter	pixelConverter () const

DisplayTimings	displayTimings () const

void	createDmaEngine ()

void	cmdEnable ()

void	cmdDisable ()

bool	enabled () const

void	setInterrupts (uint32_t ints, uint32_t mask)
	Assign new interrupt values and update interrupt signals.

void	intMask (uint32_t mask)
	Convenience function to update the interrupt mask.

void	intRaise (uint32_t ints)
	Convenience function to raise a new interrupt.

void	intClear (uint32_t ints)
	Convenience function to clear interrupts.

uint32_t	intStatus () const
	Masked interrupt status register.

void	virtRefresh ()
	Handler for fast frame refresh in KVM-mode.

Protected Member Functions inherited from gem5::Drainable
	Drainable ()

virtual	~Drainable ()

void	signalDrainDone () const
	Signal that an object is drained.

Protected Member Functions inherited from gem5::Clocked
	Clocked (ClockDomain &clk_domain)
	Create a clocked object and set the clock domain based on the parameters.

	Clocked (Clocked &)=delete

Clocked &	operator= (Clocked &)=delete

virtual	~Clocked ()
	Virtual destructor due to inheritance.

void	resetClock () const
	Reset the object's clock using the current global tick value.

virtual void	clockPeriodUpdated ()
	A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed.

Protected Member Functions inherited from gem5::AmbaDevice
bool	readId (PacketPtr pkt, uint64_t amba_id, Addr pio_addr)

Protected Attributes
VncInput *	vnc

const bool	workaroundSwapRB

const bool	workaroundDmaLineCount

const AddrRangeList	addrRanges

const bool	enableCapture

const Addr	pixelBufferSize

const Tick	virtRefreshRate

std::vector< uint8_t >	lineBuffer

Addr	bypassLineAddress = 0

EventFunctionWrapper	virtRefreshEvent

std::unique_ptr< ImgWriter >	imgWriter
	Helper to write out bitmaps.

enums::ImageFormat	imgFormat
	Image Format.

OutputStream *	pic = nullptr
	Picture of what the current frame buffer looks like.

PixelConverter	conv = PixelConverter::rgba8888_le
	Cached pixel converter, set when the converter is enabled.

PixelPump	pixelPump

std::unique_ptr< DmaEngine >	dmaEngine

gem5::HDLcd::HDLcdStats	stats

HDLCDRegisters
HDLCD register contents.
uint32_t	int_rawstat = 0
	Interrupt raw status register.

uint32_t	int_mask = 0
	Interrupt mask register.

uint32_t	fb_base = 0
	Frame buffer base address register.

uint32_t	fb_line_length = 0
	Frame buffer Line length register.

FbLineCountReg	fb_line_count = 0

int32_t	fb_line_pitch = 0
	Frame buffer Line pitch register.

BusOptsReg	bus_options = BUS_OPTIONS_RESETV
	Bus options register.

TimingReg	v_sync = 0
	Vertical sync width register.

TimingReg	v_back_porch = 0
	Vertical back porch width register.

TimingReg	v_data = 0
	Vertical data width register.

TimingReg	v_front_porch = 0
	Vertical front porch width register.

TimingReg	h_sync = 0
	Horizontal sync width register.

TimingReg	h_back_porch = 0
	Horizontal back porch width reg.

TimingReg	h_data = 0
	Horizontal data width register.

TimingReg	h_front_porch = 0
	Horizontal front porch width reg.

PolaritiesReg	polarities = 0
	Polarities register.

CommandReg	command = 0
	Command register.

PixelFormatReg	pixel_format = 0
	Pixel format register.

ColorSelectReg	red_select = 0
	Red color select register.

ColorSelectReg	green_select = 0
	Green color select register.

ColorSelectReg	blue_select = 0
	Blue color select register.

Protected Attributes inherited from gem5::AmbaDmaDevice
uint64_t	ambaId

Addr	pioAddr

Addr	pioSize

Tick	pioDelay

ArmInterruptPin *const	interrupt

Protected Attributes inherited from gem5::DmaDevice
DmaPort	dmaPort

Protected Attributes inherited from gem5::PioDevice
System *	sys

PioPort< PioDevice >	pioPort
	The pioPort that handles the requests for us and provides us requests that it sees.

Protected Attributes inherited from gem5::SimObject
const SimObjectParams &	_params
	Cached copy of the object parameters.

Protected Attributes inherited from gem5::EventManager
EventQueue *	eventq
	A pointer to this object's event queue.

Static Protected Attributes
static constexpr size_t	BUS_OPTIONS_RESETV = 0x408
	Reset value for Bus_Options register.

static constexpr size_t	VERSION_RESETV = 0x1CDC0000
	Reset value for Version register.

static constexpr size_t	AXI_PORT_WIDTH = 8
	AXI port width in bytes.

static constexpr size_t	MAX_BURST_LEN = 16
	max number of beats delivered in one dma burst

static constexpr size_t	MAX_PIXEL_SIZE = 4
	Maximum number of bytes per pixel.

Static Protected Attributes inherited from gem5::AmbaDevice
static const int	AMBA_PER_ID0 = 0xFE0

static const int	AMBA_PER_ID1 = 0xFE4

static const int	AMBA_PER_ID2 = 0xFE8

static const int	AMBA_PER_ID3 = 0xFEC

static const int	AMBA_CEL_ID0 = 0xFF0

static const int	AMBA_CEL_ID1 = 0xFF4

static const int	AMBA_CEL_ID2 = 0xFF8

static const int	AMBA_CEL_ID3 = 0xFFC

RegisterFieldLayouts
Bit layout declarations for multi-field registers.
	version_minor

Bitfield< 15, 8 >	version_major

Bitfield< 31, 16 >	product_id

	fb_line_count

Bitfield< 31, 12 >	reserved_31_12

	burst_len

Bitfield< 7, 5 >	reserved_7_5

Bitfield< 11, 8 >	max_outstanding

	val

Bitfield< 1 >	hsync_polarity

Bitfield< 2 >	dataen_polarity

Bitfield< 3 >	data_polarity

Bitfield< 4 >	pxlclk_polarity

Bitfield< 31, 5 >	reserved_31_5

Bitfield< 31, 1 >	reserved_31_1

	reserved_2_0

Bitfield< 4, 3 >	bytes_per_pixel

Bitfield< 30, 5 >	reserved_30_5

Bitfield< 31 >	big_endian

	offset

Bitfield< 11, 8 >	size

Bitfield< 15, 12 >	reserved_15_12

Bitfield< 23, 16 >	default_color

Bitfield< 31, 24 >	reserved_31_24

static constexpr uint32_t	INT_BUS_ERROR = (1UL << 1)

static constexpr uint32_t	INT_VSYNC = (1UL << 2)

static constexpr uint32_t	INT_UNDERRUN = (1UL << 3)

	BitUnion32 (VersionReg) Bitfield< 7

	EndBitUnion (VersionReg) static const expr uint32_t INT_DMA_END

	BitUnion32 (FbLineCountReg) Bitfield< 11

	EndBitUnion (FbLineCountReg) BitUnion32(BusOptsReg) Bitfield< 4

	EndBitUnion (BusOptsReg) BitUnion32(TimingReg) Bitfield< 11

	EndBitUnion (TimingReg) BitUnion32(PolaritiesReg) Bitfield< 0 > vsync_polarity

	EndBitUnion (PolaritiesReg) BitUnion32(CommandReg) Bitfield< 0 > enable

	EndBitUnion (CommandReg) BitUnion32(PixelFormatReg) Bitfield< 2

	EndBitUnion (PixelFormatReg) BitUnion32(ColorSelectReg) Bitfield< 4

Additional Inherited Members
Public Types inherited from gem5::AmbaDmaDevice
typedef AmbaDmaDeviceParams	Params

Public Types inherited from gem5::DmaDevice
typedef DmaDeviceParams	Params

Public Types inherited from gem5::PioDevice
using	Params = PioDeviceParams

Public Types inherited from gem5::ClockedObject
using	Params = ClockedObjectParams
	Parameters of ClockedObject.

Public Types inherited from gem5::SimObject
typedef SimObjectParams	Params

Static Public Member Functions inherited from gem5::SimObject
static void	serializeAll (const std::string &cpt_dir)
	Create a checkpoint by serializing all SimObjects in the system.

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it.

static void	setSimObjectResolver (SimObjectResolver *resolver)
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

static SimObjectResolver *	getSimObjectResolver ()
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

Static Public Member Functions inherited from gem5::Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section.

static void	generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
	Generate a checkpoint file so that the serialization can be routed to it.

Public Attributes inherited from gem5::ClockedObject
PowerState *	powerState

Detailed Description

Definition at line 94 of file hdlcd.hh.

Member Enumeration Documentation

◆ RegisterOffset

enum gem5::HDLcd::RegisterOffset

protected

ARM HDLcd register offsets.

Enumerator
Version
Int_RawStat
Int_Clear
Int_Mask
Int_Status
Fb_Base
Fb_Line_Length
Fb_Line_Count
Fb_Line_Pitch
Bus_Options
V_Sync
V_Back_Porch
V_Data
V_Front_Porch
H_Sync
H_Back_Porch
H_Data
H_Front_Porch
Polarities
Command
Pixel_Format
Red_Select
Green_Select
Blue_Select

Definition at line 121 of file hdlcd.hh.

Constructor & Destructor Documentation

◆ HDLcd()

gem5::HDLcd::HDLcd ( const HDLcdParams & p )

Definition at line 60 of file hdlcd.cc.

References virtRefresh().

Member Function Documentation

◆ BitUnion32() [1/2]

gem5::HDLcd::BitUnion32 ( FbLineCountReg )

protected

◆ BitUnion32() [2/2]

gem5::HDLcd::BitUnion32 ( VersionReg )

protected

◆ cmdDisable()

void gem5::HDLcd::cmdDisable ( )

protected

Definition at line 487 of file hdlcd.cc.

References gem5::System::bypassCaches(), gem5::EventManager::deschedule(), dmaEngine, pixelPump, gem5::Event::scheduled(), gem5::BasePixelPump::stop(), gem5::PioDevice::sys, and virtRefreshEvent.

Referenced by drainResume(), and writeReg().

◆ cmdEnable()

void gem5::HDLcd::cmdEnable ( )

protected

Definition at line 471 of file hdlcd.cc.

References gem5::System::bypassCaches(), gem5::Clocked::clockEdge(), conv, createDmaEngine(), displayTimings(), pixelConverter(), pixelPump, gem5::EventManager::schedule(), gem5::BasePixelPump::start(), gem5::PioDevice::sys, gem5::BasePixelPump::updateTimings(), and virtRefreshEvent.

Referenced by drainResume(), and writeReg().

◆ createDmaEngine()

void gem5::HDLcd::createDmaEngine ( )

protected

Definition at line 446 of file hdlcd.cc.

References AXI_PORT_WIDTH, bus_options, dmaEngine, fb_line_count, fb_line_length, fb_line_pitch, gem5::findMsbSet(), MAX_BURST_LEN, pixelBufferSize, warn, and workaroundDmaLineCount.

Referenced by cmdEnable(), and unserialize().

◆ displayTimings()

DisplayTimings gem5::HDLcd::displayTimings ( ) const

protected

Definition at line 437 of file hdlcd.cc.

References h_back_porch, h_data, h_front_porch, h_sync, v_back_porch, v_data, v_front_porch, and v_sync.

Referenced by cmdEnable().

◆ drainResume()

void gem5::HDLcd::drainResume ( )

overridevirtual

Resume execution after a successful drain.

Reimplemented from gem5::Drainable.

Definition at line 182 of file hdlcd.cc.

References gem5::BasePixelPump::active(), gem5::System::bypassCaches(), cmdDisable(), cmdEnable(), gem5::Drainable::drainResume(), enabled(), pixelPump, gem5::VncInput::setDirty(), gem5::PioDevice::sys, and vnc.

◆ enabled()

bool gem5::HDLcd::enabled ( ) const

inlineprotected

Definition at line 273 of file hdlcd.hh.

References command.

Referenced by drainResume(), serialize(), and unserialize().

◆ EndBitUnion() [1/7]

gem5::HDLcd::EndBitUnion ( BusOptsReg )

protected

◆ EndBitUnion() [2/7]

gem5::HDLcd::EndBitUnion ( CommandReg )

protected

◆ EndBitUnion() [3/7]

gem5::HDLcd::EndBitUnion ( FbLineCountReg )

protected

◆ EndBitUnion() [4/7]

gem5::HDLcd::EndBitUnion ( PixelFormatReg )

protected

◆ EndBitUnion() [5/7]

gem5::HDLcd::EndBitUnion ( PolaritiesReg )

protected

◆ EndBitUnion() [6/7]

gem5::HDLcd::EndBitUnion ( TimingReg )

protected

◆ EndBitUnion() [7/7]

gem5::HDLcd::EndBitUnion ( VersionReg ) const

protected

◆ getAddrRanges()

AddrRangeList gem5::HDLcd::getAddrRanges ( ) const

inlineoverridevirtual

Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to.

Returns: a list of non-overlapping address ranges

Implements gem5::PioDevice.

Definition at line 108 of file hdlcd.hh.

References addrRanges.

◆ intClear()

void gem5::HDLcd::intClear ( uint32_t ints )

inlineprotected

Convenience function to clear interrupts.

See also: setInterrupts

Parameters

ints	Set of interrupts to clear

Definition at line 324 of file hdlcd.hh.

References int_mask, int_rawstat, and setInterrupts().

Referenced by writeReg().

◆ intMask()

void gem5::HDLcd::intMask ( uint32_t mask )

inlineprotected

Convenience function to update the interrupt mask.

See also: setInterrupts

Parameters

mask	New interrupt mask

Definition at line 303 of file hdlcd.hh.

References int_rawstat, gem5::ArmISA::mask, and setInterrupts().

Referenced by writeReg().

◆ intRaise()

void gem5::HDLcd::intRaise ( uint32_t ints )

inlineprotected

Convenience function to raise a new interrupt.

See also: setInterrupts

Parameters

ints	Set of interrupts to raise

Definition at line 312 of file hdlcd.hh.

References int_mask, int_rawstat, and setInterrupts().

Referenced by pxlUnderrun(), pxlVSyncBegin(), and writeReg().

◆ intStatus()

uint32_t gem5::HDLcd::intStatus ( ) const

inlineprotected

Masked interrupt status register.

Definition at line 330 of file hdlcd.hh.

References int_mask, and int_rawstat.

Referenced by readReg(), and setInterrupts().

◆ lineNext()

size_t gem5::HDLcd::lineNext	(	std::vector< Pixel >::iterator	pixel_it,
		size_t	line_length )

Definition at line 512 of file hdlcd.cc.

References bypassLineAddress, conv, gem5::DmaDevice::dmaRead(), fb_line_pitch, gem5::ArmISA::i, gem5::PixelConverter::length, lineBuffer, and gem5::PixelConverter::toPixel().

Referenced by gem5::HDLcd::PixelPump::nextLine().

◆ pixelConverter()

PixelConverter gem5::HDLcd::pixelConverter ( ) const

protected

Definition at line 414 of file hdlcd.cc.

References blue_select, green_select, pixel_format, red_select, and workaroundSwapRB.

Referenced by cmdEnable(), and unserialize().

◆ pxlFrameDone()

void gem5::HDLcd::pxlFrameDone ( )

Definition at line 558 of file hdlcd.cc.

References gem5::OutputDirectory::create(), gem5::csprintf(), dmaEngine, DPRINTF, gem5::HDLcd::PixelPump::dumpSettings(), enableCapture, imgWriter, gem5::Named::name(), pic, pixelPump, gem5::VncInput::setDirty(), gem5::simout, gem5::OutputStream::stream(), gem5::PioDevice::sys, vnc, and warn.

Referenced by gem5::HDLcd::PixelPump::onFrameDone().

◆ pxlNext()

bool gem5::HDLcd::pxlNext ( Pixel & p )

Definition at line 499 of file hdlcd.cc.

References conv, dmaEngine, gem5::PixelConverter::length, MAX_PIXEL_SIZE, gem5::MipsISA::p, and gem5::PixelConverter::toPixel().

Referenced by gem5::HDLcd::PixelPump::nextPixel().

◆ pxlUnderrun()

void gem5::HDLcd::pxlUnderrun ( )

Definition at line 549 of file hdlcd.cc.

References dmaEngine, DPRINTF, INT_UNDERRUN, intRaise(), stats, and gem5::HDLcd::HDLcdStats::underruns.

Referenced by gem5::HDLcd::PixelPump::onUnderrun().

◆ pxlVSyncBegin()

void gem5::HDLcd::pxlVSyncBegin ( )

Definition at line 531 of file hdlcd.cc.

References DPRINTF, INT_VSYNC, and intRaise().

Referenced by gem5::HDLcd::PixelPump::onVSyncBegin().

◆ pxlVSyncEnd()

void gem5::HDLcd::pxlVSyncEnd ( )

Definition at line 538 of file hdlcd.cc.

References gem5::System::bypassCaches(), bypassLineAddress, dmaEngine, DPRINTF, fb_base, and gem5::PioDevice::sys.

Referenced by gem5::HDLcd::PixelPump::onVSyncEnd().

◆ read()

Tick gem5::HDLcd::read ( PacketPtr pkt )

overridevirtual

Pure virtual function that the device must implement.

Called when a read command is recieved by the port.

Parameters

pkt	Packet describing this request

Returns: number of ticks it took to complete

Implements gem5::PioDevice.

Definition at line 215 of file hdlcd.cc.

References data, DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getSize(), gem5::Packet::makeAtomicResponse(), panic_if, gem5::AmbaDmaDevice::pioAddr, gem5::AmbaDmaDevice::pioDelay, gem5::AmbaDmaDevice::pioSize, readReg(), and gem5::Packet::setLE().

◆ readReg()

uint32_t gem5::HDLcd::readReg ( Addr offset )

protected

Definition at line 254 of file hdlcd.cc.

References Blue_Select, blue_select, Bus_Options, bus_options, Command, command, Fb_Base, fb_base, Fb_Line_Count, fb_line_count, Fb_Line_Length, fb_line_length, Fb_Line_Pitch, fb_line_pitch, Green_Select, green_select, H_Back_Porch, h_back_porch, H_Data, h_data, H_Front_Porch, h_front_porch, H_Sync, h_sync, Int_Clear, Int_Mask, int_mask, Int_RawStat, int_rawstat, Int_Status, intStatus(), offset, panic, Pixel_Format, pixel_format, Polarities, polarities, Red_Select, red_select, V_Back_Porch, v_back_porch, V_Data, v_data, V_Front_Porch, v_front_porch, V_Sync, v_sync, and Version.

Referenced by read().

◆ serialize()

void gem5::HDLcd::serialize ( CheckpointOut & cp ) const

overridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters

cp	Checkpoint state

Reimplemented from gem5::ClockedObject.

Definition at line 94 of file hdlcd.cc.

References blue_select, bus_options, command, dmaEngine, DPRINTF, enabled(), fb_base, fb_line_count, fb_line_length, fb_line_pitch, green_select, h_back_porch, h_data, h_front_porch, h_sync, int_mask, int_rawstat, pixel_format, pixelPump, polarities, red_select, SERIALIZE_OBJ, SERIALIZE_SCALAR, v_back_porch, v_data, v_front_porch, and v_sync.

◆ setInterrupts()

void gem5::HDLcd::setInterrupts	(	uint32_t	ints,
		uint32_t	mask )

protected

Assign new interrupt values and update interrupt signals.

A new interrupt is scheduled signalled if the set of unmasked interrupts goes empty to non-empty. Conversely, if the set of unmasked interrupts goes from non-empty to empty, the interrupt signal is cleared.

Parameters

ints	New raw interrupt status
mask	New interrupt mask

Definition at line 588 of file hdlcd.cc.

References gem5::ArmInterruptPin::clear(), int_mask, int_rawstat, gem5::AmbaDmaDevice::interrupt, intStatus(), gem5::ArmISA::mask, and gem5::ArmInterruptPin::raise().

Referenced by intClear(), intMask(), and intRaise().

◆ unserialize()

void gem5::HDLcd::unserialize ( CheckpointIn & cp )

overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters

cp	Checkpoint state

Reimplemented from gem5::ClockedObject.

Definition at line 131 of file hdlcd.cc.

References blue_select, bus_options, command, conv, createDmaEngine(), gem5::Serializable::currentSection(), dmaEngine, DPRINTF, enabled(), fb_base, fb_line_count, fb_line_length, fb_line_pitch, green_select, h_back_porch, h_data, h_front_porch, h_sync, int_mask, int_rawstat, pixel_format, pixelConverter(), pixelPump, polarities, red_select, gem5::CheckpointIn::sectionExists(), gem5::BasePixelPump::unserialize(), UNSERIALIZE_SCALAR, v_back_porch, v_data, v_front_porch, and v_sync.

◆ virtRefresh()

void gem5::HDLcd::virtRefresh ( )

protected

Handler for fast frame refresh in KVM-mode.

Definition at line 207 of file hdlcd.cc.

References gem5::curTick(), pixelPump, gem5::BasePixelPump::renderFrame(), gem5::EventManager::schedule(), virtRefreshEvent, and virtRefreshRate.

Referenced by HDLcd().

◆ write()

Tick gem5::HDLcd::write ( PacketPtr pkt )

overridevirtual

Pure virtual function that the device must implement.

Called when a write command is recieved by the port.

Parameters

pkt	Packet describing this request

Returns: number of ticks it took to complete

Implements gem5::PioDevice.

Definition at line 235 of file hdlcd.cc.

References data, DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getLE(), gem5::Packet::getSize(), gem5::Packet::makeAtomicResponse(), panic_if, gem5::AmbaDmaDevice::pioAddr, gem5::AmbaDmaDevice::pioDelay, gem5::AmbaDmaDevice::pioSize, and writeReg().

◆ writeReg()

void gem5::HDLcd::writeReg	(	Addr	offset,
		uint32_t	value )

protected

Definition at line 293 of file hdlcd.cc.

References Blue_Select, blue_select, burst_len, Bus_Options, bus_options, cmdDisable(), cmdEnable(), Command, command, DPRINTF, Fb_Base, fb_base, Fb_Line_Count, fb_line_count, Fb_Line_Length, fb_line_length, Fb_Line_Pitch, fb_line_pitch, Green_Select, green_select, H_Back_Porch, h_back_porch, H_Data, h_data, H_Front_Porch, h_front_porch, H_Sync, h_sync, Int_Clear, Int_Mask, Int_RawStat, Int_Status, intClear(), intMask(), intRaise(), max_outstanding, offset, panic, Pixel_Format, pixel_format, Polarities, polarities, Red_Select, red_select, V_Back_Porch, v_back_porch, V_Data, v_data, V_Front_Porch, v_front_porch, V_Sync, v_sync, and Version.

Referenced by write().

Member Data Documentation

◆ addrRanges

const AddrRangeList gem5::HDLcd::addrRanges

protected

Definition at line 114 of file hdlcd.hh.

Referenced by getAddrRanges().

◆ AXI_PORT_WIDTH

size_t gem5::HDLcd::AXI_PORT_WIDTH = 8

staticconstexprprotected

AXI port width in bytes.

Definition at line 156 of file hdlcd.hh.

Referenced by createDmaEngine().

◆ big_endian

Bitfield<31> gem5::HDLcd::big_endian

protected

Definition at line 215 of file hdlcd.hh.

◆ blue_select

ColorSelectReg gem5::HDLcd::blue_select = 0

protected

Blue color select register.

Definition at line 257 of file hdlcd.hh.

Referenced by pixelConverter(), readReg(), serialize(), unserialize(), and writeReg().

◆ burst_len

gem5::HDLcd::burst_len

protected

Definition at line 186 of file hdlcd.hh.

Referenced by writeReg().

◆ bus_options

BusOptsReg gem5::HDLcd::bus_options = BUS_OPTIONS_RESETV

protected

Bus options register.

Definition at line 242 of file hdlcd.hh.

Referenced by createDmaEngine(), readReg(), serialize(), unserialize(), and writeReg().

◆ BUS_OPTIONS_RESETV

size_t gem5::HDLcd::BUS_OPTIONS_RESETV = 0x408

staticconstexprprotected

Reset value for Bus_Options register.

Definition at line 150 of file hdlcd.hh.

◆ bypassLineAddress

Addr gem5::HDLcd::bypassLineAddress = 0

protected

Definition at line 366 of file hdlcd.hh.

Referenced by lineNext(), and pxlVSyncEnd().

◆ bytes_per_pixel

Bitfield<4,3> gem5::HDLcd::bytes_per_pixel

protected

Definition at line 213 of file hdlcd.hh.

◆ command

CommandReg gem5::HDLcd::command = 0

protected

Command register.

Definition at line 253 of file hdlcd.hh.

Referenced by enabled(), readReg(), serialize(), unserialize(), and writeReg().

◆ conv

PixelConverter gem5::HDLcd::conv = PixelConverter::rgba8888_le

protected

Cached pixel converter, set when the converter is enabled.

Definition at line 382 of file hdlcd.hh.

Referenced by cmdEnable(), lineNext(), pxlNext(), and unserialize().

◆ data_polarity

Bitfield<3> gem5::HDLcd::data_polarity

protected

Definition at line 201 of file hdlcd.hh.

◆ dataen_polarity

Bitfield<2> gem5::HDLcd::dataen_polarity

protected

Definition at line 200 of file hdlcd.hh.

◆ default_color

Bitfield<23,16> gem5::HDLcd::default_color

protected

Definition at line 223 of file hdlcd.hh.

◆ dmaEngine

std::unique_ptr<DmaEngine> gem5::HDLcd::dmaEngine

protected

Definition at line 414 of file hdlcd.hh.

Referenced by cmdDisable(), createDmaEngine(), pxlFrameDone(), pxlNext(), pxlUnderrun(), pxlVSyncEnd(), serialize(), and unserialize().

◆ enableCapture

const bool gem5::HDLcd::enableCapture

protected

Definition at line 115 of file hdlcd.hh.

Referenced by pxlFrameDone().

◆ fb_base

uint32_t gem5::HDLcd::fb_base = 0

protected

Frame buffer base address register.

Definition at line 237 of file hdlcd.hh.

Referenced by pxlVSyncEnd(), readReg(), serialize(), gem5::HDLcd::DmaEngine::startFrame(), unserialize(), and writeReg().

◆ fb_line_count [1/2]

gem5::HDLcd::fb_line_count

protected

Definition at line 181 of file hdlcd.hh.

Referenced by createDmaEngine(), readReg(), serialize(), unserialize(), and writeReg().

◆ fb_line_count [2/2]

FbLineCountReg gem5::HDLcd::fb_line_count = 0

protected

Definition at line 240 of file hdlcd.hh.

◆ fb_line_length

uint32_t gem5::HDLcd::fb_line_length = 0

protected

Frame buffer Line length register.

Frame buffer Line count register

Definition at line 238 of file hdlcd.hh.

Referenced by createDmaEngine(), readReg(), serialize(), unserialize(), and writeReg().

◆ fb_line_pitch

int32_t gem5::HDLcd::fb_line_pitch = 0

protected

Frame buffer Line pitch register.

Definition at line 241 of file hdlcd.hh.

Referenced by createDmaEngine(), lineNext(), readReg(), serialize(), unserialize(), and writeReg().

◆ green_select

ColorSelectReg gem5::HDLcd::green_select = 0

protected

Green color select register.

Definition at line 256 of file hdlcd.hh.

Referenced by pixelConverter(), readReg(), serialize(), unserialize(), and writeReg().

◆ h_back_porch

TimingReg gem5::HDLcd::h_back_porch = 0

protected

Horizontal back porch width reg.

Definition at line 249 of file hdlcd.hh.

Referenced by displayTimings(), readReg(), serialize(), unserialize(), and writeReg().

◆ h_data

TimingReg gem5::HDLcd::h_data = 0

protected

Horizontal data width register.

Definition at line 250 of file hdlcd.hh.

Referenced by displayTimings(), readReg(), serialize(), unserialize(), and writeReg().

◆ h_front_porch

TimingReg gem5::HDLcd::h_front_porch = 0

protected

Horizontal front porch width reg.

Definition at line 251 of file hdlcd.hh.

Referenced by displayTimings(), readReg(), serialize(), unserialize(), and writeReg().

◆ h_sync

TimingReg gem5::HDLcd::h_sync = 0

protected

Horizontal sync width register.

Definition at line 248 of file hdlcd.hh.

Referenced by displayTimings(), readReg(), serialize(), unserialize(), and writeReg().

◆ hsync_polarity

Bitfield<1> gem5::HDLcd::hsync_polarity

protected

Definition at line 199 of file hdlcd.hh.

◆ imgFormat

enums::ImageFormat gem5::HDLcd::imgFormat

protected

Image Format.

Definition at line 376 of file hdlcd.hh.

◆ imgWriter

std::unique_ptr<ImgWriter> gem5::HDLcd::imgWriter

protected

Helper to write out bitmaps.

Definition at line 373 of file hdlcd.hh.

Referenced by pxlFrameDone().

◆ INT_BUS_ERROR

uint32_t gem5::HDLcd::INT_BUS_ERROR = (1UL << 1)

staticconstexprprotected

Definition at line 176 of file hdlcd.hh.

◆ int_mask

uint32_t gem5::HDLcd::int_mask = 0

protected

Interrupt mask register.

Definition at line 236 of file hdlcd.hh.

Referenced by intClear(), intRaise(), intStatus(), readReg(), serialize(), setInterrupts(), and unserialize().

◆ int_rawstat

uint32_t gem5::HDLcd::int_rawstat = 0

protected

Interrupt raw status register.

Definition at line 235 of file hdlcd.hh.

Referenced by intClear(), intMask(), intRaise(), intStatus(), readReg(), serialize(), setInterrupts(), and unserialize().

◆ INT_UNDERRUN

uint32_t gem5::HDLcd::INT_UNDERRUN = (1UL << 3)

staticconstexprprotected

Definition at line 178 of file hdlcd.hh.

Referenced by pxlUnderrun().

◆ INT_VSYNC

uint32_t gem5::HDLcd::INT_VSYNC = (1UL << 2)

staticconstexprprotected

Definition at line 177 of file hdlcd.hh.

Referenced by pxlVSyncBegin().

◆ lineBuffer

std::vector<uint8_t> gem5::HDLcd::lineBuffer

protected

Definition at line 260 of file hdlcd.hh.

Referenced by lineNext().

◆ MAX_BURST_LEN

size_t gem5::HDLcd::MAX_BURST_LEN = 16

staticconstexprprotected

max number of beats delivered in one dma burst

Definition at line 159 of file hdlcd.hh.

Referenced by createDmaEngine().

◆ max_outstanding

Bitfield<11,8> gem5::HDLcd::max_outstanding

protected

Definition at line 188 of file hdlcd.hh.

Referenced by writeReg().

◆ MAX_PIXEL_SIZE

size_t gem5::HDLcd::MAX_PIXEL_SIZE = 4

staticconstexprprotected

Maximum number of bytes per pixel.

Definition at line 162 of file hdlcd.hh.

Referenced by pxlNext().

◆ offset

gem5::HDLcd::offset

protected

Definition at line 219 of file hdlcd.hh.

Referenced by readReg(), and writeReg().

◆ pic

OutputStream* gem5::HDLcd::pic = nullptr

protected

Picture of what the current frame buffer looks like.

Definition at line 379 of file hdlcd.hh.

Referenced by pxlFrameDone().

◆ pixel_format

PixelFormatReg gem5::HDLcd::pixel_format = 0

protected

Pixel format register.

Definition at line 254 of file hdlcd.hh.

Referenced by pixelConverter(), readReg(), serialize(), unserialize(), and writeReg().

◆ pixelBufferSize

const Addr gem5::HDLcd::pixelBufferSize

protected

Definition at line 116 of file hdlcd.hh.

Referenced by createDmaEngine().

◆ pixelPump

PixelPump gem5::HDLcd::pixelPump

protected

Definition at line 384 of file hdlcd.hh.

Referenced by cmdDisable(), cmdEnable(), drainResume(), pxlFrameDone(), serialize(), unserialize(), and virtRefresh().

◆ polarities

PolaritiesReg gem5::HDLcd::polarities = 0

protected

Polarities register.

Definition at line 252 of file hdlcd.hh.

Referenced by readReg(), serialize(), unserialize(), and writeReg().

◆ product_id

Bitfield<31,16> gem5::HDLcd::product_id

protected

Definition at line 172 of file hdlcd.hh.

◆ pxlclk_polarity

Bitfield<4> gem5::HDLcd::pxlclk_polarity

protected

Definition at line 202 of file hdlcd.hh.

◆ red_select

ColorSelectReg gem5::HDLcd::red_select = 0

protected

Red color select register.

Definition at line 255 of file hdlcd.hh.

Referenced by pixelConverter(), readReg(), serialize(), unserialize(), and writeReg().

◆ reserved_15_12

Bitfield<15,12> gem5::HDLcd::reserved_15_12

protected

Definition at line 222 of file hdlcd.hh.

◆ reserved_2_0

gem5::HDLcd::reserved_2_0

protected

Definition at line 212 of file hdlcd.hh.

◆ reserved_30_5

Bitfield<30,5> gem5::HDLcd::reserved_30_5

protected

Definition at line 214 of file hdlcd.hh.

◆ reserved_31_1

Bitfield<31,1> gem5::HDLcd::reserved_31_1

protected

Definition at line 208 of file hdlcd.hh.

◆ reserved_31_12

Bitfield< 31, 12 > gem5::HDLcd::reserved_31_12

protected

Definition at line 182 of file hdlcd.hh.

◆ reserved_31_24

Bitfield<31,24> gem5::HDLcd::reserved_31_24

protected

Definition at line 224 of file hdlcd.hh.

◆ reserved_31_5

Bitfield<31,5> gem5::HDLcd::reserved_31_5

protected

Definition at line 203 of file hdlcd.hh.

◆ reserved_7_5

Bitfield< 7, 5 > gem5::HDLcd::reserved_7_5

protected

Definition at line 187 of file hdlcd.hh.

◆ size

Bitfield<11,8> gem5::HDLcd::size

protected

Definition at line 221 of file hdlcd.hh.

◆ stats

gem5::HDLcd::HDLcdStats gem5::HDLcd::stats

protected

Referenced by pxlUnderrun().

◆ v_back_porch

TimingReg gem5::HDLcd::v_back_porch = 0

protected

Vertical back porch width register.

Definition at line 245 of file hdlcd.hh.

Referenced by displayTimings(), readReg(), serialize(), unserialize(), and writeReg().

◆ v_data

TimingReg gem5::HDLcd::v_data = 0

protected

Vertical data width register.

Definition at line 246 of file hdlcd.hh.

Referenced by displayTimings(), readReg(), serialize(), unserialize(), and writeReg().

◆ v_front_porch

TimingReg gem5::HDLcd::v_front_porch = 0

protected

Vertical front porch width register.

Definition at line 247 of file hdlcd.hh.

Referenced by displayTimings(), readReg(), serialize(), unserialize(), and writeReg().

◆ v_sync

TimingReg gem5::HDLcd::v_sync = 0

protected

Vertical sync width register.

Definition at line 244 of file hdlcd.hh.

Referenced by displayTimings(), readReg(), serialize(), unserialize(), and writeReg().

◆ val

gem5::HDLcd::val

protected

Definition at line 193 of file hdlcd.hh.

◆ version_major

Bitfield<15,8> gem5::HDLcd::version_major

protected

Definition at line 171 of file hdlcd.hh.

◆ version_minor

gem5::HDLcd::version_minor

protected

Definition at line 170 of file hdlcd.hh.

◆ VERSION_RESETV

size_t gem5::HDLcd::VERSION_RESETV = 0x1CDC0000

staticconstexprprotected

Reset value for Version register.

Definition at line 153 of file hdlcd.hh.

◆ virtRefreshEvent

EventFunctionWrapper gem5::HDLcd::virtRefreshEvent

protected

Definition at line 370 of file hdlcd.hh.

Referenced by cmdDisable(), cmdEnable(), and virtRefresh().

◆ virtRefreshRate

const Tick gem5::HDLcd::virtRefreshRate

protected

Definition at line 117 of file hdlcd.hh.

Referenced by virtRefresh().

◆ vnc

VncInput* gem5::HDLcd::vnc

protected

Definition at line 111 of file hdlcd.hh.

Referenced by drainResume(), and pxlFrameDone().

◆ workaroundDmaLineCount

const bool gem5::HDLcd::workaroundDmaLineCount

protected

Definition at line 113 of file hdlcd.hh.

Referenced by createDmaEngine().

◆ workaroundSwapRB

const bool gem5::HDLcd::workaroundSwapRB

protected

Definition at line 112 of file hdlcd.hh.

Referenced by pixelConverter().

The documentation for this class was generated from the following files:

dev/arm/hdlcd.hh
dev/arm/hdlcd.cc

Classes

Public Member Functions

Protected Types

Protected Member Functions

Protected Attributes

Static Protected Attributes

RegisterFieldLayouts

Additional Inherited Members

Detailed Description

Member Enumeration Documentation

◆ RegisterOffset

Constructor & Destructor Documentation

◆ HDLcd()

Member Function Documentation

◆ BitUnion32() [1/2]

◆ BitUnion32() [2/2]

◆ cmdDisable()

◆ cmdEnable()

◆ createDmaEngine()

◆ displayTimings()

◆ drainResume()

◆ enabled()

◆ EndBitUnion() [1/7]

◆ EndBitUnion() [2/7]

◆ EndBitUnion() [3/7]

◆ EndBitUnion() [4/7]

◆ EndBitUnion() [5/7]

◆ EndBitUnion() [6/7]

◆ EndBitUnion() [7/7]

◆ getAddrRanges()

◆ intClear()

◆ intMask()

◆ intRaise()

◆ intStatus()

◆ lineNext()

◆ pixelConverter()

◆ pxlFrameDone()

◆ pxlNext()

◆ pxlUnderrun()

◆ pxlVSyncBegin()

◆ pxlVSyncEnd()

◆ read()

◆ readReg()

◆ serialize()

◆ setInterrupts()

◆ unserialize()

◆ virtRefresh()

◆ write()

◆ writeReg()

Member Data Documentation

◆ addrRanges

◆ AXI_PORT_WIDTH

◆ big_endian

◆ blue_select

◆ burst_len

◆ bus_options

◆ BUS_OPTIONS_RESETV

◆ bypassLineAddress

◆ bytes_per_pixel

◆ command

◆ conv

◆ data_polarity

◆ dataen_polarity

◆ default_color

◆ dmaEngine

◆ enableCapture

◆ fb_base

◆ fb_line_count [1/2]

◆ fb_line_count [2/2]

◆ fb_line_length

◆ fb_line_pitch

◆ green_select

◆ h_back_porch

◆ h_data

◆ h_front_porch

◆ h_sync

◆ hsync_polarity

◆ imgFormat

◆ imgWriter

◆ INT_BUS_ERROR