gem5 v24.0.0.0
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hdlcd.cc
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1/*
2 * Copyright (c) 2010-2013, 2015, 2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#include "dev/arm/hdlcd.hh"
39
40#include "base/compiler.hh"
41#include "base/output.hh"
42#include "base/trace.hh"
43#include "base/vnc/vncinput.hh"
44#include "debug/Checkpoint.hh"
45#include "debug/HDLcd.hh"
47#include "dev/arm/base_gic.hh"
48#include "enums/ImageFormat.hh"
49#include "mem/packet.hh"
50#include "mem/packet_access.hh"
51#include "params/HDLcd.hh"
52#include "sim/system.hh"
53
54using std::vector;
55
56namespace gem5
57{
58
59// initialize hdlcd registers
60HDLcd::HDLcd(const HDLcdParams &p)
61 : AmbaDmaDevice(p, 0xFFFF),
62 // Parameters
63 vnc(p.vnc),
64 workaroundSwapRB(p.workaround_swap_rb),
65 workaroundDmaLineCount(p.workaround_dma_line_count),
66 addrRanges{RangeSize(pioAddr, pioSize)},
67 enableCapture(p.enable_capture),
68 pixelBufferSize(p.pixel_buffer_size),
69 virtRefreshRate(p.virt_refresh_rate),
70
71 virtRefreshEvent([this]{ virtRefresh(); }, name()),
72 // Other
73 imgFormat(p.frame_format),
74 pixelPump(*this, *p.pxl_clk, p.pixel_chunk),
75 stats(this)
76{
77 if (vnc)
78 vnc->setFrameBuffer(&pixelPump.fb);
79
80 imgWriter = createImgWriter(imgFormat, &pixelPump.fb);
81}
82
84 : statistics::Group(parent, "HDLcd"),
85 ADD_STAT(underruns, statistics::units::Count::get(),
86 "Number of buffer underruns")
87{
88 using namespace statistics;
89
91}
92
93void
129
130void
132{
133 DPRINTF(Checkpoint, "Unserializing ARM HDLCD\n");
134
137
143
148
153
155
161
162 {
163 // Try to unserialize the pixel pump. It might not exist if
164 // we're unserializing an old checkpoint.
165 ScopedCheckpointSection sec(cp, "pixelPump");
168 }
169
170 if (enabled()) {
171 // Create the DMA engine and read its state from the
172 // checkpoint. We don't need to worry about the pixel pump as
173 // it is a proper SimObject.
175 dmaEngine->unserializeSection(cp, "dmaEngine");
176
178 }
179}
180
181void
183{
185
186 if (enabled()) {
187 if (sys->bypassCaches()) {
188 // We restart the HDLCD if we are in KVM mode. This
189 // ensures that we always use the fast refresh logic if we
190 // resume in KVM mode.
191 cmdDisable();
192 cmdEnable();
193 } else if (!pixelPump.active()) {
194 // We restored from an old checkpoint without a pixel
195 // pump, start an new refresh. This typically happens when
196 // restoring from old checkpoints.
197 cmdEnable();
198 }
199 }
200
201 // We restored from a checkpoint and need to update the VNC server
202 if (pixelPump.active() && vnc)
203 vnc->setDirty();
204}
205
206void
212
213// read registers and frame buffer
214Tick
216{
217 assert(pkt->getAddr() >= pioAddr &&
218 pkt->getAddr() < pioAddr + pioSize);
219
220 const Addr daddr = pkt->getAddr() - pioAddr;
221 panic_if(pkt->getSize() != 4,
222 "Unhandled read size (address: 0x.4x, size: %u)",
223 daddr, pkt->getSize());
224
225 const uint32_t data = readReg(daddr);
226 DPRINTF(HDLcd, "read register 0x%04x: 0x%x\n", daddr, data);
227
228 pkt->setLE<uint32_t>(data);
229 pkt->makeAtomicResponse();
230 return pioDelay;
231}
232
233// write registers and frame buffer
234Tick
236{
237 assert(pkt->getAddr() >= pioAddr &&
238 pkt->getAddr() < pioAddr + pioSize);
239
240 const Addr daddr = pkt->getAddr() - pioAddr;
241 panic_if(pkt->getSize() != 4,
242 "Unhandled read size (address: 0x.4x, size: %u)",
243 daddr, pkt->getSize());
244 const uint32_t data = pkt->getLE<uint32_t>();
245 DPRINTF(HDLcd, "write register 0x%04x: 0x%x\n", daddr, data);
246
247 writeReg(daddr, data);
248
249 pkt->makeAtomicResponse();
250 return pioDelay;
251}
252
253uint32_t
255{
256 switch (offset) {
257 case Version: return version;
258
259 case Int_RawStat: return int_rawstat;
260 case Int_Clear:
261 panic("HDLCD INT_CLEAR register is Write-Only\n");
262 case Int_Mask: return int_mask;
263 case Int_Status: return intStatus();
264
265 case Fb_Base: return fb_base;
266 case Fb_Line_Length: return fb_line_length;
267 case Fb_Line_Count: return fb_line_count;
268 case Fb_Line_Pitch: return fb_line_pitch;
269 case Bus_Options: return bus_options;
270
271 case V_Sync: return v_sync;
272 case V_Back_Porch: return v_back_porch;
273 case V_Data: return v_data;
274 case V_Front_Porch: return v_front_porch;
275 case H_Sync: return h_sync;
276 case H_Back_Porch: return h_back_porch;
277 case H_Data: return h_data;
278 case H_Front_Porch: return h_front_porch;
279 case Polarities: return polarities;
280
281 case Command: return command;
282 case Pixel_Format: return pixel_format;
283 case Red_Select: return red_select;
284 case Green_Select: return green_select;
285 case Blue_Select: return blue_select;
286
287 default:
288 panic("Tried to read HDLCD register that doesn't exist\n", offset);
289 }
290}
291
292void
294{
295 switch (offset) {
296 case Version:
297 panic("HDLCD VERSION register is read-Only\n");
298
299 case Int_RawStat:
300 intRaise(value);
301 return;
302 case Int_Clear:
303 intClear(value);
304 return;
305 case Int_Mask:
306 intMask(value);
307 return;
308 case Int_Status:
309 panic("HDLCD INT_STATUS register is read-Only\n");
310 break;
311
312 case Fb_Base:
313 fb_base = value;
314 return;
315
316 case Fb_Line_Length:
317 fb_line_length = value;
318 return;
319
320 case Fb_Line_Count:
321 fb_line_count = value;
322 return;
323
324 case Fb_Line_Pitch:
325 fb_line_pitch = value;
326 return;
327
328 case Bus_Options: {
329 const BusOptsReg old_bus_options(bus_options);
330 bus_options = value;
331
332 if (bus_options.max_outstanding != old_bus_options.max_outstanding) {
334 "Changing HDLcd outstanding DMA transactions: %d -> %d\n",
335 old_bus_options.max_outstanding,
336 bus_options.max_outstanding);
337
338 }
339
340 if (bus_options.burst_len != old_bus_options.burst_len) {
342 "Changing HDLcd DMA burst flags: 0x%x -> 0x%x\n",
343 old_bus_options.burst_len, bus_options.burst_len);
344 }
345 } return;
346
347 case V_Sync:
348 v_sync = value;
349 return;
350 case V_Back_Porch:
351 v_back_porch = value;
352 return;
353 case V_Data:
354 v_data = value;
355 return;
356 case V_Front_Porch:
357 v_front_porch = value;
358 return;
359
360 case H_Sync:
361 h_sync = value;
362 return;
363 case H_Back_Porch:
364 h_back_porch = value;
365 return;
366 case H_Data:
367 h_data = value;
368 return;
369 case H_Front_Porch:
370 h_front_porch = value;
371 return;
372
373 case Polarities:
374 polarities = value;
375 return;
376
377 case Command: {
378 const CommandReg new_command(value);
379
380 if (new_command.enable != command.enable) {
381 DPRINTF(HDLcd, "HDLCD switched %s\n",
382 new_command.enable ? "on" : "off");
383
384 if (new_command.enable) {
385 cmdEnable();
386 } else {
387 cmdDisable();
388 }
389 }
390 command = new_command;
391 } return;
392
393 case Pixel_Format:
394 pixel_format = value;
395 return;
396
397 case Red_Select:
398 red_select = value;
399 return;
400 case Green_Select:
401 green_select = value;
402 return;
403 case Blue_Select:
404 blue_select = value;
405 return;
406
407 default:
408 panic("Tried to write HDLCD register that doesn't exist\n", offset);
409 return;
410 }
411}
412
415{
416 ByteOrder byte_order =
417 pixel_format.big_endian ? ByteOrder::big : ByteOrder::little;
418
419 /* Some Linux kernels have a broken driver that swaps the red and
420 * blue color select registers. */
421 if (!workaroundSwapRB) {
422 return PixelConverter(
423 pixel_format.bytes_per_pixel + 1,
424 red_select.offset, green_select.offset, blue_select.offset,
425 red_select.size, green_select.size, blue_select.size,
426 byte_order);
427 } else {
428 return PixelConverter(
429 pixel_format.bytes_per_pixel + 1,
430 blue_select.offset, green_select.offset, red_select.offset,
431 blue_select.size, green_select.size, red_select.size,
432 byte_order);
433 }
434}
435
438{
439 return DisplayTimings(
440 h_data.val + 1, v_data.val + 1,
441 h_back_porch.val + 1, h_sync.val + 1, h_front_porch.val + 1,
442 v_back_porch.val + 1, v_sync.val + 1, v_front_porch.val + 1);
443}
444
445void
447{
448 if (bus_options.max_outstanding == 0) {
449 warn("Maximum number of outstanding DMA transfers set to 0.");
450 return;
451 }
452
453 const uint32_t dma_burst_flags = bus_options.burst_len;
454 const uint32_t dma_burst_len = dma_burst_flags ?
455 (1UL << (findMsbSet(dma_burst_flags) - 1)) : MAX_BURST_LEN;
456 // Some drivers seem to set the DMA line count incorrectly. This
457 // could either be a driver bug or a specification bug. Unlike for
458 // timings, the specification does not require 1 to be added to
459 // the DMA engine's line count.
460 const uint32_t dma_lines =
462
463 dmaEngine.reset(new DmaEngine(
464 *this, pixelBufferSize,
465 AXI_PORT_WIDTH * dma_burst_len,
466 bus_options.max_outstanding,
467 fb_line_length, fb_line_pitch, dma_lines));
468}
469
470void
472{
475
476 // Update timing parameter before rendering frames
478
479 if (sys->bypassCaches()) {
481 } else {
483 }
484}
485
486void
488{
489 pixelPump.stop();
490 // Disable the virtual refresh event
492 assert(sys->bypassCaches());
494 }
495 dmaEngine->abortFrame();
496}
497
498bool
500{
501 uint8_t pixel_data[MAX_PIXEL_SIZE];
502 assert(conv.length <= sizeof(pixel_data));
503 if (dmaEngine->tryGet(pixel_data, conv.length)) {
504 p = conv.toPixel(pixel_data);
505 return true;
506 } else {
507 return false;
508 }
509}
510
511size_t
513{
514 const size_t byte_count = line_length * conv.length;
515
516 lineBuffer.resize(byte_count);
517 dmaRead(bypassLineAddress, byte_count, nullptr, lineBuffer.data());
518
520
521 uint8_t *bufPtr = lineBuffer.data();
522 for (size_t i = 0; i < line_length; i++) {
523 *pixel_it++ = conv.toPixel(bufPtr);
524 bufPtr += conv.length;
525 }
526
527 return line_length;
528}
529
530void
532{
533 DPRINTF(HDLcd, "Raising VSYNC interrupt.\n");
535}
536
537void
539{
540 DPRINTF(HDLcd, "End of VSYNC, starting DMA engine\n");
541 if (sys->bypassCaches()) {
543 } else {
544 dmaEngine->startFrame(fb_base);
545 }
546}
547
548void
550{
551 DPRINTF(HDLcd, "Buffer underrun, stopping DMA fill.\n");
554 dmaEngine->abortFrame();
555}
556
557void
559{
560 DPRINTF(HDLcd, "Reached end of last visible line.\n");
561
562 if (dmaEngine->size()) {
563 warn("HDLCD %u bytes still in FIFO after frame: Ensure that DMA "
564 "and PixelPump configuration is consistent\n",
565 dmaEngine->size());
566 dmaEngine->dumpSettings();
568 }
569
570 if (vnc)
571 vnc->setDirty();
572
573 if (enableCapture) {
574 if (!pic) {
575 pic = simout.create(
576 csprintf("%s.framebuffer.%s",
577 sys->name(), imgWriter->getImgExtension()),
578 true);
579 }
580
581 assert(pic);
582 pic->stream()->seekp(0);
583 imgWriter->write(*pic->stream());
584 }
585}
586
587void
588HDLcd::setInterrupts(uint32_t ints, uint32_t mask)
589{
590 const bool old_ints = intStatus();
591
592 int_mask = mask;
593 int_rawstat = ints;
594
595 if (!old_ints && intStatus()) {
596 interrupt->raise();
597 } else if (old_ints && !intStatus()) {
598 interrupt->clear();
599 }
600}
601
603 unsigned request_size, unsigned max_pending,
604 size_t line_size, ssize_t line_pitch, unsigned num_lines)
605 : DmaReadFifo(
606 _parent.dmaPort, size, request_size, max_pending,
607 Request::UNCACHEABLE),
608 parent(_parent),
609 lineSize(line_size), linePitch(line_pitch), numLines(num_lines),
610 nextLineAddr(0)
611{
612}
613
614void
616{
618
619 SERIALIZE_SCALAR(nextLineAddr);
620 SERIALIZE_SCALAR(frameEnd);
621}
622
623void
631
632void
634{
635 nextLineAddr = fb_base;
636 frameEnd = fb_base + numLines * linePitch;
637
638 startFill(nextLineAddr, lineSize);
639}
640
641void
643{
644 nextLineAddr = frameEnd;
645 stopFill();
646 flush();
647}
648
649
650void
652{
653 inform("DMA line size: %u bytes", lineSize);
654 inform("DMA line pitch: %i bytes", linePitch);
655 inform("DMA num lines: %u", numLines);
656}
657
658void
660{
661 if (nextLineAddr == frameEnd)
662 // We're done with this frame. Ignore calls to this method
663 // until the next frame has been started.
664 return;
665
666 nextLineAddr += linePitch;
667 if (nextLineAddr != frameEnd)
668 startFill(nextLineAddr, lineSize);
669}
670
671void
673{
674 parent.intRaise(INT_DMA_END);
675}
676
677void
679{
680 const DisplayTimings &t = timings();
681
682 inform("PixelPump width: %u", t.width);
683 inform("PixelPump height: %u", t.height);
684
685 inform("PixelPump horizontal back porch: %u", t.hBackPorch);
686 inform("PixelPump horizontal fron porch: %u", t.hFrontPorch);
687 inform("PixelPump horizontal fron porch: %u", t.hSync);
688
689 inform("PixelPump vertical back porch: %u", t.vBackPorch);
690 inform("PixelPump vertical fron porch: %u", t.vFrontPorch);
691 inform("PixelPump vertical fron porch: %u", t.vSync);
692}
693
694} // namespace gem5
This is a base class for AMBA devices that have to respond to Device and Implementer ID calls.
#define DPRINTF(x,...)
Definition trace.hh:210
Base class for ARM GIC implementations.
const char data[]
ArmInterruptPin *const interrupt
virtual void clear()=0
Clear a signalled interrupt.
virtual void raise()=0
Signal an interrupt.
void stop()
Immediately stop pushing pixels.
Definition pixelpump.cc:166
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition pixelpump.cc:126
bool active() const
Is the pixel pump active and refreshing the display?
Definition pixelpump.hh:192
void updateTimings(const DisplayTimings &timings)
Update frame size using display timing.
Definition pixelpump.cc:143
void start()
Starting pushing pixels in timing mode.
Definition pixelpump.cc:159
void renderFrame()
Render an entire frame in non-caching mode.
Definition pixelpump.cc:255
Tick clockEdge(Cycles cycles=Cycles(0)) const
Determine the tick when a cycle begins, by default the current one, but the argument also enables the...
void dmaRead(Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)
Buffered DMA engine helper class.
void serialize(CheckpointOut &cp) const override
Serialize an object.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
void startFrame(Addr fb_base)
Definition hdlcd.cc:633
DmaEngine(HDLcd &_parent, size_t size, unsigned request_size, unsigned max_pending, size_t line_size, ssize_t line_pitch, unsigned num_lines)
Definition hdlcd.cc:602
void onIdle() override
Last response received callback.
Definition hdlcd.cc:672
void onEndOfBlock() override
End of block callback.
Definition hdlcd.cc:659
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition hdlcd.cc:624
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition hdlcd.cc:615
void pxlFrameDone()
Definition hdlcd.cc:558
EventFunctionWrapper virtRefreshEvent
Definition hdlcd.hh:370
PolaritiesReg polarities
Polarities register.
Definition hdlcd.hh:252
void pxlUnderrun()
Definition hdlcd.cc:549
std::unique_ptr< ImgWriter > imgWriter
Helper to write out bitmaps.
Definition hdlcd.hh:373
void drainResume() override
Resume execution after a successful drain.
Definition hdlcd.cc:182
TimingReg v_sync
Vertical sync width register.
Definition hdlcd.hh:244
TimingReg v_data
Vertical data width register.
Definition hdlcd.hh:246
BusOptsReg bus_options
Bus options register.
Definition hdlcd.hh:242
void writeReg(Addr offset, uint32_t value)
Definition hdlcd.cc:293
OutputStream * pic
Picture of what the current frame buffer looks like.
Definition hdlcd.hh:379
std::unique_ptr< DmaEngine > dmaEngine
Definition hdlcd.hh:414
uint32_t int_rawstat
Interrupt raw status register.
Definition hdlcd.hh:235
ColorSelectReg blue_select
Blue color select register.
Definition hdlcd.hh:257
const Addr pixelBufferSize
Definition hdlcd.hh:116
void cmdDisable()
Definition hdlcd.cc:487
static constexpr size_t MAX_PIXEL_SIZE
Maximum number of bytes per pixel.
Definition hdlcd.hh:162
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition hdlcd.cc:131
gem5::HDLcd::HDLcdStats stats
std::vector< uint8_t > lineBuffer
Definition hdlcd.hh:260
void intMask(uint32_t mask)
Convenience function to update the interrupt mask.
Definition hdlcd.hh:303
PixelPump pixelPump
Definition hdlcd.hh:384
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition hdlcd.cc:235
VncInput * vnc
Definition hdlcd.hh:111
TimingReg v_back_porch
Vertical back porch width register.
Definition hdlcd.hh:245
void createDmaEngine()
Definition hdlcd.cc:446
uint32_t fb_line_length
Frame buffer Line length register.
Definition hdlcd.hh:238
const bool workaroundSwapRB
Definition hdlcd.hh:112
bool enabled() const
Definition hdlcd.hh:273
CommandReg command
Command register.
Definition hdlcd.hh:253
ColorSelectReg red_select
Red color select register.
Definition hdlcd.hh:255
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition hdlcd.cc:94
TimingReg h_data
Horizontal data width register.
Definition hdlcd.hh:250
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition hdlcd.cc:215
void intRaise(uint32_t ints)
Convenience function to raise a new interrupt.
Definition hdlcd.hh:312
TimingReg h_sync
Horizontal sync width register.
Definition hdlcd.hh:248
void pxlVSyncBegin()
Definition hdlcd.cc:531
size_t lineNext(std::vector< Pixel >::iterator pixel_it, size_t line_length)
Definition hdlcd.cc:512
PixelConverter conv
Cached pixel converter, set when the converter is enabled.
Definition hdlcd.hh:382
DisplayTimings displayTimings() const
Definition hdlcd.cc:437
TimingReg v_front_porch
Vertical front porch width register.
Definition hdlcd.hh:247
Bitfield< 11, 8 > size
Definition hdlcd.hh:221
uint32_t fb_base
Frame buffer base address register.
Definition hdlcd.hh:237
Bitfield< 11, 8 > max_outstanding
Definition hdlcd.hh:188
TimingReg h_front_porch
Horizontal front porch width reg.
Definition hdlcd.hh:251
TimingReg h_back_porch
Horizontal back porch width reg.
Definition hdlcd.hh:249
const bool workaroundDmaLineCount
Definition hdlcd.hh:113
void pxlVSyncEnd()
Definition hdlcd.cc:538
void virtRefresh()
Handler for fast frame refresh in KVM-mode.
Definition hdlcd.cc:207
Addr bypassLineAddress
Definition hdlcd.hh:366
int32_t fb_line_pitch
Frame buffer Line pitch register.
Definition hdlcd.hh:241
uint32_t readReg(Addr offset)
Definition hdlcd.cc:254
uint32_t intStatus() const
Masked interrupt status register.
Definition hdlcd.hh:330
void setInterrupts(uint32_t ints, uint32_t mask)
Assign new interrupt values and update interrupt signals.
Definition hdlcd.cc:588
static constexpr size_t AXI_PORT_WIDTH
AXI port width in bytes.
Definition hdlcd.hh:156
static constexpr uint32_t INT_VSYNC
Definition hdlcd.hh:177
static constexpr size_t MAX_BURST_LEN
max number of beats delivered in one dma burst
Definition hdlcd.hh:159
const bool enableCapture
Definition hdlcd.hh:115
bool pxlNext(Pixel &p)
Definition hdlcd.cc:499
const Tick virtRefreshRate
Definition hdlcd.hh:117
uint32_t int_mask
Interrupt mask register.
Definition hdlcd.hh:236
void cmdEnable()
Definition hdlcd.cc:471
PixelConverter pixelConverter() const
Definition hdlcd.cc:414
@ Fb_Line_Count
Definition hdlcd.hh:130
@ Fb_Line_Length
Definition hdlcd.hh:129
@ V_Front_Porch
Definition hdlcd.hh:136
@ Blue_Select
Definition hdlcd.hh:146
@ Pixel_Format
Definition hdlcd.hh:143
@ Green_Select
Definition hdlcd.hh:145
@ V_Back_Porch
Definition hdlcd.hh:134
@ H_Front_Porch
Definition hdlcd.hh:140
@ H_Back_Porch
Definition hdlcd.hh:138
@ Bus_Options
Definition hdlcd.hh:132
@ Fb_Line_Pitch
Definition hdlcd.hh:131
@ Int_RawStat
Definition hdlcd.hh:124
void intClear(uint32_t ints)
Convenience function to clear interrupts.
Definition hdlcd.hh:324
PixelFormatReg pixel_format
Pixel format register.
Definition hdlcd.hh:254
ColorSelectReg green_select
Green color select register.
Definition hdlcd.hh:256
static constexpr uint32_t INT_UNDERRUN
Definition hdlcd.hh:178
HDLcd(const HDLcdParams &p)
Definition hdlcd.cc:60
virtual std::string name() const
Definition named.hh:47
OutputStream * create(const std::string &name, bool binary=false, bool no_gz=false)
Creates a file in this directory (optionally compressed).
Definition output.cc:210
std::ostream * stream() const
Get the output underlying output stream.
Definition output.hh:62
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition packet.hh:295
Addr getAddr() const
Definition packet.hh:807
void setLE(T v)
Set the value in the data pointer to v as little endian.
unsigned getSize() const
Definition packet.hh:817
void makeAtomicResponse()
Definition packet.hh:1074
T getLE() const
Get the data in the packet byte swapped from little endian to host endian.
Configurable RGB pixel converter.
Definition pixel.hh:92
Pixel toPixel(uint32_t word) const
Get the Pixel representation of a color word.
Definition pixel.hh:138
unsigned length
Bytes per pixel when stored in memory (including padding)
Definition pixel.hh:184
bool bypassCaches() const
Should caches be bypassed?
Definition system.hh:279
virtual void setDirty()
The frame buffer uses this call to notify the vnc server that the frame buffer has been updated and a...
Definition vncinput.cc:93
Derived & flags(Flags _flags)
Set the flags and marks this stat to print at the end of simulation.
Statistics container.
Definition group.hh:93
STL vector class.
Definition stl.hh:37
#define ADD_STAT(n,...)
Convenience macro to add a stat to a statistics group.
Definition group.hh:75
AddrRange RangeSize(Addr start, Addr size)
constexpr int findMsbSet(uint64_t val)
Returns the bit position of the MSB that is set in the input.
Definition bitfield.hh:279
virtual void drainResume()
Resume execution after a successful drain.
Definition drain.hh:293
void deschedule(Event &event)
Definition eventq.hh:1021
bool scheduled() const
Determine if the current event is scheduled.
Definition eventq.hh:458
void schedule(Event &event, Tick when)
Definition eventq.hh:1012
#define panic(...)
This implements a cprintf based panic() function.
Definition logging.hh:188
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition logging.hh:214
static const std::string & currentSection()
Gets the fully-qualified name of the active section.
Definition serialize.cc:130
#define SERIALIZE_OBJ(obj)
This macro serializes an object into its own section.
Definition serialize.hh:648
bool sectionExists(const std::string &section)
Definition serialize.cc:203
Implementiation of the ARM HDLcd controller.
#define warn(...)
Definition logging.hh:256
#define inform(...)
Definition logging.hh:257
Bitfield< 3, 0 > mask
Definition pcstate.hh:63
Bitfield< 5 > t
Definition misc_types.hh:71
Bitfield< 7 > i
Definition misc_types.hh:67
Bitfield< 0 > p
const FlagsType nozero
Don't print if this is zero.
Definition info.hh:67
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
Tick curTick()
The universal simulation clock.
Definition cur_tick.hh:46
std::ostream CheckpointOut
Definition serialize.hh:66
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
OutputDirectory simout
Definition output.cc:62
uint64_t Tick
Tick count type.
Definition types.hh:58
std::unique_ptr< ImgWriter > createImgWriter(enums::ImageFormat type, const FrameBuffer *fb)
Factory Function which allocates a ImgWriter object and returns a smart pointer to it.
Definition imgwriter.cc:53
std::string csprintf(const char *format, const Args &...args)
Definition cprintf.hh:161
Declaration of the Packet class.
#define UNSERIALIZE_SCALAR(scalar)
Definition serialize.hh:575
#define SERIALIZE_SCALAR(scalar)
Definition serialize.hh:568
HDLcdStats(statistics::Group *parent)
Definition hdlcd.cc:83
statistics::Scalar underruns
Definition hdlcd.hh:420
Internal gem5 representation of a Pixel.
Definition pixel.hh:59
const std::string & name()
Definition trace.cc:48
Declaration of a VNC input.

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