gem5  v21.1.0.2
Public Types | Public Member Functions | Protected Member Functions | Protected Attributes | List of all members
gem5::NSGigE Class Reference

NS DP83820 Ethernet device model. More...

#include <ns_gige.hh>

Inheritance diagram for gem5::NSGigE:
gem5::EtherDevBase gem5::EtherDevice gem5::PciDevice gem5::DmaDevice gem5::PioDevice gem5::ClockedObject gem5::SimObject gem5::Clocked gem5::EventManager gem5::Serializable gem5::Drainable gem5::statistics::Group gem5::Named

Public Types

enum  TxState {
  txIdle, txDescRefr, txDescRead, txFifoBlock,
  txFragRead, txDescWrite, txAdvance
}
 Transmit State Machine states. More...
 
enum  RxState {
  rxIdle, rxDescRefr, rxDescRead, rxFifoBlock,
  rxFragWrite, rxDescWrite, rxAdvance
}
 Receive State Machine States. More...
 
enum  DmaState {
  dmaIdle, dmaReading, dmaWriting, dmaReadWaiting,
  dmaWriteWaiting
}
 
enum  EEPROMState { eepromStart, eepromGetOpcode, eepromGetAddress, eepromRead }
 EEPROM State Machine States. More...
 
- Public Types inherited from gem5::EtherDevBase
using Params = EtherDevBaseParams
 
- Public Types inherited from gem5::EtherDevice
using Params = EtherDeviceParams
 
- Public Types inherited from gem5::DmaDevice
typedef DmaDeviceParams Params
 
- Public Types inherited from gem5::PioDevice
using Params = PioDeviceParams
 
- Public Types inherited from gem5::ClockedObject
using Params = ClockedObjectParams
 Parameters of ClockedObject. More...
 
- Public Types inherited from gem5::SimObject
typedef SimObjectParams Params
 

Public Member Functions

 PARAMS (NSGigE)
 
 NSGigE (const Params &params)
 
 ~NSGigE ()
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Get a port with a given name and index. More...
 
Tick writeConfig (PacketPtr pkt) override
 This is to write to the PCI general configuration registers. More...
 
Tick read (PacketPtr pkt) override
 This reads the device registers, which are detailed in the NS83820 spec sheet. More...
 
Tick write (PacketPtr pkt) override
 Pure virtual function that the device must implement. More...
 
bool cpuIntrPending () const
 
void cpuIntrAck ()
 
bool recvPacket (EthPacketPtr packet)
 
void transferDone ()
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
void drainResume () override
 Resume execution after a successful drain. More...
 
- Public Member Functions inherited from gem5::EtherDevBase
 EtherDevBase (const Params &params)
 
- Public Member Functions inherited from gem5::EtherDevice
 EtherDevice (const Params &params)
 
- Public Member Functions inherited from gem5::PciDevice
virtual Tick readConfig (PacketPtr pkt)
 Read from the PCI config space data that is stored locally. More...
 
Addr pciToDma (Addr pci_addr) const
 
void intrPost ()
 
void intrClear ()
 
uint8_t interruptLine () const
 
AddrRangeList getAddrRanges () const override
 Determine the address ranges that this device responds to. More...
 
 PciDevice (const PciDeviceParams &params)
 Constructor for PCI Dev. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize this object to the given output stream. More...
 
void unserialize (CheckpointIn &cp) override
 Reconstruct the state of this object from a checkpoint. More...
 
const PciBusAddrbusAddr () const
 
- Public Member Functions inherited from gem5::DmaDevice
 DmaDevice (const Params &p)
 
virtual ~DmaDevice ()=default
 
void dmaWrite (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)
 
void dmaWrite (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)
 
void dmaRead (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)
 
void dmaRead (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)
 
bool dmaPending () const
 
void init () override
 init() is called after all C++ SimObjects have been created and all ports are connected. More...
 
unsigned int cacheBlockSize () const
 
- Public Member Functions inherited from gem5::PioDevice
 PioDevice (const Params &p)
 
virtual ~PioDevice ()
 
void init () override
 init() is called after all C++ SimObjects have been created and all ports are connected. More...
 
- Public Member Functions inherited from gem5::ClockedObject
 ClockedObject (const ClockedObjectParams &p)
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::SimObject
const Paramsparams () const
 
 SimObject (const Params &p)
 
virtual ~SimObject ()
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint. More...
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint. More...
 
virtual void regProbePoints ()
 Register probe points for this object. More...
 
virtual void regProbeListeners ()
 Register probe listeners for this object. More...
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object. More...
 
virtual void startup ()
 startup() is the final initialization call before simulation. More...
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining. More...
 
virtual void memWriteback ()
 Write back dirty buffers to memory using functional writes. More...
 
virtual void memInvalidate ()
 Invalidate the contents of memory buffers. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue. More...
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from gem5::Drainable
DrainState drainState () const
 Return the current drain state of an object. More...
 
virtual void notifyFork ()
 Notify a child process of a fork. More...
 
- Public Member Functions inherited from gem5::statistics::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group. More...
 
virtual ~Group ()
 
virtual void regStats ()
 Callback to set stat parameters. More...
 
virtual void resetStats ()
 Callback to reset stats. More...
 
virtual void preDumpStats ()
 Callback before stats are dumped. More...
 
void addStat (statistics::Info *info)
 Register a stat with this group. More...
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object. More...
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object. More...
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block. More...
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group. More...
 
void mergeStatGroup (Group *block)
 Merge the contents (stats & children) of a block to this block. More...
 
 Group ()=delete
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 
- Public Member Functions inherited from gem5::Clocked
void updateClockPeriod ()
 Update the tick to the current tick. More...
 
Tick clockEdge (Cycles cycles=Cycles(0)) const
 Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...
 
Cycles curCycle () const
 Determine the current cycle, corresponding to a tick aligned to a clock edge. More...
 
Tick nextCycle () const
 Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...
 
uint64_t frequency () const
 
Tick clockPeriod () const
 
double voltage () const
 
Cycles ticksToCycles (Tick t) const
 
Tick cyclesToTicks (Cycles c) const
 

Protected Member Functions

bool doRxDmaRead ()
 
bool doRxDmaWrite ()
 
bool doTxDmaRead ()
 
bool doTxDmaWrite ()
 
void rxDmaReadDone ()
 
void rxDmaWriteDone ()
 
void txDmaReadDone ()
 
void txDmaWriteDone ()
 
void txReset ()
 
void rxReset ()
 
void regsReset ()
 
void rxKick ()
 
void txKick ()
 
void eepromKick ()
 Advance the EEPROM state machine Called on rising edge of EEPROM clock bit in MEAR. More...
 
void transmit ()
 Retransmit event. More...
 
void txEventTransmit ()
 
void txDump () const
 
void rxDump () const
 
bool rxFilter (const EthPacketPtr &packet)
 
void devIntrPost (uint32_t interrupts)
 Interrupt management. More...
 
void devIntrClear (uint32_t interrupts)
 
void devIntrChangeMask ()
 
void cpuIntrPost (Tick when)
 
void cpuInterrupt ()
 
void cpuIntrClear ()
 
- Protected Member Functions inherited from gem5::PciDevice
bool getBAR (Addr addr, int &num, Addr &offs)
 Which base address register (if any) maps the given address? More...
 
- Protected Member Functions inherited from gem5::Drainable
 Drainable ()
 
virtual ~Drainable ()
 
void signalDrainDone () const
 Signal that an object is drained. More...
 
- Protected Member Functions inherited from gem5::Clocked
 Clocked (ClockDomain &clk_domain)
 Create a clocked object and set the clock domain based on the parameters. More...
 
 Clocked (Clocked &)=delete
 
Clockedoperator= (Clocked &)=delete
 
virtual ~Clocked ()
 Virtual destructor due to inheritance. More...
 
void resetClock () const
 Reset the object's clock using the current global tick value. More...
 
virtual void clockPeriodUpdated ()
 A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More...
 

Protected Attributes

dp_regs regs
 device register file More...
 
dp_rom rom
 
bool ioEnable
 pci settings More...
 
PacketFifo txFifo
 
PacketFifo rxFifo
 
EthPacketPtr txPacket
 various helper vars More...
 
EthPacketPtr rxPacket
 
uint8_t * txPacketBufPtr
 
uint8_t * rxPacketBufPtr
 
uint32_t txXferLen
 
uint32_t rxXferLen
 
bool rxDmaFree
 
bool txDmaFree
 
ns_desc32 txDesc32
 DescCaches. More...
 
ns_desc32 rxDesc32
 
ns_desc64 txDesc64
 
ns_desc64 rxDesc64
 
TxState txState
 
bool txEnable
 
bool CTDD
 Current Transmit Descriptor Done. More...
 
bool txHalt
 halt the tx state machine after next packet More...
 
Addr txFragPtr
 ptr to the next byte in the current fragment More...
 
uint32_t txDescCnt
 count of bytes remaining in the current descriptor More...
 
DmaState txDmaState
 
RxState rxState
 rx State Machine More...
 
bool rxEnable
 
bool CRDD
 Current Receive Descriptor Done. More...
 
uint32_t rxPktBytes
 num of bytes in the current packet being drained from rxDataFifo More...
 
bool rxHalt
 halt the rx state machine after current packet More...
 
Addr rxFragPtr
 ptr to the next byte in current fragment More...
 
uint32_t rxDescCnt
 count of bytes remaining in the current descriptor More...
 
DmaState rxDmaState
 
bool extstsEnable
 
EEPROMState eepromState
 EEPROM State Machine. More...
 
bool eepromClk
 
uint8_t eepromBitsToRx
 
uint8_t eepromOpcode
 
uint8_t eepromAddress
 
uint16_t eepromData
 
Tick dmaReadDelay
 
Tick dmaWriteDelay
 
Tick dmaReadFactor
 
Tick dmaWriteFactor
 
void * rxDmaData
 
Addr rxDmaAddr
 
int rxDmaLen
 
void * txDmaData
 
Addr txDmaAddr
 
int txDmaLen
 
EventFunctionWrapper rxDmaReadEvent
 
EventFunctionWrapper rxDmaWriteEvent
 
EventFunctionWrapper txDmaReadEvent
 
EventFunctionWrapper txDmaWriteEvent
 
bool dmaDescFree
 
bool dmaDataFree
 
Tick txDelay
 
Tick rxDelay
 
Tick rxKickTick
 
EventFunctionWrapper rxKickEvent
 
Tick txKickTick
 
EventFunctionWrapper txKickEvent
 
EventFunctionWrapper txEvent
 
bool rxFilterEnable
 receive address filter More...
 
bool acceptBroadcast
 
bool acceptMulticast
 
bool acceptUnicast
 
bool acceptPerfect
 
bool acceptArp
 
bool multicastHashEnable
 
Tick intrDelay
 
Tick intrTick
 
bool cpuPendingIntr
 
EventFunctionWrapperintrEvent
 
NSGigEIntinterface
 
- Protected Attributes inherited from gem5::EtherDevice
gem5::EtherDevice::EtherDeviceStats etherDeviceStats
 
- Protected Attributes inherited from gem5::PciDevice
const PciBusAddr _busAddr
 
PCIConfig config
 The current config space. More...
 
std::vector< MSIXTablemsix_table
 MSIX Table and PBA Structures. More...
 
std::vector< MSIXPbaEntrymsix_pba
 
std::array< PciBar *, 6 > BARs {}
 
PciHost::DeviceInterface hostInterface
 
Tick pioDelay
 
Tick configDelay
 
const int PMCAP_BASE
 The capability list structures and base addresses. More...
 
const int PMCAP_ID_OFFSET
 
const int PMCAP_PC_OFFSET
 
const int PMCAP_PMCS_OFFSET
 
PMCAP pmcap
 
const int MSICAP_BASE
 
MSICAP msicap
 
const int MSIXCAP_BASE
 
const int MSIXCAP_ID_OFFSET
 
const int MSIXCAP_MXC_OFFSET
 
const int MSIXCAP_MTAB_OFFSET
 
const int MSIXCAP_MPBA_OFFSET
 
int MSIX_TABLE_OFFSET
 
int MSIX_TABLE_END
 
int MSIX_PBA_OFFSET
 
int MSIX_PBA_END
 
MSIXCAP msixcap
 
const int PXCAP_BASE
 
PXCAP pxcap
 
- Protected Attributes inherited from gem5::DmaDevice
DmaPort dmaPort
 
- Protected Attributes inherited from gem5::PioDevice
Systemsys
 
PioPort< PioDevicepioPort
 The pioPort that handles the requests for us and provides us requests that it sees. More...
 
- Protected Attributes inherited from gem5::SimObject
const SimObjectParams & _params
 Cached copy of the object parameters. More...
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue. More...
 

Additional Inherited Members

- Static Public Member Functions inherited from gem5::SimObject
static void serializeAll (const std::string &cpt_dir)
 Create a checkpoint by serializing all SimObjects in the system. More...
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it. More...
 
static void setSimObjectResolver (SimObjectResolver *resolver)
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
static SimObjectResolvergetSimObjectResolver ()
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section. More...
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it. More...
 
- Public Attributes inherited from gem5::ClockedObject
PowerStatepowerState
 

Detailed Description

NS DP83820 Ethernet device model.

Definition at line 123 of file ns_gige.hh.

Member Enumeration Documentation

◆ DmaState

Enumerator
dmaIdle 
dmaReading 
dmaWriting 
dmaReadWaiting 
dmaWriteWaiting 

Definition at line 150 of file ns_gige.hh.

◆ EEPROMState

EEPROM State Machine States.

Enumerator
eepromStart 
eepromGetOpcode 
eepromGetAddress 
eepromRead 

Definition at line 160 of file ns_gige.hh.

◆ RxState

Receive State Machine States.

Enumerator
rxIdle 
rxDescRefr 
rxDescRead 
rxFifoBlock 
rxFragWrite 
rxDescWrite 
rxAdvance 

Definition at line 139 of file ns_gige.hh.

◆ TxState

Transmit State Machine states.

Enumerator
txIdle 
txDescRefr 
txDescRead 
txFifoBlock 
txFragRead 
txDescWrite 
txAdvance 

Definition at line 127 of file ns_gige.hh.

Constructor & Destructor Documentation

◆ NSGigE()

gem5::NSGigE::NSGigE ( const Params params)

Definition at line 97 of file ns_gige.cc.

References rxDmaReadDone().

◆ ~NSGigE()

gem5::NSGigE::~NSGigE ( )

Definition at line 142 of file ns_gige.cc.

References interface.

Member Function Documentation

◆ cpuInterrupt()

void gem5::NSGigE::cpuInterrupt ( )
protected

Definition at line 880 of file ns_gige.cc.

References cpuPendingIntr, gem5::curTick(), DPRINTF, intrEvent, gem5::PciDevice::intrPost(), and intrTick.

Referenced by cpuIntrPost(), and unserialize().

◆ cpuIntrAck()

void gem5::NSGigE::cpuIntrAck ( )
inline

Definition at line 348 of file ns_gige.hh.

References cpuIntrClear().

◆ cpuIntrClear()

void gem5::NSGigE::cpuIntrClear ( )
protected

◆ cpuIntrPending()

bool gem5::NSGigE::cpuIntrPending ( ) const

Definition at line 922 of file ns_gige.cc.

References cpuPendingIntr.

◆ cpuIntrPost()

void gem5::NSGigE::cpuIntrPost ( Tick  when)
protected
Todo:
this warning should be removed and the intrTick code should be fixed.

Definition at line 844 of file ns_gige.cc.

References cpuInterrupt(), gem5::curTick(), DPRINTF, intrEvent, intrTick, gem5::Named::name(), gem5::EventManager::schedule(), and gem5::Event::squash().

Referenced by devIntrChangeMask(), and devIntrPost().

◆ devIntrChangeMask()

void gem5::NSGigE::devIntrChangeMask ( )
protected

Definition at line 832 of file ns_gige.cc.

References cpuIntrClear(), cpuIntrPost(), gem5::curTick(), DPRINTF, gem5::dp_regs::imr, gem5::dp_regs::isr, and regs.

Referenced by write().

◆ devIntrClear()

void gem5::NSGigE::devIntrClear ( uint32_t  interrupts)
protected

◆ devIntrPost()

void gem5::NSGigE::devIntrPost ( uint32_t  interrupts)
protected

◆ doRxDmaRead()

bool gem5::NSGigE::doRxDmaRead ( )
protected

◆ doRxDmaWrite()

bool gem5::NSGigE::doRxDmaWrite ( )
protected

◆ doTxDmaRead()

bool gem5::NSGigE::doTxDmaRead ( )
protected

◆ doTxDmaWrite()

bool gem5::NSGigE::doTxDmaWrite ( )
protected

◆ drainResume()

void gem5::NSGigE::drainResume ( )
overridevirtual

Resume execution after a successful drain.

Reimplemented from gem5::Drainable.

Definition at line 2002 of file ns_gige.cc.

References gem5::Drainable::drainResume(), rxKick(), and txKick().

◆ eepromKick()

void gem5::NSGigE::eepromKick ( )
protected

◆ getPort()

Port & gem5::NSGigE::getPort ( const std::string &  if_name,
PortID  idx = InvalidPortID 
)
overridevirtual

Get a port with a given name and index.

This is used at binding time and returns a reference to a protocol-agnostic port.

gem5 has a request and response port interface. All memory objects are connected together via ports. These ports provide a rigid interface between these memory objects. These ports implement three different memory system modes: timing, atomic, and functional. The most important mode is the timing mode and here timing mode is used for conducting cycle-level timing experiments. The other modes are only used in special circumstances and should not be used to conduct cycle-level timing experiments. The other modes are only used in special circumstances. These ports allow SimObjects to communicate with each other.

Parameters
if_namePort name
idxIndex in the case of a VectorPort
Returns
A reference to the given port

Reimplemented from gem5::DmaDevice.

Definition at line 175 of file ns_gige.cc.

References gem5::DmaDevice::getPort(), and interface.

◆ PARAMS()

gem5::NSGigE::PARAMS ( NSGigE  )

◆ read()

Tick gem5::NSGigE::read ( PacketPtr  pkt)
overridevirtual

This reads the device registers, which are detailed in the NS83820 spec sheet.

Implements gem5::PioDevice.

Definition at line 187 of file ns_gige.cc.

References gem5::CCSR, gem5::dp_regs::ccsr, gem5::CFGR, gem5::dp_regs::command, gem5::dp_regs::config, gem5::CR, gem5::CR_RXD, gem5::CR_RXR, gem5::CR_TXD, gem5::CR_TXR, devIntrClear(), DPRINTF, gem5::FHASH_ADDR, gem5::FHASH_SIZE, gem5::dp_rom::filterHash, gem5::Packet::getAddr(), gem5::Packet::getPtr(), gem5::Packet::getSize(), gem5::GPIOR, gem5::dp_regs::gpior, gem5::IER, gem5::dp_regs::ier, gem5::IHR, gem5::dp_regs::ihr, gem5::IMR, gem5::dp_regs::imr, ioEnable, gem5::ISR, gem5::dp_regs::isr, gem5::ISR_ALL, gem5::LAST, gem5::M5REG, gem5::M5REG_RSS, gem5::M5REG_RX_THREAD, gem5::M5REG_TX_THREAD, gem5::Packet::makeAtomicResponse(), gem5::MEAR, gem5::dp_regs::mear, gem5::MIB_END, gem5::MIB_START, gem5::MIBC, gem5::dp_regs::mibc, gem5::MIBC_ACLR, gem5::MIBC_MIBS, panic, gem5::SimObject::params(), gem5::PCR, gem5::dp_regs::pcr, gem5::dp_rom::perfectMatch, gem5::PciDevice::pioDelay, gem5::PQCR, gem5::dp_regs::pqcr, gem5::PTSCR, gem5::dp_regs::ptscr, gem5::PciDevice::readConfig(), gem5::X86ISA::reg, regs, gem5::RESERVED, gem5::RFCR, gem5::dp_regs::rfcr, gem5::RFCR_RFADDR, gem5::RFDR, rom, gem5::RX_CFG, gem5::dp_regs::rxcfg, gem5::RXDP, gem5::dp_regs::rxdp, gem5::RXDP_HI, gem5::dp_regs::rxdp_hi, gem5::Packet::setLE(), gem5::SRR, gem5::dp_regs::srr, gem5::TANAR, gem5::dp_regs::tanar, gem5::TANER, gem5::dp_regs::taner, gem5::TANLPAR, gem5::dp_regs::tanlpar, gem5::TBICR, gem5::dp_regs::tbicr, gem5::TBISR, gem5::dp_regs::tbisr, gem5::TESR, gem5::dp_regs::tesr, gem5::TX_CFG, gem5::dp_regs::txcfg, gem5::TXDP, gem5::dp_regs::txdp, gem5::TXDP_HI, gem5::dp_regs::txdp_hi, gem5::VDR, gem5::dp_regs::vdr, gem5::VRCR, gem5::dp_regs::vrcr, gem5::VTCR, gem5::dp_regs::vtcr, gem5::WCSR, and gem5::dp_regs::wcsr.

◆ recvPacket()

bool gem5::NSGigE::recvPacket ( EthPacketPtr  packet)

◆ regsReset()

void gem5::NSGigE::regsReset ( )
protected

◆ rxDmaReadDone()

void gem5::NSGigE::rxDmaReadDone ( )
protected

◆ rxDmaWriteDone()

void gem5::NSGigE::rxDmaWriteDone ( )
protected

◆ rxDump()

void gem5::NSGigE::rxDump ( ) const
protected

◆ rxFilter()

bool gem5::NSGigE::rxFilter ( const EthPacketPtr packet)
protected

◆ rxKick()

void gem5::NSGigE::rxKick ( )
protected
Todo:
in reality, we should be able to start processing the packet as it arrives, and not have to wait for the full packet ot be in the receive fifo.
Todo:
do we want to schedule a future kick?

Definition at line 1040 of file ns_gige.cc.

References gem5::ns_desc32::bufptr, gem5::ns_desc64::bufptr, gem5::CFGR_M64ADDR, gem5::networking::cksum(), gem5::Clocked::clockEdge(), gem5::ns_desc32::cmdsts, gem5::ns_desc64::cmdsts, gem5::CMDSTS_INTR, gem5::CMDSTS_LEN_MASK, gem5::CMDSTS_MORE, gem5::CMDSTS_OK, gem5::CMDSTS_OWN, gem5::dp_regs::config, CRDD, gem5::curTick(), gem5::EtherDevice::EtherDeviceStats::descDmaRdBytes, gem5::EtherDevice::EtherDeviceStats::descDmaReads, gem5::EtherDevice::EtherDeviceStats::descDmaWrBytes, gem5::EtherDevice::EtherDeviceStats::descDmaWrites, devIntrPost(), dmaDataFree, dmaDescFree, dmaIdle, dmaReadWaiting, dmaWriteWaiting, doRxDmaRead(), doRxDmaWrite(), DPRINTF, gem5::PacketFifo::empty(), gem5::EtherDevice::etherDeviceStats, gem5::X86ISA::exit, gem5::ns_desc32::extsts, gem5::ns_desc64::extsts, gem5::EXTSTS_IPERR, gem5::EXTSTS_IPPKT, gem5::EXTSTS_TCPERR, gem5::EXTSTS_TCPPKT, gem5::EXTSTS_UDPERR, gem5::EXTSTS_UDPPKT, extstsEnable, gem5::PacketFifo::front(), gem5::igbreg::txd_op::ip(), gem5::ISR_RXDESC, gem5::ISR_RXIDLE, gem5::ISR_RXOK, gem5::ns_desc32::link, gem5::ns_desc64::link, gem5::NsRxStateStrings, panic, gem5::PacketFifo::pop(), regs, rxAdvance, rxDesc32, rxDesc64, rxDescCnt, rxDescRead, rxDescRefr, rxDescWrite, rxDmaAddr, rxDmaData, rxDmaFree, rxDmaLen, rxDmaState, gem5::dp_regs::rxdp, rxEnable, rxFifo, rxFifoBlock, rxFragPtr, rxFragWrite, rxIdle, gem5::EtherDevice::EtherDeviceStats::rxIpChecksums, rxKickEvent, rxKickTick, rxPacket, rxPacketBufPtr, rxPktBytes, rxState, gem5::EtherDevice::EtherDeviceStats::rxTcpChecksums, gem5::EtherDevice::EtherDeviceStats::rxUdpChecksums, rxXferLen, gem5::EventManager::schedule(), gem5::Event::scheduled(), gem5::PacketFifo::size(), and gem5::igbreg::txd_op::tcp().

Referenced by drainResume(), recvPacket(), rxDmaReadDone(), rxDmaWriteDone(), txDmaReadDone(), txDmaWriteDone(), and write().

◆ rxReset()

void gem5::NSGigE::rxReset ( )
protected

Definition at line 941 of file ns_gige.cc.

References gem5::PacketFifo::clear(), CRDD, dmaIdle, DPRINTF, rxDescCnt, rxDmaState, rxEnable, rxFifo, rxFragPtr, rxIdle, rxPktBytes, and rxState.

Referenced by write().

◆ serialize()

void gem5::NSGigE::serialize ( CheckpointOut cp) const
overridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters
cpCheckpoint state

Implements gem5::Serializable.

Definition at line 2018 of file ns_gige.cc.

References acceptArp, acceptBroadcast, acceptMulticast, acceptPerfect, acceptUnicast, gem5::dp_regs::brar, gem5::dp_regs::brdr, gem5::ns_desc32::bufptr, gem5::ns_desc64::bufptr, gem5::dp_regs::ccsr, gem5::ns_desc32::cmdsts, gem5::ns_desc64::cmdsts, gem5::dp_regs::command, gem5::dp_regs::config, cpuPendingIntr, CRDD, CTDD, gem5::curTick(), eepromAddress, eepromBitsToRx, eepromClk, eepromData, eepromOpcode, eepromState, gem5::ns_desc32::extsts, gem5::ns_desc64::extsts, extstsEnable, gem5::FHASH_SIZE, gem5::dp_rom::filterHash, gem5::dp_regs::gpior, gem5::dp_regs::ier, gem5::dp_regs::ihr, gem5::dp_regs::imr, intrEvent, intrTick, ioEnable, gem5::dp_regs::isr, gem5::ns_desc32::link, gem5::ns_desc64::link, gem5::dp_regs::mear, gem5::dp_regs::mibc, multicastHashEnable, gem5::dp_regs::pcr, gem5::dp_rom::perfectMatch, gem5::dp_regs::pqcr, gem5::dp_regs::ptscr, regs, gem5::dp_regs::rfcr, gem5::dp_regs::rfdr, rom, gem5::dp_regs::rxcfg, rxDesc32, rxDesc64, rxDescCnt, rxDmaState, gem5::dp_regs::rxdp, gem5::dp_regs::rxdp_hi, rxEnable, rxFifo, rxFilterEnable, rxFragPtr, rxKickTick, rxPacket, rxPacketBufPtr, rxPktBytes, rxState, rxXferLen, gem5::Event::scheduled(), gem5::PacketFifo::serialize(), gem5::PciDevice::serialize(), SERIALIZE_ARRAY, SERIALIZE_SCALAR, gem5::dp_regs::srr, gem5::dp_regs::tanar, gem5::dp_regs::taner, gem5::dp_regs::tanlpar, gem5::dp_regs::tbicr, gem5::dp_regs::tbisr, gem5::dp_regs::tesr, gem5::dp_regs::txcfg, txDesc32, txDesc64, txDescCnt, txDmaState, gem5::dp_regs::txdp, gem5::dp_regs::txdp_hi, txEnable, txEvent, txFifo, txFragPtr, txKickTick, txPacket, txPacketBufPtr, txState, txXferLen, gem5::dp_regs::vdr, gem5::dp_regs::vrcr, gem5::dp_regs::vtcr, gem5::dp_regs::wcsr, and gem5::Event::when().

◆ transferDone()

void gem5::NSGigE::transferDone ( )

◆ transmit()

void gem5::NSGigE::transmit ( )
protected

◆ txDmaReadDone()

void gem5::NSGigE::txDmaReadDone ( )
protected

◆ txDmaWriteDone()

void gem5::NSGigE::txDmaWriteDone ( )
protected

◆ txDump()

void gem5::NSGigE::txDump ( ) const
protected

◆ txEventTransmit()

void gem5::NSGigE::txEventTransmit ( )
inlineprotected

Definition at line 293 of file ns_gige.hh.

References transmit(), txFifoBlock, txKick(), and txState.

◆ txKick()

void gem5::NSGigE::txKick ( )
protected
Todo:
do we want to schedule a future kick?

Definition at line 1467 of file ns_gige.cc.

References gem5::PacketFifo::avail(), gem5::debug::breakpoint(), gem5::ns_desc32::bufptr, gem5::ns_desc64::bufptr, gem5::CFGR_M64ADDR, gem5::networking::cksum(), gem5::Clocked::clockEdge(), gem5::ns_desc32::cmdsts, gem5::ns_desc64::cmdsts, gem5::CMDSTS_INTR, gem5::CMDSTS_LEN_MASK, gem5::CMDSTS_MORE, gem5::CMDSTS_OK, gem5::CMDSTS_OWN, gem5::dp_regs::config, CTDD, gem5::curTick(), gem5::EtherDevice::EtherDeviceStats::descDmaRdBytes, gem5::EtherDevice::EtherDeviceStats::descDmaReads, gem5::EtherDevice::EtherDeviceStats::descDmaWrBytes, gem5::EtherDevice::EtherDeviceStats::descDmaWrites, devIntrPost(), dmaDataFree, dmaDescFree, dmaIdle, dmaReadWaiting, dmaWriteWaiting, doTxDmaRead(), doTxDmaWrite(), DPRINTF, gem5::EtherDevice::etherDeviceStats, gem5::X86ISA::exit, gem5::ns_desc32::extsts, gem5::ns_desc64::extsts, gem5::EXTSTS_IPPKT, gem5::EXTSTS_TCPPKT, gem5::EXTSTS_UDPPKT, extstsEnable, gem5::PacketFifo::full(), gem5::igbreg::txd_op::ip(), gem5::ISR_TXDESC, gem5::ISR_TXIDLE, gem5::ns_desc32::link, gem5::ns_desc64::link, gem5::NsTxStateStrings, panic, gem5::PacketFifo::push(), regs, gem5::PacketFifo::reserve(), gem5::EventManager::schedule(), gem5::Event::scheduled(), gem5::networking::UdpHdr::sum(), gem5::igbreg::txd_op::tcp(), transmit(), txAdvance, txDesc32, txDesc64, txDescCnt, txDescRead, txDescRefr, txDescWrite, txDmaAddr, txDmaData, txDmaFree, txDmaLen, txDmaState, gem5::dp_regs::txdp, txEnable, txFifo, txFifoBlock, txFragPtr, txFragRead, txIdle, gem5::EtherDevice::EtherDeviceStats::txIpChecksums, txKickEvent, txKickTick, txPacket, txPacketBufPtr, txState, gem5::EtherDevice::EtherDeviceStats::txTcpChecksums, gem5::EtherDevice::EtherDeviceStats::txUdpChecksums, txXferLen, gem5::dp_regs::vtcr, gem5::VTCR_PPCHK, and warn_once.

Referenced by drainResume(), rxDmaReadDone(), rxDmaWriteDone(), txDmaReadDone(), txDmaWriteDone(), txEventTransmit(), and write().

◆ txReset()

void gem5::NSGigE::txReset ( )
protected

Definition at line 926 of file ns_gige.cc.

References gem5::PacketFifo::clear(), CTDD, dmaIdle, DPRINTF, txDescCnt, txDmaState, txEnable, txFifo, txFragPtr, txIdle, and txState.

Referenced by write().

◆ unserialize()

void gem5::NSGigE::unserialize ( CheckpointIn cp)
overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters
cpCheckpoint state

Implements gem5::Serializable.

Definition at line 2191 of file ns_gige.cc.

References acceptArp, acceptBroadcast, acceptMulticast, acceptPerfect, acceptUnicast, gem5::dp_regs::brar, gem5::dp_regs::brdr, gem5::ns_desc32::bufptr, gem5::ns_desc64::bufptr, gem5::dp_regs::ccsr, gem5::ns_desc32::cmdsts, gem5::ns_desc64::cmdsts, gem5::dp_regs::command, gem5::dp_regs::config, cpuInterrupt(), cpuPendingIntr, CRDD, CTDD, gem5::curTick(), eepromAddress, eepromBitsToRx, eepromClk, eepromData, eepromOpcode, eepromState, gem5::ns_desc32::extsts, gem5::ns_desc64::extsts, extstsEnable, gem5::FHASH_SIZE, gem5::dp_rom::filterHash, gem5::dp_regs::gpior, gem5::dp_regs::ier, gem5::dp_regs::ihr, gem5::dp_regs::imr, intrEvent, intrTick, ioEnable, gem5::dp_regs::isr, gem5::ns_desc32::link, gem5::ns_desc64::link, gem5::dp_regs::mear, gem5::dp_regs::mibc, multicastHashEnable, gem5::Named::name(), gem5::dp_regs::pcr, gem5::dp_rom::perfectMatch, gem5::dp_regs::pqcr, gem5::dp_regs::ptscr, regs, gem5::dp_regs::rfcr, gem5::dp_regs::rfdr, rom, gem5::dp_regs::rxcfg, rxDesc32, rxDesc64, rxDescCnt, rxDmaState, gem5::dp_regs::rxdp, gem5::dp_regs::rxdp_hi, rxEnable, rxFifo, rxFilterEnable, rxFragPtr, rxKickEvent, rxKickTick, rxPacket, rxPacketBufPtr, rxPktBytes, rxState, rxXferLen, gem5::EventManager::schedule(), gem5::dp_regs::srr, gem5::dp_regs::tanar, gem5::dp_regs::taner, gem5::dp_regs::tanlpar, gem5::dp_regs::tbicr, gem5::dp_regs::tbisr, gem5::dp_regs::tesr, gem5::dp_regs::txcfg, txDesc32, txDesc64, txDescCnt, txDmaState, gem5::dp_regs::txdp, gem5::dp_regs::txdp_hi, txEnable, txEvent, txFifo, txFragPtr, txKickEvent, txKickTick, txPacket, txPacketBufPtr, txState, txXferLen, gem5::PacketFifo::unserialize(), gem5::PciDevice::unserialize(), UNSERIALIZE_ARRAY, UNSERIALIZE_SCALAR, gem5::dp_regs::vdr, gem5::dp_regs::vrcr, gem5::dp_regs::vtcr, and gem5::dp_regs::wcsr.

◆ write()

Tick gem5::NSGigE::write ( PacketPtr  pkt)
overridevirtual

Pure virtual function that the device must implement.

Called when a write command is recieved by the port.

Parameters
pktPacket describing this request
Returns
number of ticks it took to complete

Implements gem5::PioDevice.

Definition at line 409 of file ns_gige.cc.

References acceptArp, acceptBroadcast, acceptMulticast, acceptPerfect, acceptUnicast, gem5::BRAR, gem5::dp_regs::brar, gem5::BRDR, gem5::CCSR, gem5::dp_regs::ccsr, gem5::CFGR, gem5::CFGR_AUTO_1000, gem5::CFGR_DUPSTS, gem5::CFGR_EXTSTS_EN, gem5::CFGR_LNKSTS, gem5::CFGR_PCI64_DET, gem5::CFGR_RESERVED, gem5::CFGR_SPDSTS, gem5::CFGR_T64ADDR, gem5::dp_regs::command, gem5::dp_regs::config, gem5::CR, gem5::CR_RST, gem5::CR_RXD, gem5::CR_RXE, gem5::CR_RXR, gem5::CR_SWI, gem5::CR_TXD, gem5::CR_TXE, gem5::CR_TXR, CRDD, CTDD, devIntrChangeMask(), devIntrPost(), DPRINTF, eepromClk, eepromKick(), eepromStart, eepromState, extstsEnable, gem5::FHASH_ADDR, gem5::FHASH_SIZE, gem5::dp_rom::filterHash, gem5::Packet::getAddr(), gem5::Packet::getLE(), gem5::Packet::getSize(), gem5::GPIOR, gem5::dp_regs::gpior, gem5::GPIOR_GP1_IN, gem5::GPIOR_GP2_IN, gem5::GPIOR_GP3_IN, gem5::GPIOR_GP4_IN, gem5::GPIOR_GP5_IN, gem5::GPIOR_UNUSED, gem5::IER, gem5::dp_regs::ier, gem5::IHR, gem5::dp_regs::ihr, gem5::IMR, gem5::dp_regs::imr, ioEnable, gem5::ISR, gem5::ISR_SWI, gem5::LAST, gem5::Packet::makeAtomicResponse(), gem5::MEAR, gem5::dp_regs::mear, gem5::MEAR_EECLK, gem5::MEAR_EEDI, gem5::MEAR_EEDO, gem5::MEAR_EESEL, gem5::MIBC, multicastHashEnable, panic, gem5::PCR, gem5::dp_regs::pcr, gem5::dp_rom::perfectMatch, gem5::PciDevice::pioDelay, gem5::PQCR, gem5::dp_regs::pqcr, gem5::PTSCR, gem5::dp_regs::ptscr, gem5::PTSCR_EEBIST_EN, gem5::PTSCR_EELOAD_EN, gem5::PTSCR_RBIST_DONE, gem5::PTSCR_RBIST_EN, gem5::PTSCR_RBIST_RDONLY, gem5::X86ISA::reg, regs, regsReset(), gem5::RESERVED, gem5::RFCR, gem5::dp_regs::rfcr, gem5::RFCR_AAB, gem5::RFCR_AAM, gem5::RFCR_AARP, gem5::RFCR_AAU, gem5::RFCR_APM, gem5::RFCR_MHEN, gem5::RFCR_RFADDR, gem5::RFCR_RFEN, gem5::RFCR_UHEN, gem5::RFCR_ULM, gem5::RFDR, rom, gem5::RX_CFG, gem5::dp_regs::rxcfg, gem5::RXDP, gem5::dp_regs::rxdp, gem5::RXDP_HI, gem5::dp_regs::rxdp_hi, rxEnable, rxFilterEnable, rxIdle, rxKick(), rxReset(), rxState, gem5::SRR, gem5::TANAR, gem5::dp_regs::tanar, gem5::TANAR_RF1, gem5::TANAR_RF2, gem5::TANAR_UNUSED, gem5::TANER, gem5::TANLPAR, gem5::dp_regs::tanlpar, gem5::TBICR, gem5::dp_regs::tbicr, gem5::TBICR_MR_AN_ENABLE, gem5::TBICR_MR_LOOPBACK, gem5::TBISR, gem5::dp_regs::tbisr, gem5::TBISR_MR_AN_COMPLETE, gem5::TBISR_MR_LINK_STATUS, gem5::TESR, gem5::dp_regs::tesr, gem5::TX_CFG, gem5::dp_regs::txcfg, gem5::TXDP, gem5::dp_regs::txdp, gem5::TXDP_HI, gem5::dp_regs::txdp_hi, txEnable, txIdle, txKick(), txReset(), txState, gem5::VDR, gem5::VRCR, gem5::dp_regs::vrcr, gem5::VTCR, gem5::dp_regs::vtcr, gem5::WCSR, gem5::dp_regs::wcsr, and writeConfig().

◆ writeConfig()

Tick gem5::NSGigE::writeConfig ( PacketPtr  pkt)
overridevirtual

This is to write to the PCI general configuration registers.

Reimplemented from gem5::PciDevice.

Definition at line 151 of file ns_gige.cc.

References gem5::PciDevice::config, gem5::PciDevice::configDelay, gem5::Packet::getAddr(), ioEnable, gem5::ArmISA::offset, panic, PCI_CMD_IOSE, PCI_COMMAND, PCI_CONFIG_SIZE, PCI_DEVICE_SPECIFIC, and gem5::PciDevice::writeConfig().

Referenced by write().

Member Data Documentation

◆ acceptArp

bool gem5::NSGigE::acceptArp
protected

Definition at line 313 of file ns_gige.hh.

Referenced by regsReset(), rxFilter(), serialize(), unserialize(), and write().

◆ acceptBroadcast

bool gem5::NSGigE::acceptBroadcast
protected

Definition at line 309 of file ns_gige.hh.

Referenced by regsReset(), rxFilter(), serialize(), unserialize(), and write().

◆ acceptMulticast

bool gem5::NSGigE::acceptMulticast
protected

Definition at line 310 of file ns_gige.hh.

Referenced by regsReset(), rxFilter(), serialize(), unserialize(), and write().

◆ acceptPerfect

bool gem5::NSGigE::acceptPerfect
protected

Definition at line 312 of file ns_gige.hh.

Referenced by regsReset(), rxFilter(), serialize(), unserialize(), and write().

◆ acceptUnicast

bool gem5::NSGigE::acceptUnicast
protected

Definition at line 311 of file ns_gige.hh.

Referenced by regsReset(), rxFilter(), serialize(), unserialize(), and write().

◆ cpuPendingIntr

bool gem5::NSGigE::cpuPendingIntr
protected

Definition at line 325 of file ns_gige.hh.

Referenced by cpuInterrupt(), cpuIntrClear(), cpuIntrPending(), serialize(), and unserialize().

◆ CRDD

bool gem5::NSGigE::CRDD
protected

Current Receive Descriptor Done.

Definition at line 216 of file ns_gige.hh.

Referenced by rxKick(), rxReset(), serialize(), unserialize(), and write().

◆ CTDD

bool gem5::NSGigE::CTDD
protected

Current Transmit Descriptor Done.

Definition at line 202 of file ns_gige.hh.

Referenced by serialize(), txKick(), txReset(), unserialize(), and write().

◆ dmaDataFree

bool gem5::NSGigE::dmaDataFree
protected

Definition at line 269 of file ns_gige.hh.

Referenced by rxKick(), and txKick().

◆ dmaDescFree

bool gem5::NSGigE::dmaDescFree
protected

Definition at line 268 of file ns_gige.hh.

Referenced by rxKick(), and txKick().

◆ dmaReadDelay

Tick gem5::NSGigE::dmaReadDelay
protected

Definition at line 238 of file ns_gige.hh.

◆ dmaReadFactor

Tick gem5::NSGigE::dmaReadFactor
protected

Definition at line 241 of file ns_gige.hh.

◆ dmaWriteDelay

Tick gem5::NSGigE::dmaWriteDelay
protected

Definition at line 239 of file ns_gige.hh.

◆ dmaWriteFactor

Tick gem5::NSGigE::dmaWriteFactor
protected

Definition at line 242 of file ns_gige.hh.

◆ eepromAddress

uint8_t gem5::NSGigE::eepromAddress
protected

Definition at line 234 of file ns_gige.hh.

Referenced by eepromKick(), serialize(), and unserialize().

◆ eepromBitsToRx

uint8_t gem5::NSGigE::eepromBitsToRx
protected

Definition at line 232 of file ns_gige.hh.

Referenced by eepromKick(), serialize(), and unserialize().

◆ eepromClk

bool gem5::NSGigE::eepromClk
protected

Definition at line 231 of file ns_gige.hh.

Referenced by serialize(), unserialize(), and write().

◆ eepromData

uint16_t gem5::NSGigE::eepromData
protected

Definition at line 235 of file ns_gige.hh.

Referenced by eepromKick(), serialize(), and unserialize().

◆ eepromOpcode

uint8_t gem5::NSGigE::eepromOpcode
protected

Definition at line 233 of file ns_gige.hh.

Referenced by eepromKick(), serialize(), and unserialize().

◆ eepromState

EEPROMState gem5::NSGigE::eepromState
protected

EEPROM State Machine.

Definition at line 230 of file ns_gige.hh.

Referenced by eepromKick(), serialize(), unserialize(), and write().

◆ extstsEnable

bool gem5::NSGigE::extstsEnable
protected

Definition at line 227 of file ns_gige.hh.

Referenced by regsReset(), rxKick(), serialize(), txKick(), unserialize(), and write().

◆ interface

NSGigEInt* gem5::NSGigE::interface
protected

Definition at line 331 of file ns_gige.hh.

Referenced by getPort(), transmit(), and ~NSGigE().

◆ intrDelay

Tick gem5::NSGigE::intrDelay
protected

Definition at line 323 of file ns_gige.hh.

Referenced by devIntrPost().

◆ intrEvent

EventFunctionWrapper* gem5::NSGigE::intrEvent
protected

Definition at line 330 of file ns_gige.hh.

Referenced by cpuInterrupt(), cpuIntrClear(), cpuIntrPost(), serialize(), and unserialize().

◆ intrTick

Tick gem5::NSGigE::intrTick
protected

Definition at line 324 of file ns_gige.hh.

Referenced by cpuInterrupt(), cpuIntrClear(), cpuIntrPost(), serialize(), and unserialize().

◆ ioEnable

bool gem5::NSGigE::ioEnable
protected

pci settings

Definition at line 174 of file ns_gige.hh.

Referenced by read(), serialize(), unserialize(), write(), and writeConfig().

◆ multicastHashEnable

bool gem5::NSGigE::multicastHashEnable
protected

Definition at line 314 of file ns_gige.hh.

Referenced by rxFilter(), serialize(), unserialize(), and write().

◆ regs

dp_regs gem5::NSGigE::regs
protected

device register file

Definition at line 170 of file ns_gige.hh.

Referenced by devIntrChangeMask(), devIntrClear(), devIntrPost(), eepromKick(), read(), regsReset(), rxKick(), serialize(), txKick(), unserialize(), and write().

◆ rom

dp_rom gem5::NSGigE::rom
protected

Definition at line 171 of file ns_gige.hh.

Referenced by eepromKick(), read(), rxFilter(), serialize(), unserialize(), and write().

◆ rxDelay

Tick gem5::NSGigE::rxDelay
protected

Definition at line 273 of file ns_gige.hh.

◆ rxDesc32

ns_desc32 gem5::NSGigE::rxDesc32
protected

Definition at line 193 of file ns_gige.hh.

Referenced by rxKick(), serialize(), and unserialize().

◆ rxDesc64

ns_desc64 gem5::NSGigE::rxDesc64
protected

Definition at line 195 of file ns_gige.hh.

Referenced by rxKick(), serialize(), and unserialize().

◆ rxDescCnt

uint32_t gem5::NSGigE::rxDescCnt
protected

count of bytes remaining in the current descriptor

Definition at line 224 of file ns_gige.hh.

Referenced by rxKick(), rxReset(), serialize(), and unserialize().

◆ rxDmaAddr

Addr gem5::NSGigE::rxDmaAddr
protected

Definition at line 245 of file ns_gige.hh.

Referenced by doRxDmaRead(), doRxDmaWrite(), rxDmaReadDone(), rxDmaWriteDone(), and rxKick().

◆ rxDmaData

void* gem5::NSGigE::rxDmaData
protected

Definition at line 244 of file ns_gige.hh.

Referenced by doRxDmaRead(), doRxDmaWrite(), rxDmaReadDone(), rxDmaWriteDone(), and rxKick().

◆ rxDmaFree

bool gem5::NSGigE::rxDmaFree
protected

Definition at line 188 of file ns_gige.hh.

Referenced by rxKick().

◆ rxDmaLen

int gem5::NSGigE::rxDmaLen
protected

Definition at line 246 of file ns_gige.hh.

Referenced by doRxDmaRead(), doRxDmaWrite(), rxDmaReadDone(), rxDmaWriteDone(), and rxKick().

◆ rxDmaReadEvent

EventFunctionWrapper gem5::NSGigE::rxDmaReadEvent
protected

Definition at line 257 of file ns_gige.hh.

Referenced by doRxDmaRead().

◆ rxDmaState

DmaState gem5::NSGigE::rxDmaState
protected

◆ rxDmaWriteEvent

EventFunctionWrapper gem5::NSGigE::rxDmaWriteEvent
protected

Definition at line 260 of file ns_gige.hh.

Referenced by doRxDmaWrite().

◆ rxEnable

bool gem5::NSGigE::rxEnable
protected

Definition at line 213 of file ns_gige.hh.

Referenced by recvPacket(), rxKick(), rxReset(), serialize(), unserialize(), and write().

◆ rxFifo

PacketFifo gem5::NSGigE::rxFifo
protected

Definition at line 179 of file ns_gige.hh.

Referenced by recvPacket(), rxKick(), rxReset(), serialize(), and unserialize().

◆ rxFilterEnable

bool gem5::NSGigE::rxFilterEnable
protected

receive address filter

Definition at line 307 of file ns_gige.hh.

Referenced by recvPacket(), serialize(), unserialize(), and write().

◆ rxFragPtr

Addr gem5::NSGigE::rxFragPtr
protected

ptr to the next byte in current fragment

Definition at line 222 of file ns_gige.hh.

Referenced by rxKick(), rxReset(), serialize(), and unserialize().

◆ rxHalt

bool gem5::NSGigE::rxHalt
protected

halt the rx state machine after current packet

Definition at line 220 of file ns_gige.hh.

◆ rxKickEvent

EventFunctionWrapper gem5::NSGigE::rxKickEvent
protected

Definition at line 281 of file ns_gige.hh.

Referenced by rxKick(), and unserialize().

◆ rxKickTick

Tick gem5::NSGigE::rxKickTick
protected

Definition at line 280 of file ns_gige.hh.

Referenced by rxKick(), serialize(), and unserialize().

◆ rxPacket

EthPacketPtr gem5::NSGigE::rxPacket
protected

Definition at line 183 of file ns_gige.hh.

Referenced by rxKick(), serialize(), and unserialize().

◆ rxPacketBufPtr

uint8_t* gem5::NSGigE::rxPacketBufPtr
protected

Definition at line 185 of file ns_gige.hh.

Referenced by rxKick(), serialize(), and unserialize().

◆ rxPktBytes

uint32_t gem5::NSGigE::rxPktBytes
protected

num of bytes in the current packet being drained from rxDataFifo

Definition at line 218 of file ns_gige.hh.

Referenced by rxKick(), rxReset(), serialize(), and unserialize().

◆ rxState

RxState gem5::NSGigE::rxState
protected

rx State Machine

Definition at line 212 of file ns_gige.hh.

Referenced by rxKick(), rxReset(), serialize(), unserialize(), and write().

◆ rxXferLen

uint32_t gem5::NSGigE::rxXferLen
protected

Definition at line 187 of file ns_gige.hh.

Referenced by rxKick(), serialize(), and unserialize().

◆ txDelay

Tick gem5::NSGigE::txDelay
protected

Definition at line 272 of file ns_gige.hh.

◆ txDesc32

ns_desc32 gem5::NSGigE::txDesc32
protected

DescCaches.

Definition at line 192 of file ns_gige.hh.

Referenced by serialize(), txKick(), and unserialize().

◆ txDesc64

ns_desc64 gem5::NSGigE::txDesc64
protected

Definition at line 194 of file ns_gige.hh.

Referenced by serialize(), txKick(), and unserialize().

◆ txDescCnt

uint32_t gem5::NSGigE::txDescCnt
protected

count of bytes remaining in the current descriptor

Definition at line 208 of file ns_gige.hh.

Referenced by serialize(), txKick(), txReset(), and unserialize().

◆ txDmaAddr

Addr gem5::NSGigE::txDmaAddr
protected

Definition at line 251 of file ns_gige.hh.

Referenced by doTxDmaRead(), doTxDmaWrite(), txDmaReadDone(), txDmaWriteDone(), and txKick().

◆ txDmaData

void* gem5::NSGigE::txDmaData
protected

Definition at line 250 of file ns_gige.hh.

Referenced by doTxDmaRead(), doTxDmaWrite(), txDmaReadDone(), txDmaWriteDone(), and txKick().

◆ txDmaFree

bool gem5::NSGigE::txDmaFree
protected

Definition at line 189 of file ns_gige.hh.

Referenced by txKick().

◆ txDmaLen

int gem5::NSGigE::txDmaLen
protected

Definition at line 252 of file ns_gige.hh.

Referenced by doTxDmaRead(), doTxDmaWrite(), txDmaReadDone(), txDmaWriteDone(), and txKick().

◆ txDmaReadEvent

EventFunctionWrapper gem5::NSGigE::txDmaReadEvent
protected

Definition at line 263 of file ns_gige.hh.

Referenced by doTxDmaRead().

◆ txDmaState

DmaState gem5::NSGigE::txDmaState
protected

◆ txDmaWriteEvent

EventFunctionWrapper gem5::NSGigE::txDmaWriteEvent
protected

Definition at line 266 of file ns_gige.hh.

Referenced by doTxDmaWrite().

◆ txEnable

bool gem5::NSGigE::txEnable
protected

Definition at line 199 of file ns_gige.hh.

Referenced by serialize(), txKick(), txReset(), unserialize(), and write().

◆ txEvent

EventFunctionWrapper gem5::NSGigE::txEvent
protected

Definition at line 299 of file ns_gige.hh.

Referenced by serialize(), transferDone(), transmit(), and unserialize().

◆ txFifo

PacketFifo gem5::NSGigE::txFifo
protected

Definition at line 178 of file ns_gige.hh.

Referenced by serialize(), transferDone(), transmit(), txKick(), txReset(), and unserialize().

◆ txFragPtr

Addr gem5::NSGigE::txFragPtr
protected

ptr to the next byte in the current fragment

Definition at line 206 of file ns_gige.hh.

Referenced by serialize(), txKick(), txReset(), and unserialize().

◆ txHalt

bool gem5::NSGigE::txHalt
protected

halt the tx state machine after next packet

Definition at line 204 of file ns_gige.hh.

◆ txKickEvent

EventFunctionWrapper gem5::NSGigE::txKickEvent
protected

Definition at line 285 of file ns_gige.hh.

Referenced by txKick(), and unserialize().

◆ txKickTick

Tick gem5::NSGigE::txKickTick
protected

Definition at line 284 of file ns_gige.hh.

Referenced by serialize(), txKick(), and unserialize().

◆ txPacket

EthPacketPtr gem5::NSGigE::txPacket
protected

various helper vars

Definition at line 182 of file ns_gige.hh.

Referenced by serialize(), txKick(), and unserialize().

◆ txPacketBufPtr

uint8_t* gem5::NSGigE::txPacketBufPtr
protected

Definition at line 184 of file ns_gige.hh.

Referenced by serialize(), txKick(), and unserialize().

◆ txState

TxState gem5::NSGigE::txState
protected

Definition at line 198 of file ns_gige.hh.

Referenced by serialize(), txEventTransmit(), txKick(), txReset(), unserialize(), and write().

◆ txXferLen

uint32_t gem5::NSGigE::txXferLen
protected

Definition at line 186 of file ns_gige.hh.

Referenced by serialize(), txKick(), and unserialize().


The documentation for this class was generated from the following files:

Generated on Tue Sep 21 2021 12:27:49 for gem5 by doxygen 1.8.17