43#include "config/have_protobuf.hh"
55#include "debug/Checkpoint.hh"
56#include "debug/TrafficGen.hh"
57#include "enums/AddrMap.hh"
58#include "params/BaseTrafficGen.hh"
73 elasticReq(
p.elastic_req),
74 progressCheck(
p.progress_check),
76 nextTransitionTick(0),
78 maxOutstandingReqs(
p.max_outstanding_reqs),
79 port(
name() +
".port", *
this),
81 retryPktTick(0), blockedWaitingResp(
false),
82 updateEvent([
this]{ update(); },
name()),
84 requestorId(
system->getRequestorId(
this)),
96 if (if_name ==
"port") {
109 fatal(
"The port of %s is not connected!\n",
name());
134 warn(
"%s serialization does not keep all traffic generator"
135 " internal state\n",
name());
137 DPRINTF(Checkpoint,
"Serializing BaseTrafficGen\n");
154 warn(
"%s serialization does not restore all traffic generator"
155 " internal state\n",
name());
189 pkt->
req->setStreamId(sid);
192 pkt->
req->setSubstreamId(ssid);
212 warn(
"%s suppressed %d packets with non-memory addresses\n",
239 if (duration !=
MaxTick && duration != 0) {
331 fatal(
"BaseTrafficGen %s spent %llu ticks without making progress",
336 : statistics::
Group(parent),
337 ADD_STAT(numSuppressed, statistics::units::Count::get(),
338 "Number of suppressed packets to non-memory space"),
339 ADD_STAT(numPackets, statistics::units::Count::get(),
340 "Number of packets generated"),
341 ADD_STAT(numRetries, statistics::units::Count::get(),
"Number of retries"),
343 "Time spent waiting due to back-pressure"),
344 ADD_STAT(bytesRead, statistics::units::Byte::get(),
"Number of bytes read"),
345 ADD_STAT(bytesWritten, statistics::units::Byte::get(),
346 "Number of bytes written"),
347 ADD_STAT(totalReadLatency, statistics::units::
Tick::get(),
348 "Total latency of read requests"),
349 ADD_STAT(totalWriteLatency, statistics::units::
Tick::get(),
350 "Total latency of write requests"),
351 ADD_STAT(totalReads, statistics::units::Count::get(),
"Total num of reads"),
352 ADD_STAT(totalWrites, statistics::units::Count::get(),
"Total num of writes"),
353 ADD_STAT(avgReadLatency, statistics::units::Rate<
354 statistics::units::
Tick, statistics::units::Count>::get(),
355 "Avg latency of read requests", totalReadLatency / totalReads),
356 ADD_STAT(avgWriteLatency, statistics::units::Rate<
357 statistics::units::
Tick, statistics::units::Count>::get(),
358 "Avg latency of write requests",
359 totalWriteLatency / totalWrites),
360 ADD_STAT(readBW, statistics::units::Rate<
361 statistics::units::Byte, statistics::units::Second>::get(),
363 ADD_STAT(writeBW, statistics::units::Rate<
364 statistics::units::Byte, statistics::units::Second>::get(),
369std::shared_ptr<BaseGen>
376std::shared_ptr<BaseGen>
383std::shared_ptr<BaseGen>
387 uint8_t read_percent,
Addr data_limit)
390 duration, start_addr,
393 min_period, max_period,
394 read_percent, data_limit));
397std::shared_ptr<BaseGen>
401 uint8_t read_percent,
Addr data_limit)
404 duration, start_addr,
407 min_period, max_period,
408 read_percent, data_limit));
411std::shared_ptr<BaseGen>
415 uint8_t read_percent,
Addr data_limit,
416 unsigned int num_seq_pkts,
unsigned int page_size,
417 unsigned int nbr_of_banks,
418 unsigned int nbr_of_banks_util,
419 enums::AddrMap addr_mapping,
420 unsigned int nbr_of_ranks)
423 duration, start_addr,
426 min_period, max_period,
427 read_percent, data_limit,
428 num_seq_pkts, page_size,
435std::shared_ptr<BaseGen>
439 uint8_t read_percent,
Addr data_limit,
440 unsigned int num_seq_pkts,
441 unsigned int page_size,
442 unsigned int nbr_of_banks,
443 unsigned int nbr_of_banks_util,
444 enums::AddrMap addr_mapping,
445 unsigned int nbr_of_ranks,
446 unsigned int max_seq_count_per_rank)
449 duration, start_addr,
452 min_period, max_period,
453 read_percent, data_limit,
454 num_seq_pkts, page_size,
459 max_seq_count_per_rank));
462std::shared_ptr<BaseGen>
464 Addr start_addr_dram,
Addr end_addr_dram,
466 Addr start_addr_nvm,
Addr end_addr_nvm,
469 uint8_t read_percent,
Addr data_limit,
470 unsigned int num_seq_pkts_dram,
471 unsigned int page_size_dram,
472 unsigned int nbr_of_banks_dram,
473 unsigned int nbr_of_banks_util_dram,
474 unsigned int num_seq_pkts_nvm,
475 unsigned int buffer_size_nvm,
476 unsigned int nbr_of_banks_nvm,
477 unsigned int nbr_of_banks_util_nvm,
478 enums::AddrMap addr_mapping,
479 unsigned int nbr_of_ranks_dram,
480 unsigned int nbr_of_ranks_nvm,
484 duration, start_addr_dram,
485 end_addr_dram, blocksize_dram,
487 end_addr_nvm, blocksize_nvm,
489 min_period, max_period,
490 read_percent, data_limit,
494 nbr_of_banks_util_dram,
498 nbr_of_banks_util_nvm,
505std::shared_ptr<BaseGen>
509 uint8_t read_percent,
Addr data_limit,
510 unsigned int num_seq_pkts,
unsigned int buffer_size,
511 unsigned int nbr_of_banks,
512 unsigned int nbr_of_banks_util,
513 enums::AddrMap addr_mapping,
514 unsigned int nbr_of_ranks)
517 duration, start_addr,
520 min_period, max_period,
521 read_percent, data_limit,
522 num_seq_pkts, buffer_size,
529std::shared_ptr<BaseGen>
533 Addr block_size,
Addr superblock_size,
Addr stride_size,
535 uint8_t read_percent,
Addr data_limit)
537 return std::shared_ptr<BaseGen>(
new StridedGen(
540 start_addr, end_addr,
offset,
541 block_size, superblock_size, stride_size,
542 min_period, max_period,
543 read_percent, data_limit));
546std::shared_ptr<BaseGen>
548 const std::string& trace_file,
Addr addr_offset)
551 return std::shared_ptr<BaseGen>(
554 panic(
"Can't instantiate trace generation without Protobuf support!\n");
564 "Received unexpected response [%s reqPtr=%x]\n",
567 assert(iter->second <=
curTick());
Declaration of the base generator class for all generators.
void update()
Schedules event for next update and generates a new packet or requests a new generatoir depending on ...
Tick nextPacketTick
Time of the next packet.
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
std::shared_ptr< BaseGen > createIdle(Tick duration)
std::shared_ptr< BaseGen > createLinear(Tick duration, Addr start_addr, Addr end_addr, Addr blocksize, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit)
std::shared_ptr< BaseGen > createTrace(Tick duration, const std::string &trace_file, Addr addr_offset)
std::shared_ptr< BaseGen > createHybrid(Tick duration, Addr start_addr_dram, Addr end_addr_dram, Addr blocksize_dram, Addr start_addr_nvm, Addr end_addr_nvm, Addr blocksize_nvm, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts_dram, unsigned int page_size_dram, unsigned int nbr_of_banks_dram, unsigned int nbr_of_banks_util_dram, unsigned int num_seq_pkts_nvm, unsigned int buffer_size_nvm, unsigned int nbr_of_banks_nvm, unsigned int nbr_of_banks_util_nvm, enums::AddrMap addr_mapping, unsigned int nbr_of_ranks_dram, unsigned int nbr_of_ranks_nvm, uint8_t nvm_percent)
DrainState drain() override
Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are pa...
const bool elasticReq
Determine whether to add elasticity in the request injection, thus responding to backpressure by slow...
std::unordered_map< RequestPtr, Tick > waitingResp
Reqs waiting for response.
std::shared_ptr< BaseGen > createStrided(Tick duration, Addr start_addr, Addr end_addr, Addr offset, Addr block_size, Addr superblock_size, Addr stride_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit)
void scheduleUpdate()
Schedule the update event based on nextPacketTick and nextTransitionTick.
std::shared_ptr< BaseGen > createDramRot(Tick duration, Addr start_addr, Addr end_addr, Addr blocksize, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks, unsigned int nbr_of_banks_util, enums::AddrMap addr_mapping, unsigned int nbr_of_ranks, unsigned int max_seq_count_per_rank)
void transition()
Transition to the next generator.
virtual std::shared_ptr< BaseGen > nextGenerator()=0
bool blockedWaitingResp
Set when we blocked waiting for outstanding reqs.
Tick retryPktTick
Tick when the stalled packet was meant to be sent.
void recvReqRetry()
Receive a retry from the neighbouring port and attempt to resend the waiting packet.
gem5::BaseTrafficGen::StatGroup stats
System *const system
The system used to determine which mode we are currently operating in.
std::shared_ptr< BaseGen > activeGenerator
Currently active generator.
BaseTrafficGen(const BaseTrafficGenParams &p)
Tick nextTransitionTick
Time of next transition.
TrafficGenPort port
The instance of request port used by the traffic generator.
const Tick progressCheck
Time to tolerate waiting for retries (not making progress), until we declare things broken.
bool recvTimingResp(PacketPtr pkt)
std::shared_ptr< BaseGen > createExit(Tick duration)
std::shared_ptr< BaseGen > createNvm(Tick duration, Addr start_addr, Addr end_addr, Addr blocksize, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int buffer_size, unsigned int nbr_of_banks, unsigned int nbr_of_banks_util, enums::AddrMap addr_mapping, unsigned int nbr_of_ranks)
EventFunctionWrapper noProgressEvent
Event to keep track of our progress, or lack thereof.
const RequestorID requestorId
RequestorID used in generated requests.
EventFunctionWrapper updateEvent
Event for scheduling updates.
void noProgress()
Method to inform the user we have made no progress.
std::shared_ptr< BaseGen > createDram(Tick duration, Addr start_addr, Addr end_addr, Addr blocksize, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks, unsigned int nbr_of_banks_util, enums::AddrMap addr_mapping, unsigned int nbr_of_ranks)
PacketPtr retryPkt
Packet waiting to be sent.
bool allocateWaitingRespSlot(PacketPtr pkt)
Puts this packet in the waitingResp list and returns true if we are above the maximum number of ousta...
void serialize(CheckpointOut &cp) const override
Serialize an object.
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
std::shared_ptr< BaseGen > createRandom(Tick duration, Addr start_addr, Addr end_addr, Addr blocksize, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit)
std::unique_ptr< StreamGen > streamGenerator
Stream/SubstreamID Generator.
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
DRAM specific generator is for issuing request with variable page hit length and bank utilization.
The exit generator exits from the simulation once entered.
Hybrid NVM + DRAM specific generator is for issuing request with variable buffer hit length and bank ...
The idle generator does nothing.
The linear generator generates sequential requests from a start to an end address,...
virtual std::string name() const
NVM specific generator is for issuing request with variable buffer hit length and bank utilization.
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
const std::string & cmdString() const
Return the string name of the cmd field (for debugging and tracing).
void print(std::ostream &o, int verbosity=0, const std::string &prefix="") const
RequestPtr req
A pointer to the original request.
Ports are used to interface objects to each other.
bool isConnected() const
Is this port currently connected to a peer?
The random generator is similar to the linear one, but does not generate sequential addresses.
bool sendTimingReq(PacketPtr pkt)
Attempt to send a timing request to the responder port by calling its corresponding receive function.
static StreamGen * create(const BaseTrafficGenParams &p)
Factory method for constructing a Stream generator.
The strided generator generates sequential requests from a start to an end address,...
bool isMemAddr(Addr addr) const
Check if a physical address is within a range of a memory that is part of the global address map.
Addr cacheLineSize() const
Get the cache line size of the system.
The trace replay generator reads a trace file and plays back the transactions.
The traffic generator is a module that generates stimuli for the memory system, based on a collection...
Counter value() const
Return the current value of this stat as its base type.
Declaration of the DRAM generator for issuing variable page hit length requests and bank utilisation.
Declaration of DRAM rotation generator that rotates through each rank.
Declaration of the exit generator that ends the simulation.
#define ADD_STAT(n,...)
Convenience macro to add a stat to a statistics group.
void signalDrainDone() const
Signal that an object is drained.
DrainState drainState() const
Return the current drain state of an object.
DrainState
Object drain/handover states.
@ Draining
Draining buffers pending serialization/handover.
@ Drained
Buffers drained, ready for serialization/handover.
void deschedule(Event &event)
bool scheduled() const
Determine if the current event is scheduled.
void schedule(Event &event, Tick when)
void reschedule(Event &event, Tick when, bool always=false)
Tick when() const
Get the time that the event is scheduled.
#define panic(...)
This implements a cprintf based panic() function.
#define fatal(...)
This implements a cprintf based fatal() function.
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
virtual Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
Get a port with a given name and index.
virtual void init()
init() is called after all C++ SimObjects have been created and all ports are connected.
Declaration of the NVM generator for issuing variable buffer hit length requests and bank utilisation...
Declaration of the idle generator that does nothing.
Declaration of the linear generator that generates sequential requests.
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Tick curTick()
The universal simulation clock.
std::ostream CheckpointOut
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
uint64_t Tick
Tick count type.
statistics::Formula & simSeconds
Declaration of the NVM generator for issuing variable buffer hit length requests and bank utilisation...
Declaration of the random generator that randomly selects addresses within a range.
#define UNSERIALIZE_SCALAR(scalar)
#define SERIALIZE_SCALAR(scalar)
Declaration of the Stream generator for issuing memory requests with variable/fixed stream and substr...
Declaration of the strided generator that generates sequential requests.
statistics::Scalar totalReads
Count the number reads.
statistics::Scalar numRetries
Count the number of retries.
statistics::Scalar retryTicks
Count the time incurred from back-pressure.
statistics::Scalar totalReadLatency
Total num of ticks read reqs took to complete
statistics::Scalar bytesWritten
Count the number of bytes written.
statistics::Scalar numSuppressed
Count the number of dropped requests.
statistics::Scalar bytesRead
Count the number of bytes read.
statistics::Scalar totalWrites
Count the number writes.
statistics::Scalar totalWriteLatency
Total num of ticks write reqs took to complete
StatGroup(statistics::Group *parent)
statistics::Scalar numPackets
Count the number of generated packets.
const std::string & name()
Declaration of the trace generator that reads a trace file and plays the transactions.