gem5  v22.0.0.2
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gem5::SDMAEngine Class Reference

System DMA Engine class for AMD dGPU. More...

#include <sdma_engine.hh>

Inheritance diagram for gem5::SDMAEngine:
gem5::DmaVirtDevice gem5::DmaDevice gem5::PioDevice gem5::ClockedObject gem5::SimObject gem5::Clocked gem5::EventManager gem5::Serializable gem5::Drainable gem5::statistics::Group gem5::Named

Classes

class  SDMAQueue
 

Public Member Functions

 SDMAEngine (const SDMAEngineParams &p)
 
void setGPUDevice (AMDGPUDevice *gpu_device)
 
void setId (int _id)
 
int getIHClientId ()
 Returns the client id for the Interrupt Handler. More...
 
Addr getGARTAddr (Addr addr) const
 Methods for translation. More...
 
TranslationGenPtr translate (Addr vaddr, Addr size) override
 GPUController will perform DMA operations on VAs, and because page faults are not currently supported for GPUController, we must be able to find the pages mapped for the process. More...
 
Tick write (PacketPtr pkt) override
 Inherited methods. More...
 
Tick read (PacketPtr pkt) override
 Pure virtual function that the device must implement. More...
 
AddrRangeList getAddrRanges () const override
 Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
void processGfx (Addr wptrOffset)
 Given a new write ptr offset, communicated to the GPU through a doorbell write, the SDMA engine processes the page, gfx, rlc0, or rlc1 queue. More...
 
void processPage (Addr wptrOffset)
 
void processRLC (Addr doorbellOffset, Addr wptrOffset)
 
void decodeNext (SDMAQueue *q)
 This method checks read and write pointers and starts decoding packets if the read pointer is less than the write pointer. More...
 
void decodeHeader (SDMAQueue *q, uint32_t data)
 Reads the first DW (32 bits) (i.e., header) of an SDMA packet, which encodes the opcode and sub-opcode of the packet. More...
 
void write (SDMAQueue *q, sdmaWrite *pkt)
 Methods that implement processing of SDMA packets. More...
 
void writeReadData (SDMAQueue *q, sdmaWrite *pkt, uint32_t *dmaBuffer)
 
void writeDone (SDMAQueue *q, sdmaWrite *pkt, uint32_t *dmaBuffer)
 
void copy (SDMAQueue *q, sdmaCopy *pkt)
 
void copyReadData (SDMAQueue *q, sdmaCopy *pkt, uint8_t *dmaBuffer)
 
void copyDone (SDMAQueue *q, sdmaCopy *pkt, uint8_t *dmaBuffer)
 
void indirectBuffer (SDMAQueue *q, sdmaIndirectBuffer *pkt)
 
void fence (SDMAQueue *q, sdmaFence *pkt)
 
void fenceDone (SDMAQueue *q, sdmaFence *pkt)
 
void trap (SDMAQueue *q, sdmaTrap *pkt)
 
void srbmWrite (SDMAQueue *q, sdmaSRBMWriteHeader *header, sdmaSRBMWrite *pkt)
 
void pollRegMem (SDMAQueue *q, sdmaPollRegMemHeader *header, sdmaPollRegMem *pkt)
 Implements a poll reg/mem packet that polls an SRBM register or a memory location, compares the retrieved value with a reference value and if unsuccessfull it retries indefinitely or for a limited number of times. More...
 
void pollRegMemRead (SDMAQueue *q, sdmaPollRegMemHeader *header, sdmaPollRegMem *pkt, uint32_t dma_buffer, int count)
 
bool pollRegMemFunc (uint32_t value, uint32_t reference, uint32_t func)
 
void ptePde (SDMAQueue *q, sdmaPtePde *pkt)
 
void ptePdeDone (SDMAQueue *q, sdmaPtePde *pkt, uint64_t *dmaBuffer)
 
uint64_t getGfxBase ()
 Methods for getting the values of SDMA MMIO registers. More...
 
uint64_t getGfxRptr ()
 
uint64_t getGfxDoorbell ()
 
uint64_t getGfxDoorbellOffset ()
 
uint64_t getGfxWptr ()
 
uint64_t getPageBase ()
 
uint64_t getPageRptr ()
 
uint64_t getPageDoorbell ()
 
uint64_t getPageDoorbellOffset ()
 
uint64_t getPageWptr ()
 
void writeMMIO (PacketPtr pkt, Addr mmio_offset)
 Methods for setting the values of SDMA MMIO registers. More...
 
void setGfxBaseLo (uint32_t data)
 
void setGfxBaseHi (uint32_t data)
 
void setGfxRptrLo (uint32_t data)
 
void setGfxRptrHi (uint32_t data)
 
void setGfxDoorbellLo (uint32_t data)
 
void setGfxDoorbellHi (uint32_t data)
 
void setGfxDoorbellOffsetLo (uint32_t data)
 
void setGfxDoorbellOffsetHi (uint32_t data)
 
void setGfxSize (uint64_t data)
 
void setGfxWptrLo (uint32_t data)
 
void setGfxWptrHi (uint32_t data)
 
void setPageBaseLo (uint32_t data)
 
void setPageBaseHi (uint32_t data)
 
void setPageRptrLo (uint32_t data)
 
void setPageRptrHi (uint32_t data)
 
void setPageDoorbellLo (uint32_t data)
 
void setPageDoorbellHi (uint32_t data)
 
void setPageDoorbellOffsetLo (uint32_t data)
 
void setPageDoorbellOffsetHi (uint32_t data)
 
void setPageSize (uint64_t data)
 
void setPageWptrLo (uint32_t data)
 
void setPageWptrHi (uint32_t data)
 
void registerRLCQueue (Addr doorbell, Addr rb_base)
 Methods for RLC queues. More...
 
void unregisterRLCQueue (Addr doorbell)
 
- Public Member Functions inherited from gem5::DmaVirtDevice
 DmaVirtDevice (const Params &p)
 
virtual ~DmaVirtDevice ()
 
void dmaReadVirt (Addr host_addr, unsigned size, DmaCallback *cb, void *data, Tick delay=0)
 Initiate a DMA read from virtual address host_addr. More...
 
void dmaWriteVirt (Addr host_addr, unsigned size, DmaCallback *b, void *data, Tick delay=0)
 Initiate a DMA write from virtual address host_addr. More...
 
void dmaVirt (DmaFnPtr dmaFn, Addr host_addr, unsigned size, DmaCallback *cb, void *data, Tick delay=0)
 Initiate a call to DmaDevice using DmaFnPtr do a DMA starting from virtual address host_addr for size number of bytes on the data. More...
 
- Public Member Functions inherited from gem5::DmaDevice
 DmaDevice (const Params &p)
 
virtual ~DmaDevice ()=default
 
void dmaWrite (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)
 
void dmaWrite (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)
 
void dmaRead (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)
 
void dmaRead (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)
 
bool dmaPending () const
 
void init () override
 init() is called after all C++ SimObjects have been created and all ports are connected. More...
 
unsigned int cacheBlockSize () const
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Get a port with a given name and index. More...
 
- Public Member Functions inherited from gem5::PioDevice
 PioDevice (const Params &p)
 
virtual ~PioDevice ()
 
void init () override
 init() is called after all C++ SimObjects have been created and all ports are connected. More...
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Get a port with a given name and index. More...
 
- Public Member Functions inherited from gem5::ClockedObject
 ClockedObject (const ClockedObjectParams &p)
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::SimObject
const Paramsparams () const
 
 SimObject (const Params &p)
 
virtual ~SimObject ()
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint. More...
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint. More...
 
virtual void regProbePoints ()
 Register probe points for this object. More...
 
virtual void regProbeListeners ()
 Register probe listeners for this object. More...
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object. More...
 
virtual void startup ()
 startup() is the final initialization call before simulation. More...
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining. More...
 
virtual void memWriteback ()
 Write back dirty buffers to memory using functional writes. More...
 
virtual void memInvalidate ()
 Invalidate the contents of memory buffers. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue. More...
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from gem5::Drainable
DrainState drainState () const
 Return the current drain state of an object. More...
 
virtual void notifyFork ()
 Notify a child process of a fork. More...
 
- Public Member Functions inherited from gem5::statistics::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group. More...
 
virtual ~Group ()
 
virtual void regStats ()
 Callback to set stat parameters. More...
 
virtual void resetStats ()
 Callback to reset stats. More...
 
virtual void preDumpStats ()
 Callback before stats are dumped. More...
 
void addStat (statistics::Info *info)
 Register a stat with this group. More...
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object. More...
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object. More...
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block. More...
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group. More...
 
void mergeStatGroup (Group *block)
 Merge the contents (stats & children) of a block to this block. More...
 
 Group ()=delete
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 
- Public Member Functions inherited from gem5::Clocked
void updateClockPeriod ()
 Update the tick to the current tick. More...
 
Tick clockEdge (Cycles cycles=Cycles(0)) const
 Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...
 
Cycles curCycle () const
 Determine the current cycle, corresponding to a tick aligned to a clock edge. More...
 
Tick nextCycle () const
 Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...
 
uint64_t frequency () const
 
Tick clockPeriod () const
 
double voltage () const
 
Cycles ticksToCycles (Tick t) const
 
Tick cyclesToTicks (Cycles c) const
 

Public Attributes

int cur_vmid = 0
 
- Public Attributes inherited from gem5::ClockedObject
PowerStatepowerState
 

Private Types

enum  SDMAType { SDMAGfx, SDMAPage }
 

Private Member Functions

void processRLC0 (Addr wptrOffset)
 
void processRLC1 (Addr wptrOffset)
 

Private Attributes

int id
 
SDMAQueue gfx
 Each SDMAEngine processes four queues: paging, gfx, rlc0, and rlc1, where RLC stands for Run List Controller. More...
 
SDMAQueue page
 
SDMAQueue gfxIb
 
SDMAQueue pageIb
 
SDMAQueue rlc0
 
SDMAQueue rlc0Ib
 
SDMAQueue rlc1
 
SDMAQueue rlc1Ib
 
uint64_t gfxBase
 
uint64_t gfxRptr
 
uint64_t gfxDoorbell
 
uint64_t gfxDoorbellOffset
 
uint64_t gfxWptr
 
uint64_t pageBase
 
uint64_t pageRptr
 
uint64_t pageDoorbell
 
uint64_t pageDoorbellOffset
 
uint64_t pageWptr
 
AMDGPUDevicegpuDevice
 
VegaISA::Walkerwalker
 
std::unordered_map< Addr, int > rlcMap
 

Additional Inherited Members

- Public Types inherited from gem5::DmaVirtDevice
typedef void(DmaDevice::* DmaFnPtr) (Addr, int, Event *, uint8_t *, Tick)
 
- Public Types inherited from gem5::DmaDevice
typedef DmaDeviceParams Params
 
- Public Types inherited from gem5::PioDevice
using Params = PioDeviceParams
 
- Public Types inherited from gem5::ClockedObject
using Params = ClockedObjectParams
 Parameters of ClockedObject. More...
 
- Public Types inherited from gem5::SimObject
typedef SimObjectParams Params
 
- Static Public Member Functions inherited from gem5::SimObject
static void serializeAll (const std::string &cpt_dir)
 Create a checkpoint by serializing all SimObjects in the system. More...
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it. More...
 
static void setSimObjectResolver (SimObjectResolver *resolver)
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
static SimObjectResolvergetSimObjectResolver ()
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section. More...
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it. More...
 
- Protected Member Functions inherited from gem5::Drainable
 Drainable ()
 
virtual ~Drainable ()
 
virtual void drainResume ()
 Resume execution after a successful drain. More...
 
void signalDrainDone () const
 Signal that an object is drained. More...
 
- Protected Member Functions inherited from gem5::Clocked
 Clocked (ClockDomain &clk_domain)
 Create a clocked object and set the clock domain based on the parameters. More...
 
 Clocked (Clocked &)=delete
 
Clockedoperator= (Clocked &)=delete
 
virtual ~Clocked ()
 Virtual destructor due to inheritance. More...
 
void resetClock () const
 Reset the object's clock using the current global tick value. More...
 
virtual void clockPeriodUpdated ()
 A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More...
 
- Protected Attributes inherited from gem5::DmaDevice
DmaPort dmaPort
 
- Protected Attributes inherited from gem5::PioDevice
Systemsys
 
PioPort< PioDevicepioPort
 The pioPort that handles the requests for us and provides us requests that it sees. More...
 
- Protected Attributes inherited from gem5::SimObject
const SimObjectParams & _params
 Cached copy of the object parameters. More...
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue. More...
 

Detailed Description

System DMA Engine class for AMD dGPU.

Definition at line 48 of file sdma_engine.hh.

Member Enumeration Documentation

◆ SDMAType

Enumerator
SDMAGfx 
SDMAPage 

Definition at line 50 of file sdma_engine.hh.

Constructor & Destructor Documentation

◆ SDMAEngine()

gem5::SDMAEngine::SDMAEngine ( const SDMAEngineParams &  p)

Member Function Documentation

◆ copy()

void gem5::SDMAEngine::copy ( SDMAQueue q,
sdmaCopy pkt 
)

◆ copyDone()

void gem5::SDMAEngine::copyDone ( SDMAQueue q,
sdmaCopy pkt,
uint8_t *  dmaBuffer 
)

◆ copyReadData()

void gem5::SDMAEngine::copyReadData ( SDMAQueue q,
sdmaCopy pkt,
uint8_t *  dmaBuffer 
)

◆ decodeHeader()

void gem5::SDMAEngine::decodeHeader ( SDMAQueue q,
uint32_t  data 
)

◆ decodeNext()

void gem5::SDMAEngine::decodeNext ( SDMAQueue q)

This method checks read and write pointers and starts decoding packets if the read pointer is less than the write pointer.

It also marks a queue a being currently processing, in case the doorbell is rung again, the newly enqueued packets will be decoded once the currently processing once are finished. This is achieved by calling decodeNext once an entire SDMA packet has been processed.

Definition at line 236 of file sdma_engine.cc.

References cur_vmid, decodeHeader(), gem5::DmaVirtDevice::dmaReadVirt(), DPRINTF, header, and gem5::ArmISA::q.

Referenced by copyDone(), copyReadData(), decodeHeader(), fenceDone(), indirectBuffer(), pollRegMem(), pollRegMemRead(), processGfx(), processPage(), processRLC0(), processRLC1(), ptePde(), ptePdeDone(), srbmWrite(), trap(), writeDone(), and writeReadData().

◆ fence()

void gem5::SDMAEngine::fence ( SDMAQueue q,
sdmaFence pkt 
)

◆ fenceDone()

void gem5::SDMAEngine::fenceDone ( SDMAQueue q,
sdmaFence pkt 
)

Definition at line 626 of file sdma_engine.cc.

References gem5::GEM5_PACKED::data, decodeNext(), gem5::GEM5_PACKED::dest, DPRINTF, and gem5::ArmISA::q.

Referenced by fence().

◆ getAddrRanges()

AddrRangeList gem5::SDMAEngine::getAddrRanges ( ) const
overridevirtual

Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to.

Returns
a list of non-overlapping address ranges

Implements gem5::PioDevice.

Definition at line 827 of file sdma_engine.cc.

◆ getGARTAddr()

Addr gem5::SDMAEngine::getGARTAddr ( Addr  addr) const

Methods for translation.

Definition at line 90 of file sdma_engine.cc.

References gem5::X86ISA::addr, gem5::bits(), gem5::AMDGPUDevice::getVM(), gpuDevice, and gem5::AMDGPUVM::inAGP().

Referenced by copy(), fence(), indirectBuffer(), and writeReadData().

◆ getGfxBase()

uint64_t gem5::SDMAEngine::getGfxBase ( )
inline

Methods for getting the values of SDMA MMIO registers.

Definition at line 218 of file sdma_engine.hh.

References gfxBase.

◆ getGfxDoorbell()

uint64_t gem5::SDMAEngine::getGfxDoorbell ( )
inline

Definition at line 220 of file sdma_engine.hh.

References gfxDoorbell.

Referenced by writeMMIO().

◆ getGfxDoorbellOffset()

uint64_t gem5::SDMAEngine::getGfxDoorbellOffset ( )
inline

Definition at line 221 of file sdma_engine.hh.

References gfxDoorbellOffset.

Referenced by writeMMIO().

◆ getGfxRptr()

uint64_t gem5::SDMAEngine::getGfxRptr ( )
inline

Definition at line 219 of file sdma_engine.hh.

References gfxRptr.

◆ getGfxWptr()

uint64_t gem5::SDMAEngine::getGfxWptr ( )
inline

Definition at line 222 of file sdma_engine.hh.

References gfxWptr.

◆ getIHClientId()

int gem5::SDMAEngine::getIHClientId ( )

Returns the client id for the Interrupt Handler.

Definition at line 77 of file sdma_engine.cc.

References panic, gem5::SOC15_IH_CLIENTID_SDMA0, and gem5::SOC15_IH_CLIENTID_SDMA1.

Referenced by trap().

◆ getPageBase()

uint64_t gem5::SDMAEngine::getPageBase ( )
inline

Definition at line 223 of file sdma_engine.hh.

References pageBase.

◆ getPageDoorbell()

uint64_t gem5::SDMAEngine::getPageDoorbell ( )
inline

Definition at line 225 of file sdma_engine.hh.

References pageDoorbell.

Referenced by writeMMIO().

◆ getPageDoorbellOffset()

uint64_t gem5::SDMAEngine::getPageDoorbellOffset ( )
inline

Definition at line 226 of file sdma_engine.hh.

References pageDoorbellOffset.

Referenced by writeMMIO().

◆ getPageRptr()

uint64_t gem5::SDMAEngine::getPageRptr ( )
inline

Definition at line 224 of file sdma_engine.hh.

References pageRptr.

◆ getPageWptr()

uint64_t gem5::SDMAEngine::getPageWptr ( )
inline

Definition at line 227 of file sdma_engine.hh.

References pageWptr.

◆ indirectBuffer()

void gem5::SDMAEngine::indirectBuffer ( SDMAQueue q,
sdmaIndirectBuffer pkt 
)

◆ pollRegMem()

void gem5::SDMAEngine::pollRegMem ( SDMAQueue q,
sdmaPollRegMemHeader header,
sdmaPollRegMem pkt 
)

Implements a poll reg/mem packet that polls an SRBM register or a memory location, compares the retrieved value with a reference value and if unsuccessfull it retries indefinitely or for a limited number of times.

Definition at line 684 of file sdma_engine.cc.

References gem5::GEM5_PACKED::address, decodeNext(), gem5::DmaVirtDevice::dmaReadVirt(), DPRINTF, header, gem5::GEM5_PACKED::mask, panic, gem5::GEM5_PACKED::pollInt, pollRegMemRead(), gem5::ArmISA::q, gem5::GEM5_PACKED::ref, gem5::GEM5_PACKED::retryCount, and warn_once.

Referenced by decodeHeader().

◆ pollRegMemFunc()

bool gem5::SDMAEngine::pollRegMemFunc ( uint32_t  value,
uint32_t  reference,
uint32_t  func 
)

Definition at line 752 of file sdma_engine.cc.

References panic.

Referenced by pollRegMemRead().

◆ pollRegMemRead()

void gem5::SDMAEngine::pollRegMemRead ( SDMAQueue q,
sdmaPollRegMemHeader header,
sdmaPollRegMem pkt,
uint32_t  dma_buffer,
int  count 
)

◆ processGfx()

void gem5::SDMAEngine::processGfx ( Addr  wptrOffset)

Given a new write ptr offset, communicated to the GPU through a doorbell write, the SDMA engine processes the page, gfx, rlc0, or rlc1 queue.

Definition at line 170 of file sdma_engine.cc.

References decodeNext(), gfx, gem5::SDMAEngine::SDMAQueue::processing(), and gem5::SDMAEngine::SDMAQueue::setWptr().

Referenced by gem5::AMDGPUDevice::writeDoorbell().

◆ processPage()

void gem5::SDMAEngine::processPage ( Addr  wptrOffset)

◆ processRLC()

void gem5::SDMAEngine::processRLC ( Addr  doorbellOffset,
Addr  wptrOffset 
)

Definition at line 192 of file sdma_engine.cc.

References panic, processRLC0(), processRLC1(), and rlcMap.

◆ processRLC0()

void gem5::SDMAEngine::processRLC0 ( Addr  wptrOffset)
private

◆ processRLC1()

void gem5::SDMAEngine::processRLC1 ( Addr  wptrOffset)
private

◆ ptePde()

void gem5::SDMAEngine::ptePde ( SDMAQueue q,
sdmaPtePde pkt 
)

◆ ptePdeDone()

void gem5::SDMAEngine::ptePdeDone ( SDMAQueue q,
sdmaPtePde pkt,
uint64_t *  dmaBuffer 
)

Definition at line 816 of file sdma_engine.cc.

References gem5::GEM5_PACKED::count, decodeNext(), gem5::GEM5_PACKED::dest, DPRINTF, and gem5::ArmISA::q.

Referenced by ptePde().

◆ read()

Tick gem5::SDMAEngine::read ( PacketPtr  pkt)
inlineoverridevirtual

Pure virtual function that the device must implement.

Called when a read command is recieved by the port.

Parameters
pktPacket describing this request
Returns
number of ticks it took to complete

Implements gem5::PioDevice.

Definition at line 162 of file sdma_engine.hh.

◆ registerRLCQueue()

void gem5::SDMAEngine::registerRLCQueue ( Addr  doorbell,
Addr  rb_base 
)

◆ serialize()

void gem5::SDMAEngine::serialize ( CheckpointOut cp) const
overridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters
cpCheckpoint state

Implements gem5::Serializable.

Definition at line 834 of file sdma_engine.cc.

References gem5::X86ISA::base, gfx, gfxBase, gfxDoorbell, gfxDoorbellOffset, gfxIb, gfxRptr, gfxWptr, gem5::ArmISA::i, page, pageBase, pageDoorbell, pageDoorbellOffset, pageIb, pageRptr, pageWptr, gem5::ClockedObject::serialize(), SERIALIZE_ARRAY, and SERIALIZE_SCALAR.

◆ setGfxBaseHi()

void gem5::SDMAEngine::setGfxBaseHi ( uint32_t  data)

Definition at line 1011 of file sdma_engine.cc.

References gem5::SDMAEngine::SDMAQueue::base(), data, gfx, gfxBase, and gem5::insertBits().

Referenced by writeMMIO().

◆ setGfxBaseLo()

void gem5::SDMAEngine::setGfxBaseLo ( uint32_t  data)

Definition at line 1003 of file sdma_engine.cc.

References gem5::SDMAEngine::SDMAQueue::base(), data, gfx, gfxBase, and gem5::insertBits().

Referenced by writeMMIO().

◆ setGfxDoorbellHi()

void gem5::SDMAEngine::setGfxDoorbellHi ( uint32_t  data)

Definition at line 1040 of file sdma_engine.cc.

References data, gfxDoorbell, and gem5::insertBits().

◆ setGfxDoorbellLo()

void gem5::SDMAEngine::setGfxDoorbellLo ( uint32_t  data)

Definition at line 1033 of file sdma_engine.cc.

References data, gfxDoorbell, and gem5::insertBits().

Referenced by writeMMIO().

◆ setGfxDoorbellOffsetHi()

void gem5::SDMAEngine::setGfxDoorbellOffsetHi ( uint32_t  data)

Definition at line 1054 of file sdma_engine.cc.

References data, gfxDoorbellOffset, and gem5::insertBits().

◆ setGfxDoorbellOffsetLo()

void gem5::SDMAEngine::setGfxDoorbellOffsetLo ( uint32_t  data)

Definition at line 1047 of file sdma_engine.cc.

References data, gfxDoorbellOffset, and gem5::insertBits().

Referenced by writeMMIO().

◆ setGfxRptrHi()

void gem5::SDMAEngine::setGfxRptrHi ( uint32_t  data)

Definition at line 1026 of file sdma_engine.cc.

References data, gfxRptr, and gem5::insertBits().

Referenced by writeMMIO().

◆ setGfxRptrLo()

void gem5::SDMAEngine::setGfxRptrLo ( uint32_t  data)

Definition at line 1019 of file sdma_engine.cc.

References data, gfxRptr, and gem5::insertBits().

Referenced by writeMMIO().

◆ setGfxSize()

void gem5::SDMAEngine::setGfxSize ( uint64_t  data)

Definition at line 1061 of file sdma_engine.cc.

References data, gfx, and gem5::SDMAEngine::SDMAQueue::size().

Referenced by writeMMIO().

◆ setGfxWptrHi()

void gem5::SDMAEngine::setGfxWptrHi ( uint32_t  data)

Definition at line 1074 of file sdma_engine.cc.

References data, gfxWptr, and gem5::insertBits().

Referenced by writeMMIO().

◆ setGfxWptrLo()

void gem5::SDMAEngine::setGfxWptrLo ( uint32_t  data)

Definition at line 1067 of file sdma_engine.cc.

References data, gfxWptr, and gem5::insertBits().

Referenced by writeMMIO().

◆ setGPUDevice()

void gem5::SDMAEngine::setGPUDevice ( AMDGPUDevice gpu_device)

◆ setId()

void gem5::SDMAEngine::setId ( int  _id)
inline

Definition at line 146 of file sdma_engine.hh.

Referenced by gem5::AMDGPUDevice::AMDGPUDevice().

◆ setPageBaseHi()

void gem5::SDMAEngine::setPageBaseHi ( uint32_t  data)

◆ setPageBaseLo()

void gem5::SDMAEngine::setPageBaseLo ( uint32_t  data)

Definition at line 1081 of file sdma_engine.cc.

References gem5::SDMAEngine::SDMAQueue::base(), data, gem5::insertBits(), page, and pageBase.

Referenced by writeMMIO().

◆ setPageDoorbellHi()

void gem5::SDMAEngine::setPageDoorbellHi ( uint32_t  data)

Definition at line 1118 of file sdma_engine.cc.

References data, gem5::insertBits(), and pageDoorbell.

◆ setPageDoorbellLo()

void gem5::SDMAEngine::setPageDoorbellLo ( uint32_t  data)

Definition at line 1111 of file sdma_engine.cc.

References data, gem5::insertBits(), and pageDoorbell.

Referenced by writeMMIO().

◆ setPageDoorbellOffsetHi()

void gem5::SDMAEngine::setPageDoorbellOffsetHi ( uint32_t  data)

Definition at line 1132 of file sdma_engine.cc.

References data, gem5::insertBits(), and pageDoorbellOffset.

◆ setPageDoorbellOffsetLo()

void gem5::SDMAEngine::setPageDoorbellOffsetLo ( uint32_t  data)

Definition at line 1125 of file sdma_engine.cc.

References data, gem5::insertBits(), and pageDoorbellOffset.

Referenced by writeMMIO().

◆ setPageRptrHi()

void gem5::SDMAEngine::setPageRptrHi ( uint32_t  data)

Definition at line 1104 of file sdma_engine.cc.

References data, gem5::insertBits(), and pageRptr.

Referenced by writeMMIO().

◆ setPageRptrLo()

void gem5::SDMAEngine::setPageRptrLo ( uint32_t  data)

Definition at line 1097 of file sdma_engine.cc.

References data, gem5::insertBits(), and pageRptr.

Referenced by writeMMIO().

◆ setPageSize()

void gem5::SDMAEngine::setPageSize ( uint64_t  data)

Definition at line 1139 of file sdma_engine.cc.

References data, page, and gem5::SDMAEngine::SDMAQueue::size().

Referenced by writeMMIO().

◆ setPageWptrHi()

void gem5::SDMAEngine::setPageWptrHi ( uint32_t  data)

Definition at line 1152 of file sdma_engine.cc.

References data, gem5::insertBits(), and pageWptr.

◆ setPageWptrLo()

void gem5::SDMAEngine::setPageWptrLo ( uint32_t  data)

Definition at line 1145 of file sdma_engine.cc.

References data, gem5::insertBits(), and pageWptr.

Referenced by writeMMIO().

◆ srbmWrite()

void gem5::SDMAEngine::srbmWrite ( SDMAQueue q,
sdmaSRBMWriteHeader header,
sdmaSRBMWrite pkt 
)

◆ translate()

TranslationGenPtr gem5::SDMAEngine::translate ( Addr  vaddr,
Addr  size 
)
overridevirtual

GPUController will perform DMA operations on VAs, and because page faults are not currently supported for GPUController, we must be able to find the pages mapped for the process.

Implements gem5::DmaVirtDevice.

Definition at line 105 of file sdma_engine.cc.

References gem5::AMDGPUDevice::getVM(), gpuDevice, gem5::AMDGPUVM::inAGP(), gem5::AMDGPUVM::inMMHUB(), and gem5::MipsISA::vaddr.

Referenced by copyReadData().

◆ trap()

void gem5::SDMAEngine::trap ( SDMAQueue q,
sdmaTrap pkt 
)

◆ unregisterRLCQueue()

void gem5::SDMAEngine::unregisterRLCQueue ( Addr  doorbell)

Definition at line 153 of file sdma_engine.cc.

References panic, rlc0, rlc1, rlcMap, and gem5::SDMAEngine::SDMAQueue::valid().

◆ unserialize()

void gem5::SDMAEngine::unserialize ( CheckpointIn cp)
overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters
cpCheckpoint state

Implements gem5::Serializable.

Definition at line 880 of file sdma_engine.cc.

References gem5::X86ISA::base, gfx, gfxBase, gfxDoorbell, gfxDoorbellOffset, gfxIb, gfxRptr, gfxWptr, gem5::ArmISA::i, page, pageBase, pageDoorbell, pageDoorbellOffset, pageIb, pageRptr, pageWptr, gem5::ClockedObject::unserialize(), UNSERIALIZE_ARRAY, and UNSERIALIZE_SCALAR.

◆ write() [1/2]

Tick gem5::SDMAEngine::write ( PacketPtr  pkt)
inlineoverridevirtual

Inherited methods.

Implements gem5::PioDevice.

Definition at line 161 of file sdma_engine.hh.

Referenced by decodeHeader().

◆ write() [2/2]

void gem5::SDMAEngine::write ( SDMAQueue q,
sdmaWrite pkt 
)

Methods that implement processing of SDMA packets.

Definition at line 469 of file sdma_engine.cc.

References gem5::GEM5_PACKED::count, gem5::GEM5_PACKED::dest, gem5::DmaVirtDevice::dmaReadVirt(), DPRINTF, gem5::ArmISA::q, and writeReadData().

◆ writeDone()

void gem5::SDMAEngine::writeDone ( SDMAQueue q,
sdmaWrite pkt,
uint32_t *  dmaBuffer 
)

◆ writeMMIO()

void gem5::SDMAEngine::writeMMIO ( PacketPtr  pkt,
Addr  mmio_offset 
)

◆ writeReadData()

void gem5::SDMAEngine::writeReadData ( SDMAQueue q,
sdmaWrite pkt,
uint32_t *  dmaBuffer 
)

Member Data Documentation

◆ cur_vmid

int gem5::SDMAEngine::cur_vmid = 0

Definition at line 263 of file sdma_engine.hh.

Referenced by copyReadData(), decodeNext(), processRLC0(), and processRLC1().

◆ gfx

SDMAQueue gem5::SDMAEngine::gfx
private

Each SDMAEngine processes four queues: paging, gfx, rlc0, and rlc1, where RLC stands for Run List Controller.

Each one of these can have one indirect buffer associated at any particular time. The switching order between queues is supposed to be page -> gfx -> rlc0 -> page -> gfx -> rlc1, skipping empty queues.

Definition at line 117 of file sdma_engine.hh.

Referenced by processGfx(), SDMAEngine(), serialize(), setGfxBaseHi(), setGfxBaseLo(), setGfxSize(), and unserialize().

◆ gfxBase

uint64_t gem5::SDMAEngine::gfxBase
private

Definition at line 121 of file sdma_engine.hh.

Referenced by getGfxBase(), serialize(), setGfxBaseHi(), setGfxBaseLo(), and unserialize().

◆ gfxDoorbell

uint64_t gem5::SDMAEngine::gfxDoorbell
private

◆ gfxDoorbellOffset

uint64_t gem5::SDMAEngine::gfxDoorbellOffset
private

◆ gfxIb

SDMAQueue gem5::SDMAEngine::gfxIb
private

Definition at line 117 of file sdma_engine.hh.

Referenced by SDMAEngine(), serialize(), and unserialize().

◆ gfxRptr

uint64_t gem5::SDMAEngine::gfxRptr
private

Definition at line 122 of file sdma_engine.hh.

Referenced by getGfxRptr(), serialize(), setGfxRptrHi(), setGfxRptrLo(), and unserialize().

◆ gfxWptr

uint64_t gem5::SDMAEngine::gfxWptr
private

Definition at line 125 of file sdma_engine.hh.

Referenced by getGfxWptr(), serialize(), setGfxWptrHi(), setGfxWptrLo(), and unserialize().

◆ gpuDevice

AMDGPUDevice* gem5::SDMAEngine::gpuDevice
private

◆ id

int gem5::SDMAEngine::id
private

Definition at line 109 of file sdma_engine.hh.

◆ page

SDMAQueue gem5::SDMAEngine::page
private

◆ pageBase

uint64_t gem5::SDMAEngine::pageBase
private

Definition at line 127 of file sdma_engine.hh.

Referenced by getPageBase(), serialize(), setPageBaseHi(), setPageBaseLo(), and unserialize().

◆ pageDoorbell

uint64_t gem5::SDMAEngine::pageDoorbell
private

◆ pageDoorbellOffset

uint64_t gem5::SDMAEngine::pageDoorbellOffset
private

◆ pageIb

SDMAQueue gem5::SDMAEngine::pageIb
private

Definition at line 117 of file sdma_engine.hh.

Referenced by SDMAEngine(), serialize(), and unserialize().

◆ pageRptr

uint64_t gem5::SDMAEngine::pageRptr
private

Definition at line 128 of file sdma_engine.hh.

Referenced by getPageRptr(), serialize(), setPageRptrHi(), setPageRptrLo(), and unserialize().

◆ pageWptr

uint64_t gem5::SDMAEngine::pageWptr
private

Definition at line 131 of file sdma_engine.hh.

Referenced by getPageWptr(), serialize(), setPageWptrHi(), setPageWptrLo(), and unserialize().

◆ rlc0

SDMAQueue gem5::SDMAEngine::rlc0
private

Definition at line 118 of file sdma_engine.hh.

Referenced by processRLC0(), registerRLCQueue(), SDMAEngine(), and unregisterRLCQueue().

◆ rlc0Ib

SDMAQueue gem5::SDMAEngine::rlc0Ib
private

Definition at line 118 of file sdma_engine.hh.

Referenced by SDMAEngine().

◆ rlc1

SDMAQueue gem5::SDMAEngine::rlc1
private

Definition at line 118 of file sdma_engine.hh.

Referenced by processRLC1(), registerRLCQueue(), SDMAEngine(), and unregisterRLCQueue().

◆ rlc1Ib

SDMAQueue gem5::SDMAEngine::rlc1Ib
private

Definition at line 118 of file sdma_engine.hh.

Referenced by SDMAEngine().

◆ rlcMap

std::unordered_map<Addr, int> gem5::SDMAEngine::rlcMap
private

Definition at line 137 of file sdma_engine.hh.

Referenced by processRLC(), registerRLCQueue(), and unregisterRLCQueue().

◆ walker

VegaISA::Walker* gem5::SDMAEngine::walker
private

Definition at line 134 of file sdma_engine.hh.

Referenced by setGPUDevice().


The documentation for this class was generated from the following files:

Generated on Thu Jul 28 2022 13:33:12 for gem5 by doxygen 1.8.17