System DMA Engine class for AMD dGPU. More...

#include <sdma_engine.hh>

Inheritance diagram for gem5::SDMAEngine:

Classes
class	SDMAQueue

Public Member Functions
	SDMAEngine (const SDMAEngineParams &p)

void	setGPUDevice (AMDGPUDevice *gpu_device)

void	setId (int _id)

int	getId () const

int	getIHClientId (int _id)
	Returns the client id for the Interrupt Handler.

Addr	getGARTAddr (Addr addr) const
	Methods for translation.

TranslationGenPtr	translate (Addr vaddr, Addr size) override
	GPUController will perform DMA operations on VAs, and because page faults are not currently supported for GPUController, we must be able to find the pages mapped for the process.

Addr	getDeviceAddress (Addr raw_addr)
	Translate an address in an SDMA packet.

Tick	write (PacketPtr pkt) override
	Inherited methods.

Tick	read (PacketPtr pkt) override
	Pure virtual function that the device must implement.

AddrRangeList	getAddrRanges () const override
	Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to.

void	serialize (CheckpointOut &cp) const override
	Serialize an object.

void	unserialize (CheckpointIn &cp) override
	Unserialize an object.

void	processGfx (Addr wptrOffset)
	Given a new write ptr offset, communicated to the GPU through a doorbell write, the SDMA engine processes the page, gfx, rlc0, or rlc1 queue.

void	processPage (Addr wptrOffset)

void	processRLC (Addr doorbellOffset, Addr wptrOffset)

void	decodeNext (SDMAQueue *q)
	This method checks read and write pointers and starts decoding packets if the read pointer is less than the write pointer.

void	decodeHeader (SDMAQueue *q, uint32_t data)
	Reads the first DW (32 bits) (i.e., header) of an SDMA packet, which encodes the opcode and sub-opcode of the packet.

void	write (SDMAQueue q, sdmaWrite pkt)
	Methods that implement processing of SDMA packets.

void	writeReadData (SDMAQueue q, sdmaWrite pkt, uint32_t *dmaBuffer)

void	writeDone (SDMAQueue q, sdmaWrite pkt, uint32_t *dmaBuffer)

void	writeCleanup (uint32_t *dmaBuffer)

void	copy (SDMAQueue q, sdmaCopy pkt)

void	copyReadData (SDMAQueue q, sdmaCopy pkt, uint8_t *dmaBuffer)

void	copyDone (SDMAQueue q, sdmaCopy pkt, uint8_t *dmaBuffer)

void	copyCleanup (uint8_t *dmaBuffer)

void	indirectBuffer (SDMAQueue q, sdmaIndirectBuffer pkt)

void	fence (SDMAQueue q, sdmaFence pkt)

void	fenceDone (SDMAQueue q, sdmaFence pkt)

void	trap (SDMAQueue q, sdmaTrap pkt)

void	srbmWrite (SDMAQueue q, sdmaSRBMWriteHeader header, sdmaSRBMWrite *pkt)

void	pollRegMem (SDMAQueue q, sdmaPollRegMemHeader header, sdmaPollRegMem *pkt)
	Implements a poll reg/mem packet that polls an SRBM register or a memory location, compares the retrieved value with a reference value and if unsuccessfull it retries indefinitely or for a limited number of times.

void	pollRegMemRead (SDMAQueue q, sdmaPollRegMemHeader header, sdmaPollRegMem *pkt, uint32_t dma_buffer, int count)

bool	pollRegMemFunc (uint32_t value, uint32_t reference, uint32_t func)

void	ptePde (SDMAQueue q, sdmaPtePde pkt)

void	ptePdeDone (SDMAQueue q, sdmaPtePde pkt, uint64_t *dmaBuffer)

void	ptePdeCleanup (uint64_t *dmaBuffer)

void	atomic (SDMAQueue q, sdmaAtomicHeader header, sdmaAtomic *pkt)

void	atomicData (SDMAQueue q, sdmaAtomicHeader header, sdmaAtomic pkt, uint64_t dmaBuffer)

void	atomicDone (SDMAQueue q, sdmaAtomicHeader header, sdmaAtomic pkt, uint64_t dmaBuffer)

void	constFill (SDMAQueue q, sdmaConstFill pkt, uint32_t header)

void	constFillDone (SDMAQueue q, sdmaConstFill pkt, uint8_t *fill_data)

Addr	getMmioBase ()
	Methods for getting SDMA MMIO base address and size.

Addr	getMmioSize ()

uint64_t	getGfxBase ()
	Methods for getting the values of SDMA MMIO registers.

uint64_t	getGfxRptr ()

uint64_t	getGfxDoorbell ()

uint64_t	getGfxDoorbellOffset ()

uint64_t	getGfxWptr ()

uint64_t	getPageBase ()

uint64_t	getPageRptr ()

uint64_t	getPageDoorbell ()

uint64_t	getPageDoorbellOffset ()

uint64_t	getPageWptr ()

void	writeMMIO (PacketPtr pkt, Addr mmio_offset)
	Methods for setting the values of SDMA MMIO registers.

void	setGfxBaseLo (uint32_t data)

void	setGfxBaseHi (uint32_t data)

void	setGfxRptrLo (uint32_t data)

void	setGfxRptrHi (uint32_t data)

void	setGfxDoorbellLo (uint32_t data)

void	setGfxDoorbellHi (uint32_t data)

void	setGfxDoorbellOffsetLo (uint32_t data)

void	setGfxDoorbellOffsetHi (uint32_t data)

void	setGfxSize (uint32_t data)

void	setGfxWptrLo (uint32_t data)

void	setGfxWptrHi (uint32_t data)

void	setPageBaseLo (uint32_t data)

void	setPageBaseHi (uint32_t data)

void	setPageRptrLo (uint32_t data)

void	setPageRptrHi (uint32_t data)

void	setPageDoorbellLo (uint32_t data)

void	setPageDoorbellHi (uint32_t data)

void	setPageDoorbellOffsetLo (uint32_t data)

void	setPageDoorbellOffsetHi (uint32_t data)

void	setPageSize (uint32_t data)

void	setPageWptrLo (uint32_t data)

void	setPageWptrHi (uint32_t data)

void	registerRLCQueue (Addr doorbell, Addr mqdAddr, SDMAQueueDesc *mqd, bool isStatic)
	Methods for RLC queues.

void	unregisterRLCQueue (Addr doorbell, bool unmap_static)

void	deallocateRLCQueues (bool unmap_static)

Public Member Functions inherited from gem5::DmaVirtDevice
	DmaVirtDevice (const Params &p)

virtual	~DmaVirtDevice ()

void	dmaReadVirt (Addr host_addr, unsigned size, DmaCallback cb, void data, Tick delay=0)
	Initiate a DMA read from virtual address host_addr.

void	dmaWriteVirt (Addr host_addr, unsigned size, DmaCallback b, void data, Tick delay=0)
	Initiate a DMA write from virtual address host_addr.

void	dmaVirt (DmaFnPtr dmaFn, Addr host_addr, unsigned size, DmaCallback cb, void data, Tick delay=0)
	Initiate a call to DmaDevice using DmaFnPtr do a DMA starting from virtual address host_addr for size number of bytes on the data.

Public Member Functions inherited from gem5::DmaDevice
	DmaDevice (const Params &p)

virtual	~DmaDevice ()=default

void	dmaWrite (Addr addr, int size, Event event, uint8_t data, uint32_t sid, uint32_t ssid, Tick delay=0)

void	dmaWrite (Addr addr, int size, Event event, uint8_t data, Tick delay=0)

void	dmaRead (Addr addr, int size, Event event, uint8_t data, uint32_t sid, uint32_t ssid, Tick delay=0)

void	dmaRead (Addr addr, int size, Event event, uint8_t data, Tick delay=0)

bool	dmaPending () const

void	init () override
	init() is called after all C++ SimObjects have been created and all ports are connected.

Addr	cacheBlockSize () const

Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	Get a port with a given name and index.

Public Member Functions inherited from gem5::PioDevice
	PioDevice (const Params &p)

virtual	~PioDevice ()

void	init () override
	init() is called after all C++ SimObjects have been created and all ports are connected.

Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	Get a port with a given name and index.

Public Member Functions inherited from gem5::ClockedObject
	ClockedObject (const ClockedObjectParams &p)

Public Member Functions inherited from gem5::SimObject
const Params &	params () const

	SimObject (const Params &p)

virtual	~SimObject ()

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint.

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint.

virtual void	regProbePoints ()
	Register probe points for this object.

virtual void	regProbeListeners ()
	Register probe listeners for this object.

ProbeManager *	getProbeManager ()
	Get the probe manager for this object.

virtual void	startup ()
	startup() is the final initialization call before simulation.

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining.

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes.

virtual void	memInvalidate ()
	Invalidate the contents of memory buffers.

void	serialize (CheckpointOut &cp) const override
	Serialize an object.

void	unserialize (CheckpointIn &cp) override
	Unserialize an object.

Public Member Functions inherited from gem5::EventManager
EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers.

void	setCurTick (Tick newVal)

	EventManager (EventManager &em)
	Event manger manages events in the event queue.

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

Public Member Functions inherited from gem5::Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section.

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object.

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from gem5::Drainable
DrainState	drainState () const
	Return the current drain state of an object.

virtual void	notifyFork ()
	Notify a child process of a fork.

Public Member Functions inherited from gem5::statistics::Group
	Group (Group parent, const char name=nullptr)
	Construct a new statistics group.

virtual	~Group ()

virtual void	regStats ()
	Callback to set stat parameters.

virtual void	resetStats ()
	Callback to reset stats.

virtual void	preDumpStats ()
	Callback before stats are dumped.

void	addStat (statistics::Info *info)
	Register a stat with this group.

const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object.

const std::vector< Info * > &	getStats () const
	Get all stats associated with this object.

void	addStatGroup (const char name, Group block)
	Add a stat block as a child of this block.

const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group.

void	mergeStatGroup (Group *block)
	Merge the contents (stats & children) of a block to this block.

	Group (const Group &)=delete

Group &	operator= (const Group &)=delete

Public Member Functions inherited from gem5::Named
	Named (const std::string &name_)

virtual	~Named ()=default

virtual std::string	name () const

Public Member Functions inherited from gem5::Clocked
void	updateClockPeriod ()
	Update the tick to the current tick.

Tick	clockEdge (Cycles cycles=Cycles(0)) const
	Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle.

Cycles	curCycle () const
	Determine the current cycle, corresponding to a tick aligned to a clock edge.

Tick	nextCycle () const
	Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future.

uint64_t	frequency () const

Tick	clockPeriod () const

double	voltage () const

Cycles	ticksToCycles (Tick t) const

Tick	cyclesToTicks (Cycles c) const

Public Attributes
int	cur_vmid = 0

Public Attributes inherited from gem5::ClockedObject
PowerState *	powerState

Private Types
enum	SDMAType { SDMAGfx , SDMAPage }

Private Member Functions
void	processRLC0 (Addr wptrOffset)

void	processRLC1 (Addr wptrOffset)

Private Attributes
int	id

SDMAQueue	gfx
	Each SDMAEngine processes four queues: paging, gfx, rlc0, and rlc1, where RLC stands for Run List Controller.

SDMAQueue	page

SDMAQueue	gfxIb

SDMAQueue	pageIb

SDMAQueue	rlc0

SDMAQueue	rlc0Ib

SDMAQueue	rlc1

SDMAQueue	rlc1Ib

uint64_t	gfxBase

uint64_t	gfxRptr

uint64_t	gfxDoorbell

uint64_t	gfxDoorbellOffset

uint64_t	gfxWptr

uint64_t	pageBase

uint64_t	pageRptr

uint64_t	pageDoorbell

uint64_t	pageDoorbellOffset

uint64_t	pageWptr

AMDGPUDevice *	gpuDevice

VegaISA::Walker *	walker

std::array< Addr, 2 >	rlcInfo {}

Addr	mmioBase = 0

Addr	mmioSize = 0

Additional Inherited Members
Public Types inherited from gem5::DmaVirtDevice
typedef void(DmaDevice::*	DmaFnPtr) (Addr, int, Event , uint8_t , Tick)

Public Types inherited from gem5::DmaDevice
typedef DmaDeviceParams	Params

Public Types inherited from gem5::PioDevice
using	Params = PioDeviceParams

Public Types inherited from gem5::ClockedObject
using	Params = ClockedObjectParams
	Parameters of ClockedObject.

Public Types inherited from gem5::SimObject
typedef SimObjectParams	Params

Static Public Member Functions inherited from gem5::SimObject
static void	serializeAll (const std::string &cpt_dir)
	Create a checkpoint by serializing all SimObjects in the system.

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it.

static void	setSimObjectResolver (SimObjectResolver *resolver)
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

static SimObjectResolver *	getSimObjectResolver ()
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints.

Static Public Member Functions inherited from gem5::Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section.

static void	generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
	Generate a checkpoint file so that the serialization can be routed to it.

Protected Member Functions inherited from gem5::Drainable
	Drainable ()

virtual	~Drainable ()

virtual void	drainResume ()
	Resume execution after a successful drain.

void	signalDrainDone () const
	Signal that an object is drained.

Protected Member Functions inherited from gem5::Clocked
	Clocked (ClockDomain &clk_domain)
	Create a clocked object and set the clock domain based on the parameters.

	Clocked (Clocked &)=delete

Clocked &	operator= (Clocked &)=delete

virtual	~Clocked ()
	Virtual destructor due to inheritance.

void	resetClock () const
	Reset the object's clock using the current global tick value.

virtual void	clockPeriodUpdated ()
	A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed.

Protected Attributes inherited from gem5::DmaDevice
DmaPort	dmaPort

Protected Attributes inherited from gem5::PioDevice
System *	sys

PioPort< PioDevice >	pioPort
	The pioPort that handles the requests for us and provides us requests that it sees.

Protected Attributes inherited from gem5::SimObject
const SimObjectParams &	_params
	Cached copy of the object parameters.

Protected Attributes inherited from gem5::EventManager
EventQueue *	eventq
	A pointer to this object's event queue.

Detailed Description

System DMA Engine class for AMD dGPU.

Definition at line 48 of file sdma_engine.hh.

Member Enumeration Documentation

◆ SDMAType

enum gem5::SDMAEngine::SDMAType

private

Enumerator
SDMAGfx
SDMAPage

Definition at line 50 of file sdma_engine.hh.

Constructor & Destructor Documentation

◆ SDMAEngine()

gem5::SDMAEngine::SDMAEngine ( const SDMAEngineParams & p )

Definition at line 49 of file sdma_engine.cc.

References gfx, gfxIb, gem5::SDMAEngine::SDMAQueue::ib(), page, pageIb, gem5::SDMAEngine::SDMAQueue::parent(), gem5::SDMAEngine::SDMAQueue::queueType(), rlc0, rlc0Ib, rlc1, rlc1Ib, SDMAGfx, SDMAPage, and gem5::SDMAEngine::SDMAQueue::valid().

Member Function Documentation

◆ atomic()

void gem5::SDMAEngine::atomic	(	SDMAQueue *	q,
		sdmaAtomicHeader *	header,
		sdmaAtomic *	pkt
	)

Definition at line 1098 of file sdma_engine.cc.

References gem5::GEM5_PACKED::addr, atomicData(), gem5::GEM5_PACKED::cmpData, gem5::DmaVirtDevice::dmaReadVirt(), DPRINTF, header, gem5::GEM5_PACKED::loopInt, gem5::ArmISA::q, and gem5::GEM5_PACKED::srcData.

◆ atomicData()

void gem5::SDMAEngine::atomicData	(	SDMAQueue *	q,
		sdmaAtomicHeader *	header,
		sdmaAtomic *	pkt,
		uint64_t *	dmaBuffer
	)

Definition at line 1114 of file sdma_engine.cc.

References gem5::GEM5_PACKED::addr, atomicDone(), gem5::DmaVirtDevice::dmaWriteVirt(), DPRINTF, header, panic, gem5::ArmISA::q, gem5::SDMA_ATOMIC_ADD64, and gem5::GEM5_PACKED::srcData.

Referenced by atomic().

◆ atomicDone()

void gem5::SDMAEngine::atomicDone	(	SDMAQueue *	q,
		sdmaAtomicHeader *	header,
		sdmaAtomic *	pkt,
		uint64_t *	dmaBuffer
	)

Definition at line 1141 of file sdma_engine.cc.

References gem5::GEM5_PACKED::addr, decodeNext(), DPRINTF, header, and gem5::ArmISA::q.

Referenced by atomicData().

◆ constFill()

void gem5::SDMAEngine::constFill	(	SDMAQueue *	q,
		sdmaConstFill *	pkt,
		uint32_t	header
	)

Definition at line 1154 of file sdma_engine.cc.

References gem5::GEM5_PACKED::addr, AMDGPU_MMHUB_PAGE_SIZE, constFillDone(), gem5::GEM5_PACKED::count, gem5::DmaVirtDevice::dmaWriteVirt(), DPRINTF, gem5::GEM5_PACKED::fillsize, getDeviceAddress(), gem5::AMDGPUDevice::getMemMgr(), gpuDevice, header, name(), gem5::GEM5_PACKED::ordinal, gem5::ArmISA::q, gem5::GEM5_PACKED::srcData, gem5::GEM5_PACKED::sw, and gem5::AMDGPUMemoryManager::writeRequest().

Referenced by decodeHeader().

◆ constFillDone()

void gem5::SDMAEngine::constFillDone	(	SDMAQueue *	q,
		sdmaConstFill *	pkt,
		uint8_t *	fill_data
	)

Definition at line 1207 of file sdma_engine.cc.

References gem5::GEM5_PACKED::addr, decodeNext(), DPRINTF, and gem5::ArmISA::q.

Referenced by constFill().

◆ copy()

void gem5::SDMAEngine::copy	(	SDMAQueue *	q,
		sdmaCopy *	pkt
	)

Definition at line 696 of file sdma_engine.cc.

References AMDGPU_MMHUB_PAGE_SIZE, copyReadData(), gem5::GEM5_PACKED::count, gem5::GEM5_PACKED::dest, gem5::DmaVirtDevice::dmaReadVirt(), DPRINTF, getDeviceAddress(), getGARTAddr(), gem5::AMDGPUDevice::getMemMgr(), gem5::AMDGPUDevice::getVM(), gpuDevice, gem5::AMDGPUVM::inMMHUB(), name(), gem5::ArmISA::q, gem5::AMDGPUMemoryManager::readRequest(), and gem5::GEM5_PACKED::source.

Referenced by decodeHeader().

◆ copyCleanup()

void gem5::SDMAEngine::copyCleanup ( uint8_t * dmaBuffer )

Definition at line 827 of file sdma_engine.cc.

Referenced by copyDone().

◆ copyDone()

void gem5::SDMAEngine::copyDone	(	SDMAQueue *	q,
		sdmaCopy *	pkt,
		uint8_t *	dmaBuffer
	)

Definition at line 805 of file sdma_engine.cc.

References copyCleanup(), gem5::GEM5_PACKED::count, gem5::AMDGPUDevice::CP(), gem5::curTick(), decodeNext(), gem5::GEM5_PACKED::dest, DPRINTF, gpuDevice, name(), gem5::ArmISA::q, gem5::EventManager::schedule(), gem5::GPUCommandProcessor::system(), and warn_once.

Referenced by copyReadData().

◆ copyReadData()

void gem5::SDMAEngine::copyReadData	(	SDMAQueue *	q,
		sdmaCopy *	pkt,
		uint8_t *	dmaBuffer
	)

◆ deallocateRLCQueues()

void gem5::SDMAEngine::deallocateRLCQueues ( bool unmap_static )

Definition at line 283 of file sdma_engine.cc.

References rlcInfo, and unregisterRLCQueue().

◆ decodeHeader()

void gem5::SDMAEngine::decodeHeader	(	SDMAQueue *	q,
		uint32_t	data
	)

Reads the first DW (32 bits) (i.e., header) of an SDMA packet, which encodes the opcode and sub-opcode of the packet.

It also creates an SDMA packet object and calls the associated processing function.

Definition at line 393 of file sdma_engine.cc.

References gem5::ArmISA::atomic, gem5::bits(), constFill(), copy(), decodeNext(), gem5::DmaVirtDevice::dmaReadVirt(), DPRINTF, fence(), header, gem5::ArmISA::i, indirectBuffer(), gem5::ArmISA::opcode, panic, pollRegMem(), ptePde(), gem5::ArmISA::q, SDMA_OP_ATOMIC, SDMA_OP_COND_EXE, SDMA_OP_CONST_FILL, SDMA_OP_COPY, SDMA_OP_DUMMY_TRAP, SDMA_OP_FENCE, SDMA_OP_INDIRECT, SDMA_OP_NOP, SDMA_OP_POLL_REGMEM, SDMA_OP_PRE_EXE, SDMA_OP_PTEPDE, SDMA_OP_SEM, SDMA_OP_SRBM_WRITE, SDMA_OP_TIMESTAMP, SDMA_OP_TRAP, SDMA_OP_WRITE, SDMA_SUBOP_COPY_DIRTY_PAGE, SDMA_SUBOP_COPY_LINEAR, SDMA_SUBOP_COPY_LINEAR_PHY, SDMA_SUBOP_COPY_LINEAR_SUB_WIND, SDMA_SUBOP_COPY_SOA, SDMA_SUBOP_COPY_T2T_SUB_WIND, SDMA_SUBOP_COPY_TILED, SDMA_SUBOP_COPY_TILED_SUB_WIND, SDMA_SUBOP_POLL_DBIT_WRITE_MEM, SDMA_SUBOP_POLL_MEM_VERIFY, SDMA_SUBOP_POLL_REG_WRITE_MEM, SDMA_SUBOP_PTEPDE_COPY, SDMA_SUBOP_PTEPDE_COPY_BACKWARDS, SDMA_SUBOP_PTEPDE_GEN, SDMA_SUBOP_PTEPDE_RMW, SDMA_SUBOP_TIMESTAMP_GET, SDMA_SUBOP_TIMESTAMP_GET_GLOBAL, SDMA_SUBOP_TIMESTAMP_SET, SDMA_SUBOP_WRITE_LINEAR, SDMA_SUBOP_WRITE_TILED, srbmWrite(), trap(), warn, and write().

Referenced by decodeNext().

◆ decodeNext()

void gem5::SDMAEngine::decodeNext ( SDMAQueue * q )

This method checks read and write pointers and starts decoding packets if the read pointer is less than the write pointer.

It also marks a queue a being currently processing, in case the doorbell is rung again, the newly enqueued packets will be decoded once the currently processing once are finished. This is achieved by calling decodeNext once an entire SDMA packet has been processed.

Definition at line 357 of file sdma_engine.cc.

References cur_vmid, decodeHeader(), decodeNext(), gem5::DmaVirtDevice::dmaReadVirt(), gem5::DmaVirtDevice::dmaWriteVirt(), DPRINTF, header, and gem5::ArmISA::q.

Referenced by atomicDone(), constFillDone(), copyDone(), decodeHeader(), decodeNext(), fenceDone(), indirectBuffer(), pollRegMem(), pollRegMemRead(), processGfx(), processPage(), processRLC0(), processRLC1(), ptePdeDone(), srbmWrite(), trap(), and writeDone().

◆ fence()

void gem5::SDMAEngine::fence	(	SDMAQueue *	q,
		sdmaFence *	pkt
	)

Definition at line 853 of file sdma_engine.cc.

References gem5::GEM5_PACKED::data, gem5::GEM5_PACKED::dest, gem5::DmaVirtDevice::dmaWriteVirt(), fenceDone(), getGARTAddr(), and gem5::ArmISA::q.

Referenced by decodeHeader().

◆ fenceDone()

void gem5::SDMAEngine::fenceDone	(	SDMAQueue *	q,
		sdmaFence *	pkt
	)

Definition at line 868 of file sdma_engine.cc.

References gem5::GEM5_PACKED::data, decodeNext(), gem5::GEM5_PACKED::dest, DPRINTF, and gem5::ArmISA::q.

Referenced by fence().

◆ getAddrRanges()

AddrRangeList gem5::SDMAEngine::getAddrRanges ( ) const

overridevirtual

Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to.

Returns: a list of non-overlapping address ranges

Implements gem5::PioDevice.

Definition at line 1217 of file sdma_engine.cc.

◆ getDeviceAddress()

Addr gem5::SDMAEngine::getDeviceAddress ( Addr raw_addr )

Translate an address in an SDMA packet.

Return the device address if address in the packet is on the device and 0 if the the address in the packet is on the host/system memory.

Definition at line 120 of file sdma_engine.cc.

References cur_vmid, DPRINTF, gem5::AMDGPUVM::getMMHUBBase(), gem5::AMDGPUDevice::getVM(), gpuDevice, gem5::AMDGPUVM::inMMHUB(), and translate().

Referenced by constFill(), copy(), and copyReadData().

◆ getGARTAddr()

Addr gem5::SDMAEngine::getGARTAddr ( Addr addr ) const

Methods for translation.

Definition at line 110 of file sdma_engine.cc.

References gem5::X86ISA::addr, gem5::bits(), gem5::AMDGPUDevice::getVM(), gpuDevice, and gem5::AMDGPUVM::inAGP().

Referenced by copy(), fence(), indirectBuffer(), ptePde(), setGfxRptrHi(), setGfxRptrLo(), setPageRptrHi(), setPageRptrLo(), and writeReadData().

◆ getGfxBase()

uint64_t gem5::SDMAEngine::getGfxBase ( )

inline

Methods for getting the values of SDMA MMIO registers.

Definition at line 271 of file sdma_engine.hh.

References gfxBase.

◆ getGfxDoorbell()

uint64_t gem5::SDMAEngine::getGfxDoorbell ( )

inline

Definition at line 273 of file sdma_engine.hh.

References gfxDoorbell.

Referenced by writeMMIO().

◆ getGfxDoorbellOffset()

uint64_t gem5::SDMAEngine::getGfxDoorbellOffset ( )

inline

Definition at line 274 of file sdma_engine.hh.

References gfxDoorbellOffset.

Referenced by writeMMIO().

◆ getGfxRptr()

uint64_t gem5::SDMAEngine::getGfxRptr ( )

inline

Definition at line 272 of file sdma_engine.hh.

References gfxRptr.

◆ getGfxWptr()

uint64_t gem5::SDMAEngine::getGfxWptr ( )

inline

Definition at line 275 of file sdma_engine.hh.

References gfxWptr.

◆ getId()

int gem5::SDMAEngine::getId ( ) const

inline

Definition at line 174 of file sdma_engine.hh.

References id.

Referenced by trap().

◆ getIHClientId()

int gem5::SDMAEngine::getIHClientId ( int _id )

Returns the client id for the Interrupt Handler.

Definition at line 85 of file sdma_engine.cc.

References panic, gem5::SOC15_IH_CLIENTID_SDMA0, gem5::SOC15_IH_CLIENTID_SDMA1, gem5::SOC15_IH_CLIENTID_SDMA2, gem5::SOC15_IH_CLIENTID_SDMA3, gem5::SOC15_IH_CLIENTID_SDMA4, gem5::SOC15_IH_CLIENTID_SDMA5, gem5::SOC15_IH_CLIENTID_SDMA6, and gem5::SOC15_IH_CLIENTID_SDMA7.

Referenced by trap().

◆ getMmioBase()

Addr gem5::SDMAEngine::getMmioBase ( )

inline

Methods for getting SDMA MMIO base address and size.

These are set by the python configuration depending on device to allow for flexible base addresses depending on what GPU is being simulated.

Definition at line 265 of file sdma_engine.hh.

References mmioBase.

◆ getMmioSize()

Addr gem5::SDMAEngine::getMmioSize ( )

inline

Definition at line 266 of file sdma_engine.hh.

References mmioSize.

◆ getPageBase()

uint64_t gem5::SDMAEngine::getPageBase ( )

inline

Definition at line 276 of file sdma_engine.hh.

References pageBase.

◆ getPageDoorbell()

uint64_t gem5::SDMAEngine::getPageDoorbell ( )

inline

Definition at line 278 of file sdma_engine.hh.

References pageDoorbell.

Referenced by writeMMIO().

◆ getPageDoorbellOffset()

uint64_t gem5::SDMAEngine::getPageDoorbellOffset ( )

inline

Definition at line 279 of file sdma_engine.hh.

References pageDoorbellOffset.

Referenced by writeMMIO().

◆ getPageRptr()

uint64_t gem5::SDMAEngine::getPageRptr ( )

inline

Definition at line 277 of file sdma_engine.hh.

References pageRptr.

◆ getPageWptr()

uint64_t gem5::SDMAEngine::getPageWptr ( )

inline

Definition at line 280 of file sdma_engine.hh.

References pageWptr.

◆ indirectBuffer()

void gem5::SDMAEngine::indirectBuffer	(	SDMAQueue *	q,
		sdmaIndirectBuffer *	pkt
	)

Definition at line 834 of file sdma_engine.cc.

References gem5::GEM5_PACKED::base, decodeNext(), getGARTAddr(), gem5::ArmISA::q, and gem5::GEM5_PACKED::size.

Referenced by decodeHeader().

◆ pollRegMem()

void gem5::SDMAEngine::pollRegMem	(	SDMAQueue *	q,
		sdmaPollRegMemHeader *	header,
		sdmaPollRegMem *	pkt
	)

Implements a poll reg/mem packet that polls an SRBM register or a memory location, compares the retrieved value with a reference value and if unsuccessfull it retries indefinitely or for a limited number of times.

Definition at line 930 of file sdma_engine.cc.

References gem5::GEM5_PACKED::address, decodeNext(), gem5::DmaVirtDevice::dmaReadVirt(), DPRINTF, header, gem5::GEM5_PACKED::mask, panic, gem5::GEM5_PACKED::pollInt, pollRegMemRead(), gem5::ArmISA::q, gem5::GEM5_PACKED::ref, gem5::GEM5_PACKED::retryCount, and warn_once.

Referenced by decodeHeader().

◆ pollRegMemFunc()

bool gem5::SDMAEngine::pollRegMemFunc	(	uint32_t	value,
		uint32_t	reference,
		uint32_t	func
	)

Definition at line 998 of file sdma_engine.cc.

References panic.

Referenced by pollRegMemRead().

◆ pollRegMemRead()

void gem5::SDMAEngine::pollRegMemRead	(	SDMAQueue *	q,
		sdmaPollRegMemHeader *	header,
		sdmaPollRegMem *	pkt,
		uint32_t	dma_buffer,
		int	count
	)

Definition at line 968 of file sdma_engine.cc.

References gem5::GEM5_PACKED::address, gem5::X86ISA::count, decodeNext(), gem5::DmaVirtDevice::dmaReadVirt(), DPRINTF, header, pollRegMemFunc(), pollRegMemRead(), gem5::ArmISA::q, gem5::GEM5_PACKED::ref, and gem5::GEM5_PACKED::retryCount.

Referenced by pollRegMem(), and pollRegMemRead().

◆ processGfx()

void gem5::SDMAEngine::processGfx ( Addr wptrOffset )

Given a new write ptr offset, communicated to the GPU through a doorbell write, the SDMA engine processes the page, gfx, rlc0, or rlc1 queue.

Definition at line 294 of file sdma_engine.cc.

References decodeNext(), gfx, gem5::SDMAEngine::SDMAQueue::processing(), and gem5::SDMAEngine::SDMAQueue::setWptr().

Referenced by gem5::AMDGPUDevice::writeDoorbell().

◆ processPage()

void gem5::SDMAEngine::processPage ( Addr wptrOffset )

Definition at line 305 of file sdma_engine.cc.

References decodeNext(), page, gem5::SDMAEngine::SDMAQueue::processing(), and gem5::SDMAEngine::SDMAQueue::setWptr().

Referenced by gem5::AMDGPUDevice::writeDoorbell().

◆ processRLC()

void gem5::SDMAEngine::processRLC	(	Addr	doorbellOffset,
		Addr	wptrOffset
	)

Definition at line 316 of file sdma_engine.cc.

References panic, processRLC0(), processRLC1(), and rlcInfo.

Referenced by gem5::AMDGPUDevice::writeDoorbell().

◆ processRLC0()

void gem5::SDMAEngine::processRLC0 ( Addr wptrOffset )

private

Definition at line 329 of file sdma_engine.cc.

References cur_vmid, decodeNext(), gem5::SDMAEngine::SDMAQueue::processing(), rlc0, gem5::SDMAEngine::SDMAQueue::setWptr(), and gem5::SDMAEngine::SDMAQueue::valid().

Referenced by processRLC().

◆ processRLC1()

void gem5::SDMAEngine::processRLC1 ( Addr wptrOffset )

private

Definition at line 343 of file sdma_engine.cc.

References cur_vmid, decodeNext(), gem5::SDMAEngine::SDMAQueue::processing(), rlc1, gem5::SDMAEngine::SDMAQueue::setWptr(), and gem5::SDMAEngine::SDMAQueue::valid().

Referenced by processRLC().

◆ ptePde()

void gem5::SDMAEngine::ptePde	(	SDMAQueue *	q,
		sdmaPtePde *	pkt
	)

◆ ptePdeCleanup()

void gem5::SDMAEngine::ptePdeCleanup ( uint64_t * dmaBuffer )

Definition at line 1092 of file sdma_engine.cc.

Referenced by ptePdeDone().

◆ ptePdeDone()

void gem5::SDMAEngine::ptePdeDone	(	SDMAQueue *	q,
		sdmaPtePde *	pkt,
		uint64_t *	dmaBuffer
	)

Definition at line 1070 of file sdma_engine.cc.

References gem5::GEM5_PACKED::count, gem5::AMDGPUDevice::CP(), gem5::curTick(), decodeNext(), gem5::GEM5_PACKED::dest, DPRINTF, gpuDevice, name(), ptePdeCleanup(), gem5::ArmISA::q, gem5::EventManager::schedule(), gem5::GPUCommandProcessor::system(), and warn_once.

Referenced by ptePde().

◆ read()

Tick gem5::SDMAEngine::read ( PacketPtr pkt )

inlineoverridevirtual

Pure virtual function that the device must implement.

Called when a read command is recieved by the port.

Parameters

pkt	Packet describing this request

Returns: number of ticks it took to complete

Implements gem5::PioDevice.

Definition at line 197 of file sdma_engine.hh.

◆ registerRLCQueue()

void gem5::SDMAEngine::registerRLCQueue	(	Addr	doorbell,
		Addr	mqdAddr,
		SDMAQueueDesc *	mqd,
		bool	isStatic
	)

Methods for RLC queues.

Definition at line 182 of file sdma_engine.cc.

References gem5::SDMAEngine::SDMAQueue::base(), gem5::bits(), DPRINTF, gem5::SDMAEngine::SDMAQueue::incRptr(), panic, gem5::SparcISA::priv, gem5::SDMAEngine::SDMAQueue::processing(), gem5::GEM5_PACKED::rb_base, rlc0, rlc1, rlcInfo, gem5::GEM5_PACKED::rptr, gem5::SDMAEngine::SDMAQueue::rptr(), gem5::SDMAEngine::SDMAQueue::rptrWbAddr(), gem5::GEM5_PACKED::sdmax_rlcx_rb_cntl, gem5::GEM5_PACKED::sdmax_rlcx_rb_rptr_addr_hi, gem5::GEM5_PACKED::sdmax_rlcx_rb_rptr_addr_lo, gem5::SDMAEngine::SDMAQueue::setMQD(), gem5::SDMAEngine::SDMAQueue::setMQDAddr(), gem5::SDMAEngine::SDMAQueue::setPriv(), gem5::SDMAEngine::SDMAQueue::setStatic(), gem5::SDMAEngine::SDMAQueue::setWptr(), gem5::SDMAEngine::SDMAQueue::size(), gem5::SDMAEngine::SDMAQueue::valid(), and gem5::GEM5_PACKED::wptr.

Referenced by gem5::PM4PacketProcessor::processSDMAMQD().

◆ serialize()

void gem5::SDMAEngine::serialize ( CheckpointOut & cp ) const

overridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters

cp	Checkpoint state

Reimplemented from gem5::ClockedObject.

Definition at line 1224 of file sdma_engine.cc.

References gem5::X86ISA::base, gfx, gfxBase, gfxDoorbell, gfxDoorbellOffset, gfxIb, gfxRptr, gfxWptr, gem5::ArmISA::i, page, pageBase, pageDoorbell, pageDoorbellOffset, pageIb, pageRptr, pageWptr, gem5::ClockedObject::serialize(), SERIALIZE_ARRAY, and SERIALIZE_SCALAR.

◆ setGfxBaseHi()

void gem5::SDMAEngine::setGfxBaseHi ( uint32_t data )

Definition at line 1401 of file sdma_engine.cc.

References gem5::SDMAEngine::SDMAQueue::base(), data, gfx, gfxBase, and gem5::insertBits().

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ setGfxBaseLo()

void gem5::SDMAEngine::setGfxBaseLo ( uint32_t data )

Definition at line 1393 of file sdma_engine.cc.

References gem5::SDMAEngine::SDMAQueue::base(), data, gfx, gfxBase, and gem5::insertBits().

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ setGfxDoorbellHi()

void gem5::SDMAEngine::setGfxDoorbellHi ( uint32_t data )

Definition at line 1432 of file sdma_engine.cc.

References data, gfxDoorbell, and gem5::insertBits().

◆ setGfxDoorbellLo()

void gem5::SDMAEngine::setGfxDoorbellLo ( uint32_t data )

Definition at line 1425 of file sdma_engine.cc.

References data, gfxDoorbell, and gem5::insertBits().

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ setGfxDoorbellOffsetHi()

void gem5::SDMAEngine::setGfxDoorbellOffsetHi ( uint32_t data )

Definition at line 1450 of file sdma_engine.cc.

References data, gfxDoorbellOffset, and gem5::insertBits().

◆ setGfxDoorbellOffsetLo()

void gem5::SDMAEngine::setGfxDoorbellOffsetLo ( uint32_t data )

Definition at line 1439 of file sdma_engine.cc.

References gem5::bits(), data, gfxDoorbell, gfxDoorbellOffset, gpuDevice, gem5::insertBits(), gem5::SDMAGfx, gem5::AMDGPUDevice::setDoorbellType(), and gem5::AMDGPUDevice::setSDMAEngine().

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ setGfxRptrHi()

void gem5::SDMAEngine::setGfxRptrHi ( uint32_t data )

Definition at line 1417 of file sdma_engine.cc.

References data, getGARTAddr(), gfx, gfxRptr, gem5::insertBits(), and gem5::SDMAEngine::SDMAQueue::rptrWbAddr().

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ setGfxRptrLo()

void gem5::SDMAEngine::setGfxRptrLo ( uint32_t data )

Definition at line 1409 of file sdma_engine.cc.

References data, getGARTAddr(), gfx, gfxRptr, gem5::insertBits(), and gem5::SDMAEngine::SDMAQueue::rptrWbAddr().

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ setGfxSize()

void gem5::SDMAEngine::setGfxSize ( uint32_t data )

Definition at line 1457 of file sdma_engine.cc.

References gem5::bits(), data, gfx, and gem5::SDMAEngine::SDMAQueue::size().

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ setGfxWptrHi()

void gem5::SDMAEngine::setGfxWptrHi ( uint32_t data )

Definition at line 1472 of file sdma_engine.cc.

References data, gfxWptr, and gem5::insertBits().

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ setGfxWptrLo()

void gem5::SDMAEngine::setGfxWptrLo ( uint32_t data )

Definition at line 1465 of file sdma_engine.cc.

References data, gfxWptr, and gem5::insertBits().

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ setGPUDevice()

void gem5::SDMAEngine::setGPUDevice ( AMDGPUDevice * gpu_device )

Definition at line 78 of file sdma_engine.cc.

References gpuDevice, gem5::VegaISA::Walker::setDevRequestor(), gem5::AMDGPUDevice::vramRequestorId(), and walker.

◆ setId()

void gem5::SDMAEngine::setId ( int _id )

inline

Definition at line 173 of file sdma_engine.hh.

◆ setPageBaseHi()

void gem5::SDMAEngine::setPageBaseHi ( uint32_t data )

Definition at line 1487 of file sdma_engine.cc.

References gem5::SDMAEngine::SDMAQueue::base(), data, gem5::insertBits(), page, and pageBase.

◆ setPageBaseLo()

void gem5::SDMAEngine::setPageBaseLo ( uint32_t data )

Definition at line 1479 of file sdma_engine.cc.

References gem5::SDMAEngine::SDMAQueue::base(), data, gem5::insertBits(), page, and pageBase.

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ setPageDoorbellHi()

void gem5::SDMAEngine::setPageDoorbellHi ( uint32_t data )

Definition at line 1518 of file sdma_engine.cc.

References data, gem5::insertBits(), and pageDoorbell.

◆ setPageDoorbellLo()

void gem5::SDMAEngine::setPageDoorbellLo ( uint32_t data )

Definition at line 1511 of file sdma_engine.cc.

References data, gem5::insertBits(), and pageDoorbell.

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ setPageDoorbellOffsetHi()

void gem5::SDMAEngine::setPageDoorbellOffsetHi ( uint32_t data )

Definition at line 1536 of file sdma_engine.cc.

References data, gem5::insertBits(), and pageDoorbellOffset.

◆ setPageDoorbellOffsetLo()

void gem5::SDMAEngine::setPageDoorbellOffsetLo ( uint32_t data )

Definition at line 1525 of file sdma_engine.cc.

References gem5::bits(), data, gpuDevice, gem5::insertBits(), pageDoorbell, pageDoorbellOffset, gem5::SDMAPage, gem5::AMDGPUDevice::setDoorbellType(), and gem5::AMDGPUDevice::setSDMAEngine().

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ setPageRptrHi()

void gem5::SDMAEngine::setPageRptrHi ( uint32_t data )

Definition at line 1503 of file sdma_engine.cc.

References data, getGARTAddr(), gem5::insertBits(), page, pageRptr, and gem5::SDMAEngine::SDMAQueue::rptrWbAddr().

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ setPageRptrLo()

void gem5::SDMAEngine::setPageRptrLo ( uint32_t data )

Definition at line 1495 of file sdma_engine.cc.

References data, getGARTAddr(), gem5::insertBits(), page, pageRptr, and gem5::SDMAEngine::SDMAQueue::rptrWbAddr().

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ setPageSize()

void gem5::SDMAEngine::setPageSize ( uint32_t data )

Definition at line 1543 of file sdma_engine.cc.

References gem5::bits(), data, page, and gem5::SDMAEngine::SDMAQueue::size().

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ setPageWptrHi()

void gem5::SDMAEngine::setPageWptrHi ( uint32_t data )

Definition at line 1558 of file sdma_engine.cc.

References data, gem5::insertBits(), and pageWptr.

◆ setPageWptrLo()

void gem5::SDMAEngine::setPageWptrLo ( uint32_t data )

Definition at line 1551 of file sdma_engine.cc.

References data, gem5::insertBits(), and pageWptr.

Referenced by gem5::AMDGPUDevice::AMDGPUDevice(), and writeMMIO().

◆ srbmWrite()

void gem5::SDMAEngine::srbmWrite	(	SDMAQueue *	q,
		sdmaSRBMWriteHeader *	header,
		sdmaSRBMWrite *	pkt
	)

Definition at line 900 of file sdma_engine.cc.

References gem5::GEM5_PACKED::data, decodeNext(), DPRINTF, gpuDevice, header, gem5::ArmISA::q, gem5::GEM5_PACKED::regAddr, and gem5::AMDGPUDevice::setRegVal().

Referenced by decodeHeader().

◆ translate()

TranslationGenPtr gem5::SDMAEngine::translate	(	Addr	vaddr,
		Addr	size
	)

overridevirtual

GPUController will perform DMA operations on VAs, and because page faults are not currently supported for GPUController, we must be able to find the pages mapped for the process.

Implements gem5::DmaVirtDevice.

Definition at line 158 of file sdma_engine.cc.

References cur_vmid, gem5::AMDGPUDevice::getVM(), gpuDevice, gem5::AMDGPUVM::inAGP(), gem5::AMDGPUVM::inMMHUB(), gem5::MipsISA::vaddr, and walker.

Referenced by getDeviceAddress().

◆ trap()

void gem5::SDMAEngine::trap	(	SDMAQueue *	q,
		sdmaTrap *	pkt
	)

Definition at line 878 of file sdma_engine.cc.

References decodeNext(), DPRINTF, getId(), gem5::AMDGPUDevice::getIH(), getIHClientId(), gpuDevice, gem5::GEM5_PACKED::intrContext, gem5::AMDGPUInterruptHandler::prepareInterruptCookie(), gem5::ArmISA::q, SDMAPage, gem5::AMDGPUInterruptHandler::submitInterruptCookie(), and gem5::TRAP_ID.

Referenced by decodeHeader().

◆ unregisterRLCQueue()

void gem5::SDMAEngine::unregisterRLCQueue	(	Addr	doorbell,
		bool	unmap_static
	)

◆ unserialize()

void gem5::SDMAEngine::unserialize ( CheckpointIn & cp )

overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters

cp	Checkpoint state

Reimplemented from gem5::ClockedObject.

Definition at line 1270 of file sdma_engine.cc.

References gem5::X86ISA::base, gfx, gfxBase, gfxDoorbell, gfxDoorbellOffset, gfxIb, gfxRptr, gfxWptr, gem5::ArmISA::i, page, pageBase, pageDoorbell, pageDoorbellOffset, pageIb, pageRptr, pageWptr, gem5::ClockedObject::unserialize(), UNSERIALIZE_ARRAY, and UNSERIALIZE_SCALAR.

◆ write() [1/2]

Tick gem5::SDMAEngine::write ( PacketPtr pkt )

inlineoverridevirtual

Inherited methods.

Implements gem5::PioDevice.

Definition at line 196 of file sdma_engine.hh.

Referenced by decodeHeader().

◆ write() [2/2]

void gem5::SDMAEngine::write	(	SDMAQueue *	q,
		sdmaWrite *	pkt
	)

Methods that implement processing of SDMA packets.

Definition at line 617 of file sdma_engine.cc.

References gem5::GEM5_PACKED::count, gem5::GEM5_PACKED::dest, gem5::DmaVirtDevice::dmaReadVirt(), DPRINTF, gem5::ArmISA::q, and writeReadData().

◆ writeCleanup()

void gem5::SDMAEngine::writeCleanup ( uint32_t * dmaBuffer )

Definition at line 689 of file sdma_engine.cc.

Referenced by writeDone().

◆ writeDone()

void gem5::SDMAEngine::writeDone	(	SDMAQueue *	q,
		sdmaWrite *	pkt,
		uint32_t *	dmaBuffer
	)

Definition at line 667 of file sdma_engine.cc.

References gem5::GEM5_PACKED::count, gem5::AMDGPUDevice::CP(), gem5::curTick(), decodeNext(), gem5::GEM5_PACKED::dest, DPRINTF, gpuDevice, name(), gem5::ArmISA::q, gem5::EventManager::schedule(), gem5::GPUCommandProcessor::system(), warn_once, and writeCleanup().

Referenced by writeReadData().

◆ writeMMIO()

void gem5::SDMAEngine::writeMMIO	(	PacketPtr	pkt,
		Addr	mmio_offset
	)

Methods for setting the values of SDMA MMIO registers.

Definition at line 1315 of file sdma_engine.cc.

References gem5::bits(), DPRINTF, getGfxDoorbell(), getGfxDoorbellOffset(), gem5::Packet::getLE(), getPageDoorbell(), getPageDoorbellOffset(), gpuDevice, mmSDMA_GFX_DOORBELL, mmSDMA_GFX_DOORBELL_OFFSET, mmSDMA_GFX_RB_BASE, mmSDMA_GFX_RB_BASE_HI, mmSDMA_GFX_RB_CNTL, mmSDMA_GFX_RB_RPTR_ADDR_HI, mmSDMA_GFX_RB_RPTR_ADDR_LO, mmSDMA_GFX_RB_WPTR_POLL_ADDR_HI, mmSDMA_GFX_RB_WPTR_POLL_ADDR_LO, mmSDMA_PAGE_DOORBELL, mmSDMA_PAGE_DOORBELL_OFFSET, mmSDMA_PAGE_RB_BASE, mmSDMA_PAGE_RB_CNTL, mmSDMA_PAGE_RB_RPTR_ADDR_HI, mmSDMA_PAGE_RB_RPTR_ADDR_LO, mmSDMA_PAGE_RB_WPTR_POLL_ADDR_LO, gem5::SDMAGfx, gem5::SDMAPage, gem5::AMDGPUDevice::setDoorbellType(), setGfxBaseHi(), setGfxBaseLo(), setGfxDoorbellLo(), setGfxDoorbellOffsetLo(), setGfxRptrHi(), setGfxRptrLo(), setGfxSize(), setGfxWptrHi(), setGfxWptrLo(), setPageBaseLo(), setPageDoorbellLo(), setPageDoorbellOffsetLo(), setPageRptrHi(), setPageRptrLo(), setPageSize(), setPageWptrLo(), and gem5::AMDGPUDevice::setSDMAEngine().

◆ writeReadData()

void gem5::SDMAEngine::writeReadData	(	SDMAQueue *	q,
		sdmaWrite *	pkt,
		uint32_t *	dmaBuffer
	)

Definition at line 634 of file sdma_engine.cc.

References gem5::GEM5_PACKED::count, gem5::GEM5_PACKED::dest, gem5::DmaVirtDevice::dmaWriteVirt(), DPRINTF, fatal_if, getGARTAddr(), gem5::AMDGPUDevice::getMemMgr(), gem5::AMDGPUVM::getMMHUBBase(), gem5::AMDGPUDevice::getVM(), gpuDevice, gem5::ArmISA::i, gem5::AMDGPUVM::inGARTRange(), gem5::AMDGPUVM::inMMHUB(), name(), gem5::ArmISA::q, writeDone(), and gem5::AMDGPUMemoryManager::writeRequest().

Referenced by write().

Member Data Documentation

◆ cur_vmid

int gem5::SDMAEngine::cur_vmid = 0

Definition at line 318 of file sdma_engine.hh.

Referenced by decodeNext(), getDeviceAddress(), processRLC0(), processRLC1(), and translate().

◆ gfx

SDMAQueue gem5::SDMAEngine::gfx

private

Each SDMAEngine processes four queues: paging, gfx, rlc0, and rlc1, where RLC stands for Run List Controller.

Each one of these can have one indirect buffer associated at any particular time. The switching order between queues is supposed to be page -> gfx -> rlc0 -> page -> gfx -> rlc1, skipping empty queues.

Definition at line 141 of file sdma_engine.hh.

Referenced by processGfx(), SDMAEngine(), serialize(), setGfxBaseHi(), setGfxBaseLo(), setGfxRptrHi(), setGfxRptrLo(), setGfxSize(), and unserialize().

◆ gfxBase

uint64_t gem5::SDMAEngine::gfxBase

private

Definition at line 145 of file sdma_engine.hh.

Referenced by getGfxBase(), serialize(), setGfxBaseHi(), setGfxBaseLo(), and unserialize().

◆ gfxDoorbell

uint64_t gem5::SDMAEngine::gfxDoorbell

private

Definition at line 147 of file sdma_engine.hh.

Referenced by getGfxDoorbell(), serialize(), setGfxDoorbellHi(), setGfxDoorbellLo(), setGfxDoorbellOffsetLo(), and unserialize().

◆ gfxDoorbellOffset

uint64_t gem5::SDMAEngine::gfxDoorbellOffset

private

Definition at line 148 of file sdma_engine.hh.

Referenced by getGfxDoorbellOffset(), serialize(), setGfxDoorbellOffsetHi(), setGfxDoorbellOffsetLo(), and unserialize().

◆ gfxIb

SDMAQueue gem5::SDMAEngine::gfxIb

private

Definition at line 141 of file sdma_engine.hh.

Referenced by SDMAEngine(), serialize(), and unserialize().

◆ gfxRptr

uint64_t gem5::SDMAEngine::gfxRptr

private

Definition at line 146 of file sdma_engine.hh.

Referenced by getGfxRptr(), serialize(), setGfxRptrHi(), setGfxRptrLo(), and unserialize().

◆ gfxWptr

uint64_t gem5::SDMAEngine::gfxWptr

private

Definition at line 149 of file sdma_engine.hh.

Referenced by getGfxWptr(), serialize(), setGfxWptrHi(), setGfxWptrLo(), and unserialize().

◆ gpuDevice

AMDGPUDevice* gem5::SDMAEngine::gpuDevice

private

Definition at line 157 of file sdma_engine.hh.

Referenced by constFill(), copy(), copyDone(), copyReadData(), getDeviceAddress(), getGARTAddr(), ptePde(), ptePdeDone(), setGfxDoorbellOffsetLo(), setGPUDevice(), setPageDoorbellOffsetLo(), srbmWrite(), translate(), trap(), unregisterRLCQueue(), writeDone(), writeMMIO(), and writeReadData().

◆ id

int gem5::SDMAEngine::id

private

Definition at line 133 of file sdma_engine.hh.

Referenced by getId().

◆ mmioBase

Addr gem5::SDMAEngine::mmioBase = 0

private

Definition at line 165 of file sdma_engine.hh.

Referenced by getMmioBase().

◆ mmioSize

Addr gem5::SDMAEngine::mmioSize = 0

private

Definition at line 166 of file sdma_engine.hh.

Referenced by getMmioSize().

◆ page

SDMAQueue gem5::SDMAEngine::page

private

Definition at line 141 of file sdma_engine.hh.

Referenced by processPage(), SDMAEngine(), serialize(), setPageBaseHi(), setPageBaseLo(), setPageRptrHi(), setPageRptrLo(), setPageSize(), and unserialize().

◆ pageBase

uint64_t gem5::SDMAEngine::pageBase

private

Definition at line 151 of file sdma_engine.hh.

Referenced by getPageBase(), serialize(), setPageBaseHi(), setPageBaseLo(), and unserialize().

◆ pageDoorbell

uint64_t gem5::SDMAEngine::pageDoorbell

private

Definition at line 153 of file sdma_engine.hh.

Referenced by getPageDoorbell(), serialize(), setPageDoorbellHi(), setPageDoorbellLo(), setPageDoorbellOffsetLo(), and unserialize().

◆ pageDoorbellOffset

uint64_t gem5::SDMAEngine::pageDoorbellOffset

private

Definition at line 154 of file sdma_engine.hh.

Referenced by getPageDoorbellOffset(), serialize(), setPageDoorbellOffsetHi(), setPageDoorbellOffsetLo(), and unserialize().

◆ pageIb

SDMAQueue gem5::SDMAEngine::pageIb

private

Definition at line 141 of file sdma_engine.hh.

Referenced by SDMAEngine(), serialize(), and unserialize().

◆ pageRptr

uint64_t gem5::SDMAEngine::pageRptr

private

Definition at line 152 of file sdma_engine.hh.

Referenced by getPageRptr(), serialize(), setPageRptrHi(), setPageRptrLo(), and unserialize().

◆ pageWptr

uint64_t gem5::SDMAEngine::pageWptr

private

Definition at line 155 of file sdma_engine.hh.

Referenced by getPageWptr(), serialize(), setPageWptrHi(), setPageWptrLo(), and unserialize().

◆ rlc0

SDMAQueue gem5::SDMAEngine::rlc0

private

Definition at line 142 of file sdma_engine.hh.

Referenced by processRLC0(), registerRLCQueue(), SDMAEngine(), and unregisterRLCQueue().

◆ rlc0Ib

SDMAQueue gem5::SDMAEngine::rlc0Ib

private

Definition at line 142 of file sdma_engine.hh.

Referenced by SDMAEngine().

◆ rlc1

SDMAQueue gem5::SDMAEngine::rlc1

private

Definition at line 142 of file sdma_engine.hh.

Referenced by processRLC1(), registerRLCQueue(), SDMAEngine(), and unregisterRLCQueue().

◆ rlc1Ib

SDMAQueue gem5::SDMAEngine::rlc1Ib

private

Definition at line 142 of file sdma_engine.hh.

Referenced by SDMAEngine().

◆ rlcInfo

std::array<Addr, 2> gem5::SDMAEngine::rlcInfo {}

private

Definition at line 161 of file sdma_engine.hh.

Referenced by deallocateRLCQueues(), processRLC(), registerRLCQueue(), and unregisterRLCQueue().

◆ walker

VegaISA::Walker* gem5::SDMAEngine::walker

private

Definition at line 158 of file sdma_engine.hh.

Referenced by setGPUDevice(), and translate().

The documentation for this class was generated from the following files:

dev/amdgpu/sdma_engine.hh
dev/amdgpu/sdma_engine.cc

Classes

Public Member Functions

Public Attributes

Private Types

Private Member Functions

Private Attributes

Additional Inherited Members

Detailed Description

Member Enumeration Documentation

◆ SDMAType

Constructor & Destructor Documentation

◆ SDMAEngine()

Member Function Documentation

◆ atomic()

◆ atomicData()

◆ atomicDone()

◆ constFill()

◆ constFillDone()

◆ copy()

◆ copyCleanup()

◆ copyDone()

◆ copyReadData()

◆ deallocateRLCQueues()

◆ decodeHeader()

◆ decodeNext()

◆ fence()

◆ fenceDone()

◆ getAddrRanges()

◆ getDeviceAddress()

◆ getGARTAddr()

◆ getGfxBase()

◆ getGfxDoorbell()

◆ getGfxDoorbellOffset()

◆ getGfxRptr()

◆ getGfxWptr()

◆ getId()

◆ getIHClientId()

◆ getMmioBase()

◆ getMmioSize()

◆ getPageBase()

◆ getPageDoorbell()

◆ getPageDoorbellOffset()

◆ getPageRptr()

◆ getPageWptr()

◆ indirectBuffer()

◆ pollRegMem()

◆ pollRegMemFunc()

◆ pollRegMemRead()

◆ processGfx()

◆ processPage()

◆ processRLC()

◆ processRLC0()

◆ processRLC1()

◆ ptePde()

◆ ptePdeCleanup()

◆ ptePdeDone()

◆ read()

◆ registerRLCQueue()

◆ serialize()

◆ setGfxBaseHi()

◆ setGfxBaseLo()

◆ setGfxDoorbellHi()

◆ setGfxDoorbellLo()

◆ setGfxDoorbellOffsetHi()

◆ setGfxDoorbellOffsetLo()

◆ setGfxRptrHi()

◆ setGfxRptrLo()

◆ setGfxSize()

◆ setGfxWptrHi()

◆ setGfxWptrLo()

◆ setGPUDevice()

◆ setId()

◆ setPageBaseHi()

◆ setPageBaseLo()

◆ setPageDoorbellHi()

◆ setPageDoorbellLo()

◆ setPageDoorbellOffsetHi()

◆ setPageDoorbellOffsetLo()

◆ setPageRptrHi()

◆ setPageRptrLo()