gem5  v21.1.0.2
Public Member Functions | Private Member Functions | Private Attributes | List of all members
gem5::AMDGPUDevice Class Reference

Device model for an AMD GPU. More...

#include <amdgpu_device.hh>

Inheritance diagram for gem5::AMDGPUDevice:
gem5::PciDevice gem5::DmaDevice gem5::PioDevice gem5::ClockedObject gem5::SimObject gem5::Clocked gem5::EventManager gem5::Serializable gem5::Drainable gem5::statistics::Group gem5::Named

Public Member Functions

 AMDGPUDevice (const AMDGPUDeviceParams &p)
 
void intrPost ()
 Methods inherited from PciDevice. More...
 
Tick writeConfig (PacketPtr pkt) override
 Write to the PCI config space data that is stored locally. More...
 
Tick readConfig (PacketPtr pkt) override
 Read from the PCI config space data that is stored locally. More...
 
Tick read (PacketPtr pkt) override
 Pure virtual function that the device must implement. More...
 
Tick write (PacketPtr pkt) override
 Pure virtual function that the device must implement. More...
 
AddrRangeList getAddrRanges () const override
 Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to. More...
 
void serialize (CheckpointOut &cp) const override
 Checkpoint support. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::PciDevice
Addr pciToDma (Addr pci_addr) const
 
void intrPost ()
 
void intrClear ()
 
uint8_t interruptLine () const
 
AddrRangeList getAddrRanges () const override
 Determine the address ranges that this device responds to. More...
 
 PciDevice (const PciDeviceParams &params)
 Constructor for PCI Dev. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize this object to the given output stream. More...
 
void unserialize (CheckpointIn &cp) override
 Reconstruct the state of this object from a checkpoint. More...
 
const PciBusAddrbusAddr () const
 
- Public Member Functions inherited from gem5::DmaDevice
 DmaDevice (const Params &p)
 
virtual ~DmaDevice ()=default
 
void dmaWrite (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)
 
void dmaWrite (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)
 
void dmaRead (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)
 
void dmaRead (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)
 
bool dmaPending () const
 
void init () override
 init() is called after all C++ SimObjects have been created and all ports are connected. More...
 
unsigned int cacheBlockSize () const
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Get a port with a given name and index. More...
 
- Public Member Functions inherited from gem5::PioDevice
 PioDevice (const Params &p)
 
virtual ~PioDevice ()
 
void init () override
 init() is called after all C++ SimObjects have been created and all ports are connected. More...
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Get a port with a given name and index. More...
 
- Public Member Functions inherited from gem5::ClockedObject
 ClockedObject (const ClockedObjectParams &p)
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::SimObject
const Paramsparams () const
 
 SimObject (const Params &p)
 
virtual ~SimObject ()
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint. More...
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint. More...
 
virtual void regProbePoints ()
 Register probe points for this object. More...
 
virtual void regProbeListeners ()
 Register probe listeners for this object. More...
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object. More...
 
virtual void startup ()
 startup() is the final initialization call before simulation. More...
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining. More...
 
virtual void memWriteback ()
 Write back dirty buffers to memory using functional writes. More...
 
virtual void memInvalidate ()
 Invalidate the contents of memory buffers. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue. More...
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from gem5::Drainable
DrainState drainState () const
 Return the current drain state of an object. More...
 
virtual void notifyFork ()
 Notify a child process of a fork. More...
 
- Public Member Functions inherited from gem5::statistics::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group. More...
 
virtual ~Group ()
 
virtual void regStats ()
 Callback to set stat parameters. More...
 
virtual void resetStats ()
 Callback to reset stats. More...
 
virtual void preDumpStats ()
 Callback before stats are dumped. More...
 
void addStat (statistics::Info *info)
 Register a stat with this group. More...
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object. More...
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object. More...
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block. More...
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group. More...
 
void mergeStatGroup (Group *block)
 Merge the contents (stats & children) of a block to this block. More...
 
 Group ()=delete
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 
- Public Member Functions inherited from gem5::Clocked
void updateClockPeriod ()
 Update the tick to the current tick. More...
 
Tick clockEdge (Cycles cycles=Cycles(0)) const
 Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...
 
Cycles curCycle () const
 Determine the current cycle, corresponding to a tick aligned to a clock edge. More...
 
Tick nextCycle () const
 Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...
 
uint64_t frequency () const
 
Tick clockPeriod () const
 
double voltage () const
 
Cycles ticksToCycles (Tick t) const
 
Tick cyclesToTicks (Cycles c) const
 

Private Member Functions

void dispatchAccess (PacketPtr pkt, bool read)
 Convert a PCI packet into a response. More...
 
void readFrame (PacketPtr pkt, Addr offset)
 Helper methods to handle specific BAR read/writes. More...
 
void readDoorbell (PacketPtr pkt, Addr offset)
 
void readMMIO (PacketPtr pkt, Addr offset)
 
void writeFrame (PacketPtr pkt, Addr offset)
 
void writeDoorbell (PacketPtr pkt, Addr offset)
 
void writeMMIO (PacketPtr pkt, Addr offset)
 
bool isROM (Addr addr) const
 
void readROM (PacketPtr pkt)
 

Private Attributes

AddrRange romRange
 VGA ROM methods. More...
 
std::array< uint8_t, ROM_SIZErom
 
AMDMMIOReader mmioReader
 MMIO reader to populate device registers map. More...
 
std::unordered_map< uint32_t, uint64_t > regs
 Device registers - Maps register address to register value. More...
 
bool checkpoint_before_mmios
 
int init_interrupt_count
 

Additional Inherited Members

- Public Types inherited from gem5::DmaDevice
typedef DmaDeviceParams Params
 
- Public Types inherited from gem5::PioDevice
using Params = PioDeviceParams
 
- Public Types inherited from gem5::ClockedObject
using Params = ClockedObjectParams
 Parameters of ClockedObject. More...
 
- Public Types inherited from gem5::SimObject
typedef SimObjectParams Params
 
- Static Public Member Functions inherited from gem5::SimObject
static void serializeAll (const std::string &cpt_dir)
 Create a checkpoint by serializing all SimObjects in the system. More...
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it. More...
 
static void setSimObjectResolver (SimObjectResolver *resolver)
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
static SimObjectResolvergetSimObjectResolver ()
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section. More...
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it. More...
 
- Public Attributes inherited from gem5::ClockedObject
PowerStatepowerState
 
- Protected Member Functions inherited from gem5::PciDevice
bool getBAR (Addr addr, int &num, Addr &offs)
 Which base address register (if any) maps the given address? More...
 
- Protected Member Functions inherited from gem5::Drainable
 Drainable ()
 
virtual ~Drainable ()
 
virtual void drainResume ()
 Resume execution after a successful drain. More...
 
void signalDrainDone () const
 Signal that an object is drained. More...
 
- Protected Member Functions inherited from gem5::Clocked
 Clocked (ClockDomain &clk_domain)
 Create a clocked object and set the clock domain based on the parameters. More...
 
 Clocked (Clocked &)=delete
 
Clockedoperator= (Clocked &)=delete
 
virtual ~Clocked ()
 Virtual destructor due to inheritance. More...
 
void resetClock () const
 Reset the object's clock using the current global tick value. More...
 
virtual void clockPeriodUpdated ()
 A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More...
 
- Protected Attributes inherited from gem5::PciDevice
const PciBusAddr _busAddr
 
PCIConfig config
 The current config space. More...
 
std::vector< MSIXTablemsix_table
 MSIX Table and PBA Structures. More...
 
std::vector< MSIXPbaEntrymsix_pba
 
std::array< PciBar *, 6 > BARs {}
 
PciHost::DeviceInterface hostInterface
 
Tick pioDelay
 
Tick configDelay
 
const int PMCAP_BASE
 The capability list structures and base addresses. More...
 
const int PMCAP_ID_OFFSET
 
const int PMCAP_PC_OFFSET
 
const int PMCAP_PMCS_OFFSET
 
PMCAP pmcap
 
const int MSICAP_BASE
 
MSICAP msicap
 
const int MSIXCAP_BASE
 
const int MSIXCAP_ID_OFFSET
 
const int MSIXCAP_MXC_OFFSET
 
const int MSIXCAP_MTAB_OFFSET
 
const int MSIXCAP_MPBA_OFFSET
 
int MSIX_TABLE_OFFSET
 
int MSIX_TABLE_END
 
int MSIX_PBA_OFFSET
 
int MSIX_PBA_END
 
MSIXCAP msixcap
 
const int PXCAP_BASE
 
PXCAP pxcap
 
- Protected Attributes inherited from gem5::DmaDevice
DmaPort dmaPort
 
- Protected Attributes inherited from gem5::PioDevice
Systemsys
 
PioPort< PioDevicepioPort
 The pioPort that handles the requests for us and provides us requests that it sees. More...
 
- Protected Attributes inherited from gem5::SimObject
const SimObjectParams & _params
 Cached copy of the object parameters. More...
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue. More...
 

Detailed Description

Device model for an AMD GPU.

This models the interface between the PCI bus and the various IP blocks behind it. It translates requests to the various BARs and sends them to the appropriate IP block. BAR0 requests are VRAM requests that go to device memory, BAR2 are doorbells which are decoded and sent to the corresponding IP block. BAR5 is the MMIO interface which writes data values to registers controlling the IP blocks.

Definition at line 65 of file amdgpu_device.hh.

Constructor & Destructor Documentation

◆ AMDGPUDevice()

gem5::AMDGPUDevice::AMDGPUDevice ( const AMDGPUDeviceParams &  p)

Member Function Documentation

◆ dispatchAccess()

void gem5::AMDGPUDevice::dispatchAccess ( PacketPtr  pkt,
bool  read 
)
private

Convert a PCI packet into a response.

Definition at line 141 of file amdgpu_device.cc.

References DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getSize(), gem5::Packet::getUintX(), gem5::Packet::makeAtomicResponse(), and read().

Referenced by read(), and write().

◆ getAddrRanges()

AddrRangeList gem5::AMDGPUDevice::getAddrRanges ( ) const
overridevirtual

Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to.

Returns
a list of non-overlapping address ranges

Implements gem5::PioDevice.

Definition at line 83 of file amdgpu_device.cc.

References gem5::PciDevice::getAddrRanges(), gem5::MipsISA::r, and romRange.

◆ intrPost()

void gem5::AMDGPUDevice::intrPost ( )

Methods inherited from PciDevice.

◆ isROM()

bool gem5::AMDGPUDevice::isROM ( Addr  addr) const
inlineprivate

Definition at line 93 of file amdgpu_device.hh.

References gem5::X86ISA::addr, gem5::AddrRange::contains(), and romRange.

Referenced by read().

◆ read()

Tick gem5::AMDGPUDevice::read ( PacketPtr  pkt)
overridevirtual

Pure virtual function that the device must implement.

Called when a read command is recieved by the port.

Parameters
pktPacket describing this request
Returns
number of ticks it took to complete

Implements gem5::PioDevice.

Definition at line 206 of file amdgpu_device.cc.

References dispatchAccess(), gem5::DOORBELL_BAR, gem5::FRAMEBUFFER_BAR, gem5::Packet::getAddr(), gem5::PciDevice::getBAR(), isROM(), gem5::MMIO_BAR, gem5::ArmISA::offset, panic, gem5::PciDevice::pioDelay, readDoorbell(), readFrame(), readMMIO(), and readROM().

Referenced by dispatchAccess().

◆ readConfig()

Tick gem5::AMDGPUDevice::readConfig ( PacketPtr  pkt)
overridevirtual

Read from the PCI config space data that is stored locally.

This may be overridden by the device but at some point it will eventually call this for normal operations that it does not need to override.

Parameters
pktpacket containing the write the offset into config space

Reimplemented from gem5::PciDevice.

Definition at line 102 of file amdgpu_device.cc.

References checkpoint_before_mmios, gem5::PciDevice::config, gem5::curTick(), DPRINTF, gem5::exitSimLoop(), gem5::Packet::getAddr(), gem5::Packet::getSize(), init_interrupt_count, gem5::ArmISA::offset, PCI0_INTERRUPT_PIN, PCI_CONFIG_SIZE, and gem5::PciDevice::readConfig().

◆ readDoorbell()

void gem5::AMDGPUDevice::readDoorbell ( PacketPtr  pkt,
Addr  offset 
)
private

◆ readFrame()

void gem5::AMDGPUDevice::readFrame ( PacketPtr  pkt,
Addr  offset 
)
private

Helper methods to handle specific BAR read/writes.

Offset is the address of the packet - base address of the BAR.

read/writeFrame are used for BAR0 requests read/writeDoorbell are used for BAR2 requests read/writeMMIO are used for BAR5 requests

Definition at line 151 of file amdgpu_device.cc.

References DPRINTF, gem5::FRAMEBUFFER_BAR, gem5::Packet::getAddr(), mmioReader, gem5::ArmISA::offset, gem5::AMDMMIOReader::readFromTrace(), regs, and gem5::Packet::setUintX().

Referenced by read().

◆ readMMIO()

void gem5::AMDGPUDevice::readMMIO ( PacketPtr  pkt,
Addr  offset 
)
private

◆ readROM()

void gem5::AMDGPUDevice::readROM ( PacketPtr  pkt)
private

◆ serialize()

void gem5::AMDGPUDevice::serialize ( CheckpointOut cp) const
overridevirtual

Checkpoint support.

Implements gem5::Serializable.

Definition at line 268 of file amdgpu_device.cc.

References gem5::PciDevice::serialize().

◆ unserialize()

void gem5::AMDGPUDevice::unserialize ( CheckpointIn cp)
overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters
cpCheckpoint state

Implements gem5::Serializable.

Definition at line 275 of file amdgpu_device.cc.

References gem5::PciDevice::unserialize().

◆ write()

Tick gem5::AMDGPUDevice::write ( PacketPtr  pkt)
overridevirtual

Pure virtual function that the device must implement.

Called when a write command is recieved by the port.

Parameters
pktPacket describing this request
Returns
number of ticks it took to complete

Implements gem5::PioDevice.

Definition at line 235 of file amdgpu_device.cc.

References data, dispatchAccess(), gem5::DOORBELL_BAR, gem5::FRAMEBUFFER_BAR, gem5::Packet::getAddr(), gem5::PciDevice::getBAR(), gem5::Packet::getUintX(), gem5::MMIO_BAR, gem5::ArmISA::offset, panic, gem5::PciDevice::pioDelay, regs, writeDoorbell(), writeFrame(), and writeMMIO().

◆ writeConfig()

Tick gem5::AMDGPUDevice::writeConfig ( PacketPtr  pkt)
overridevirtual

Write to the PCI config space data that is stored locally.

This may be overridden by the device but at some point it will eventually call this for normal operations that it does not need to override.

Parameters
pktpacket containing the write the offset into config space

Reimplemented from gem5::PciDevice.

Definition at line 130 of file amdgpu_device.cc.

References DPRINTF, gem5::Packet::getAddr(), gem5::Packet::getSize(), gem5::Packet::getUintX(), gem5::ArmISA::offset, PCI_CONFIG_SIZE, and gem5::PciDevice::writeConfig().

◆ writeDoorbell()

void gem5::AMDGPUDevice::writeDoorbell ( PacketPtr  pkt,
Addr  offset 
)
private

◆ writeFrame()

void gem5::AMDGPUDevice::writeFrame ( PacketPtr  pkt,
Addr  offset 
)
private

◆ writeMMIO()

void gem5::AMDGPUDevice::writeMMIO ( PacketPtr  pkt,
Addr  offset 
)
private

Member Data Documentation

◆ checkpoint_before_mmios

bool gem5::AMDGPUDevice::checkpoint_before_mmios
private

Definition at line 108 of file amdgpu_device.hh.

Referenced by readConfig().

◆ init_interrupt_count

int gem5::AMDGPUDevice::init_interrupt_count
private

Definition at line 109 of file amdgpu_device.hh.

Referenced by readConfig().

◆ mmioReader

AMDMMIOReader gem5::AMDGPUDevice::mmioReader
private

MMIO reader to populate device registers map.

Definition at line 101 of file amdgpu_device.hh.

Referenced by AMDGPUDevice(), readDoorbell(), readFrame(), readMMIO(), writeDoorbell(), writeFrame(), and writeMMIO().

◆ regs

std::unordered_map<uint32_t, uint64_t> gem5::AMDGPUDevice::regs
private

Device registers - Maps register address to register value.

Definition at line 106 of file amdgpu_device.hh.

Referenced by readFrame(), and write().

◆ rom

std::array<uint8_t, ROM_SIZE> gem5::AMDGPUDevice::rom
private

Definition at line 96 of file amdgpu_device.hh.

Referenced by AMDGPUDevice(), and readROM().

◆ romRange

AddrRange gem5::AMDGPUDevice::romRange
private

VGA ROM methods.

Definition at line 92 of file amdgpu_device.hh.

Referenced by AMDGPUDevice(), getAddrRanges(), and isROM().


The documentation for this class was generated from the following files:

Generated on Tue Sep 21 2021 12:27:13 for gem5 by doxygen 1.8.17