gem5  v21.1.0.2
mshr.cc
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41 
47 #include "mem/cache/mshr.hh"
48 
49 #include <cassert>
50 #include <string>
51 
52 #include "base/logging.hh"
53 #include "base/trace.hh"
54 #include "base/types.hh"
55 #include "debug/MSHR.hh"
56 #include "mem/cache/base.hh"
57 #include "mem/request.hh"
58 
59 namespace gem5
60 {
61 
62 MSHR::MSHR(const std::string &name)
63  : QueueEntry(name),
64  downstreamPending(false),
65  pendingModified(false),
66  postInvalidate(false), postDowngrade(false),
67  wasWholeLineWrite(false), isForward(false),
68  targets(name + ".targets"),
69  deferredTargets(name + ".deferredTargets")
70 {
71 }
72 
74  : Named(name),
75  needsWritable(false), hasUpgrade(false),
76  allocOnFill(false), hasFromCache(false)
77 {}
78 
79 
80 void
82  bool alloc_on_fill)
83 {
84  if (source != Target::FromSnoop) {
85  if (pkt->needsWritable()) {
86  needsWritable = true;
87  }
88 
89  // StoreCondReq is effectively an upgrade if it's in an MSHR
90  // since it would have been failed already if we didn't have a
91  // read-only copy
92  if (pkt->isUpgrade() || pkt->cmd == MemCmd::StoreCondReq) {
93  hasUpgrade = true;
94  }
95 
96  // potentially re-evaluate whether we should allocate on a fill or
97  // not
98  allocOnFill = allocOnFill || alloc_on_fill;
99 
100  if (source != Target::FromPrefetcher) {
101  hasFromCache = hasFromCache || pkt->fromCache();
102 
103  updateWriteFlags(pkt);
104  }
105  }
106 }
107 
108 void
110 {
111  resetFlags();
112  for (auto& t: *this) {
113  updateFlags(t.pkt, t.source, t.allocOnFill);
114  }
115 }
116 
117 void
119 {
120  if (isWholeLineWrite()) {
121  // if we have already seen writes for the full block
122  // stop here, this might be a full line write followed
123  // by other compatible requests (e.g., reads)
124  return;
125  }
126 
127  if (canMergeWrites) {
128  if (!pkt->isWrite()) {
129  // We won't allow further merging if this hasn't
130  // been a write
131  canMergeWrites = false;
132  return;
133  }
134 
135  // Avoid merging requests with special flags (e.g.,
136  // strictly ordered)
137  const Request::FlagsType no_merge_flags =
141  const auto &req_flags = pkt->req->getFlags();
142  bool compat_write = !req_flags.isSet(no_merge_flags);
143 
144  // if this is the first write, it might be a whole
145  // line write and even if we can't merge any
146  // subsequent write requests, we still need to service
147  // it as a whole line write (e.g., SECURE whole line
148  // write)
149  bool first_write = empty();
150  if (first_write || compat_write) {
151  auto offset = pkt->getOffset(blkSize);
152  auto begin = writesBitmap.begin() + offset;
153  std::fill(begin, begin + pkt->getSize(), true);
154  }
155 
156  // We won't allow further merging if this has been a
157  // special write
158  canMergeWrites &= compat_write;
159  }
160 }
161 
162 inline void
164  Counter order, Target::Source source, bool markPending,
165  bool alloc_on_fill)
166 {
167  updateFlags(pkt, source, alloc_on_fill);
168  if (markPending) {
169  // Iterate over the SenderState stack and see if we find
170  // an MSHR entry. If we do, set the downstreamPending
171  // flag. Otherwise, do nothing.
172  MSHR *mshr = pkt->findNextSenderState<MSHR>();
173  if (mshr != nullptr) {
174  assert(!mshr->downstreamPending);
175  mshr->downstreamPending = true;
176  } else {
177  // No need to clear downstreamPending later
178  markPending = false;
179  }
180  }
181 
182  emplace_back(pkt, readyTime, order, source, markPending, alloc_on_fill);
183 
184  DPRINTF(MSHR, "New target allocated: %s\n", pkt->print());
185 }
186 
187 
188 static void
190 {
191  // remember if the current packet has data allocated
192  bool has_data = pkt->hasData() || pkt->hasRespData();
193 
194  if (pkt->cmd == MemCmd::UpgradeReq) {
195  pkt->cmd = MemCmd::ReadExReq;
196  DPRINTF(MSHR, "Replacing UpgradeReq with ReadExReq\n");
197  } else if (pkt->cmd == MemCmd::SCUpgradeReq) {
199  DPRINTF(MSHR, "Replacing SCUpgradeReq with SCUpgradeFailReq\n");
200  } else if (pkt->cmd == MemCmd::StoreCondReq) {
202  DPRINTF(MSHR, "Replacing StoreCondReq with StoreCondFailReq\n");
203  }
204 
205  if (!has_data) {
206  // there is no sensible way of setting the data field if the
207  // new command actually would carry data
208  assert(!pkt->hasData());
209 
210  if (pkt->hasRespData()) {
211  // we went from a packet that had no data (neither request,
212  // nor response), to one that does, and therefore we need to
213  // actually allocate space for the data payload
214  pkt->allocate();
215  }
216  }
217 }
218 
219 
220 void
222 {
223  if (!hasUpgrade)
224  return;
225 
226  for (auto& t : *this) {
227  replaceUpgrade(t.pkt);
228  }
229 
230  hasUpgrade = false;
231 }
232 
233 
234 void
235 MSHR::TargetList::clearDownstreamPending(MSHR::TargetList::iterator begin,
236  MSHR::TargetList::iterator end)
237 {
238  for (auto t = begin; t != end; t++) {
239  if (t->markedPending) {
240  // Iterate over the SenderState stack and see if we find
241  // an MSHR entry. If we find one, clear the
242  // downstreamPending flag by calling
243  // clearDownstreamPending(). This recursively clears the
244  // downstreamPending flag in all caches this packet has
245  // passed through.
246  MSHR *mshr = t->pkt->findNextSenderState<MSHR>();
247  if (mshr != nullptr) {
248  mshr->clearDownstreamPending();
249  }
250  t->markedPending = false;
251  }
252  }
253 }
254 
255 void
257 {
258  clearDownstreamPending(begin(), end());
259 }
260 
261 
262 bool
264 {
265  for (auto& t : *this) {
266  if (pkt->trySatisfyFunctional(t.pkt)) {
267  return true;
268  }
269  }
270 
271  return false;
272 }
273 
274 
275 void
276 MSHR::TargetList::print(std::ostream &os, int verbosity,
277  const std::string &prefix) const
278 {
279  for (auto& t : *this) {
280  const char *s;
281  switch (t.source) {
282  case Target::FromCPU:
283  s = "FromCPU";
284  break;
285  case Target::FromSnoop:
286  s = "FromSnoop";
287  break;
289  s = "FromPrefetcher";
290  break;
291  default:
292  s = "";
293  break;
294  }
295  ccprintf(os, "%s%s: ", prefix, s);
296  t.pkt->print(os, verbosity, "");
297  ccprintf(os, "\n");
298  }
299 }
300 
301 
302 void
303 MSHR::allocate(Addr blk_addr, unsigned blk_size, PacketPtr target,
304  Tick when_ready, Counter _order, bool alloc_on_fill)
305 {
306  blkAddr = blk_addr;
307  blkSize = blk_size;
308  isSecure = target->isSecure();
309  readyTime = when_ready;
310  order = _order;
311  assert(target);
312  isForward = false;
313  wasWholeLineWrite = false;
314  _isUncacheable = target->req->isUncacheable();
315  inService = false;
316  downstreamPending = false;
317 
320 
321  // Don't know of a case where we would allocate a new MSHR for a
322  // snoop (mem-side request), so set source according to request here
323  Target::Source source = (target->cmd == MemCmd::HardPFReq) ?
325  targets.add(target, when_ready, _order, source, true, alloc_on_fill);
326 
327  // All targets must refer to the same block
328  assert(target->matchBlockAddr(targets.front().pkt, blkSize));
329 }
330 
331 
332 void
334 {
335  assert(downstreamPending);
336  downstreamPending = false;
337  // recursively clear flag on any MSHRs we will be forwarding
338  // responses to
340 }
341 
342 void
343 MSHR::markInService(bool pending_modified_resp)
344 {
345  assert(!inService);
346 
347  inService = true;
348  pendingModified = targets.needsWritable || pending_modified_resp;
349  postInvalidate = postDowngrade = false;
350 
351  if (!downstreamPending) {
352  // let upstream caches know that the request has made it to a
353  // level where it's going to get a response
355  }
356  // if the line is not considered a whole-line write when sent
357  // downstream, make sure it is also not considered a whole-line
358  // write when receiving the response, and vice versa
360 }
361 
362 
363 void
365 {
366  assert(targets.empty());
368  assert(deferredTargets.isReset());
369  inService = false;
370 }
371 
372 /*
373  * Adds a target to an MSHR
374  */
375 void
377  bool alloc_on_fill)
378 {
379  // assume we'd never issue a prefetch when we've got an
380  // outstanding miss
381  assert(pkt->cmd != MemCmd::HardPFReq);
382 
383  // if there's a request already in service for this MSHR, we will
384  // have to defer the new target until after the response if any of
385  // the following are true:
386  // - there are other targets already deferred
387  // - there's a pending invalidate to be applied after the response
388  // comes back (but before this target is processed)
389  // - the MSHR's first (and only) non-deferred target is a cache
390  // maintenance packet
391  // - the new target is a cache maintenance packet (this is probably
392  // overly conservative but certainly safe)
393  // - this target requires a writable block and either we're not
394  // getting a writable block back or we have already snooped
395  // another read request that will downgrade our writable block
396  // to non-writable (Shared or Owned)
397  PacketPtr tgt_pkt = targets.front().pkt;
398  if (pkt->req->isCacheMaintenance() ||
399  tgt_pkt->req->isCacheMaintenance() ||
400  !deferredTargets.empty() ||
401  (inService &&
402  (hasPostInvalidate() ||
403  (pkt->needsWritable() &&
404  (!isPendingModified() || hasPostDowngrade() || isForward))))) {
405  // need to put on deferred list
406  if (inService && hasPostInvalidate())
407  replaceUpgrade(pkt);
408  deferredTargets.add(pkt, whenReady, _order, Target::FromCPU, true,
409  alloc_on_fill);
410  } else {
411  // No request outstanding, or still OK to append to
412  // outstanding request: append to regular target list. Only
413  // mark pending if current request hasn't been issued yet
414  // (isn't in service).
415  targets.add(pkt, whenReady, _order, Target::FromCPU, !inService,
416  alloc_on_fill);
417  }
418 
419  DPRINTF(MSHR, "After target allocation: %s", print());
420 }
421 
422 bool
424 {
425  DPRINTF(MSHR, "%s for %s\n", __func__, pkt->print());
426 
427  // when we snoop packets the needsWritable and isInvalidate flags
428  // should always be the same, however, this assumes that we never
429  // snoop writes as they are currently not marked as invalidations
430  panic_if((pkt->needsWritable() != pkt->isInvalidate()) &&
431  !pkt->req->isCacheMaintenance(),
432  "%s got snoop %s where needsWritable, "
433  "does not match isInvalidate", name(), pkt->print());
434 
435  if (!inService || (pkt->isExpressSnoop() && downstreamPending)) {
436  // Request has not been issued yet, or it's been issued
437  // locally but is buffered unissued at some downstream cache
438  // which is forwarding us this snoop. Either way, the packet
439  // we're snooping logically precedes this MSHR's request, so
440  // the snoop has no impact on the MSHR, but must be processed
441  // in the standard way by the cache. The only exception is
442  // that if we're an L2+ cache buffering an UpgradeReq from a
443  // higher-level cache, and the snoop is invalidating, then our
444  // buffered upgrades must be converted to read exclusives,
445  // since the upper-level cache no longer has a valid copy.
446  // That is, even though the upper-level cache got out on its
447  // local bus first, some other invalidating transaction
448  // reached the global bus before the upgrade did.
449  if (pkt->needsWritable() || pkt->req->isCacheInvalidate()) {
452  }
453 
454  return false;
455  }
456 
457  // From here on down, the request issued by this MSHR logically
458  // precedes the request we're snooping.
459  if (pkt->needsWritable() || pkt->req->isCacheInvalidate()) {
460  // snooped request still precedes the re-request we'll have to
461  // issue for deferred targets, if any...
463  }
464 
465  PacketPtr tgt_pkt = targets.front().pkt;
466  if (hasPostInvalidate() || tgt_pkt->req->isCacheInvalidate()) {
467  // a prior snoop has already appended an invalidation or a
468  // cache invalidation operation is in progress, so logically
469  // we don't have the block anymore; no need for further
470  // snooping.
471  return true;
472  }
473 
474  // Start by determining if we will eventually respond or not,
475  // matching the conditions checked in Cache::handleSnoop
476  const bool will_respond = isPendingModified() && pkt->needsResponse() &&
477  !pkt->isClean();
478  if (isPendingModified() || pkt->isInvalidate()) {
479  // We need to save and replay the packet in two cases:
480  // 1. We're awaiting a writable copy (Modified or Exclusive),
481  // so this MSHR is the orgering point, and we need to respond
482  // after we receive data.
483  // 2. It's an invalidation (e.g., UpgradeReq), and we need
484  // to forward the snoop up the hierarchy after the current
485  // transaction completes.
486 
487  // The packet we are snooping may be deleted by the time we
488  // actually process the target, and we consequently need to
489  // save a copy here. Clear flags and also allocate new data as
490  // the original packet data storage may have been deleted by
491  // the time we get to process this packet. In the cases where
492  // we are not responding after handling the snoop we also need
493  // to create a copy of the request to be on the safe side. In
494  // the latter case the cache is responsible for deleting both
495  // the packet and the request as part of handling the deferred
496  // snoop.
497  PacketPtr cp_pkt = will_respond ? new Packet(pkt, true, true) :
498  new Packet(std::make_shared<Request>(*pkt->req), pkt->cmd,
499  blkSize, pkt->id);
500 
501  if (will_respond) {
502  // we are the ordering point, and will consequently
503  // respond, and depending on whether the packet
504  // needsWritable or not we either pass a Shared line or a
505  // Modified line
506  pkt->setCacheResponding();
507 
508  // inform the cache hierarchy that this cache had the line
509  // in the Modified state, even if the response is passed
510  // as Shared (and thus non-writable)
512 
513  // in the case of an uncacheable request there is no need
514  // to set the responderHadWritable flag, but since the
515  // recipient does not care there is no harm in doing so
516  } else if (isPendingModified() && pkt->isClean()) {
517  // this cache doesn't respond to the clean request, a
518  // destination xbar will respond to this request, but to
519  // do so it needs to know if it should wait for the
520  // WriteCleanReq
521  pkt->setSatisfied();
522  }
523 
524  targets.add(cp_pkt, curTick(), _order, Target::FromSnoop,
526 
527  if (pkt->needsWritable() || pkt->isInvalidate()) {
528  // This transaction will take away our pending copy
529  postInvalidate = true;
530  }
531  }
532 
533  if (!pkt->needsWritable() && !pkt->req->isUncacheable()) {
534  // This transaction will get a read-shared copy, downgrading
535  // our copy if we had a writable one
536  postDowngrade = true;
537  // make sure that any downstream cache does not respond with a
538  // writable (and dirty) copy even if it has one, unless it was
539  // explicitly asked for one
540  pkt->setHasSharers();
541  }
542 
543  return will_respond;
544 }
545 
548 {
549  TargetList ready_targets;
550  ready_targets.init(blkAddr, blkSize);
551  // If the downstream MSHR got an invalidation request then we only
552  // service the first of the FromCPU targets and any other
553  // non-FromCPU target. This way the remaining FromCPU targets
554  // issue a new request and get a fresh copy of the block and we
555  // avoid memory consistency violations.
556  if (pkt->cmd == MemCmd::ReadRespWithInvalidate) {
557  auto it = targets.begin();
558  assert((it->source == Target::FromCPU) ||
559  (it->source == Target::FromPrefetcher));
560  ready_targets.push_back(*it);
561  it = targets.erase(it);
562  while (it != targets.end()) {
563  if (it->source == Target::FromCPU) {
564  it++;
565  } else {
566  assert(it->source == Target::FromSnoop);
567  ready_targets.push_back(*it);
568  it = targets.erase(it);
569  }
570  }
571  ready_targets.populateFlags();
572  } else {
573  std::swap(ready_targets, targets);
574  }
576 
577  return ready_targets;
578 }
579 
580 bool
582 {
583  if (targets.empty() && deferredTargets.empty()) {
584  // nothing to promote
585  return false;
586  }
587 
588  // the deferred targets can be generally promoted unless they
589  // contain a cache maintenance request
590 
591  // find the first target that is a cache maintenance request
592  auto it = std::find_if(deferredTargets.begin(), deferredTargets.end(),
593  [](MSHR::Target &t) {
594  return t.pkt->req->isCacheMaintenance();
595  });
596  if (it == deferredTargets.begin()) {
597  // if the first deferred target is a cache maintenance packet
598  // then we can promote provided the targets list is empty and
599  // we can service it on its own
600  if (targets.empty()) {
601  targets.splice(targets.end(), deferredTargets, it);
602  }
603  } else {
604  // if a cache maintenance operation exists, we promote all the
605  // deferred targets that precede it, or all deferred targets
606  // otherwise
607  targets.splice(targets.end(), deferredTargets,
608  deferredTargets.begin(), it);
609  }
610 
613  order = targets.front().order;
614  readyTime = std::max(curTick(), targets.front().readyTime);
615 
616  return true;
617 }
618 
619 void
620 MSHR::promoteIf(const std::function<bool (Target &)>& pred)
621 {
622  // if any of the deferred targets were upper-level cache
623  // requests marked downstreamPending, need to clear that
624  assert(!downstreamPending); // not pending here anymore
625 
626  // find the first target does not satisfy the condition
627  auto last_it = std::find_if_not(deferredTargets.begin(),
628  deferredTargets.end(),
629  pred);
630 
631  // for the prefix of the deferredTargets [begin(), last_it) clear
632  // the downstreamPending flag and move them to the target list
634  last_it);
635  targets.splice(targets.end(), deferredTargets,
636  deferredTargets.begin(), last_it);
637  // We need to update the flags for the target lists after the
638  // modifications
640 }
641 
642 void
644 {
645  if (!deferredTargets.empty() && !hasPostInvalidate()) {
646  // We got a non invalidating response, and we have the block
647  // but we have deferred targets which are waiting and they do
648  // not need writable. This can happen if the original request
649  // was for a cache clean operation and we had a copy of the
650  // block. Since we serviced the cache clean operation and we
651  // have the block, there's no need to defer the targets, so
652  // move them up to the regular target list.
653 
654  auto pred = [](Target &t) {
655  assert(t.source == Target::FromCPU);
656  return !t.pkt->req->isCacheInvalidate() &&
657  !t.pkt->needsWritable();
658  };
659  promoteIf(pred);
660  }
661 }
662 
663 void
665 {
666  PacketPtr def_tgt_pkt = deferredTargets.front().pkt;
669  !def_tgt_pkt->req->isCacheInvalidate()) {
670  // We got a writable response, but we have deferred targets
671  // which are waiting to request a writable copy (not because
672  // of a pending invalidate). This can happen if the original
673  // request was for a read-only block, but we got a writable
674  // response anyway. Since we got the writable copy there's no
675  // need to defer the targets, so move them up to the regular
676  // target list.
677  assert(!targets.needsWritable);
678  targets.needsWritable = true;
679 
680  auto pred = [](Target &t) {
681  assert(t.source == Target::FromCPU);
682  return !t.pkt->req->isCacheInvalidate();
683  };
684 
685  promoteIf(pred);
686  }
687 }
688 
689 
690 bool
692 {
693  // For printing, we treat the MSHR as a whole as single entity.
694  // For other requests, we iterate over the individual targets
695  // since that's where the actual data lies.
696  if (pkt->isPrint()) {
697  pkt->trySatisfyFunctional(this, blkAddr, isSecure, blkSize, nullptr);
698  return false;
699  } else {
700  return (targets.trySatisfyFunctional(pkt) ||
702  }
703 }
704 
705 bool
707 {
708  return cache.sendMSHRQueuePacket(this);
709 }
710 
711 void
712 MSHR::print(std::ostream &os, int verbosity, const std::string &prefix) const
713 {
714  ccprintf(os, "%s[%#llx:%#llx](%s) %s %s %s state: %s %s %s %s %s %s\n",
715  prefix, blkAddr, blkAddr + blkSize - 1,
716  isSecure ? "s" : "ns",
717  isForward ? "Forward" : "",
718  allocOnFill() ? "AllocOnFill" : "",
719  needsWritable() ? "Wrtbl" : "",
720  _isUncacheable ? "Unc" : "",
721  inService ? "InSvc" : "",
722  downstreamPending ? "DwnPend" : "",
723  postInvalidate ? "PostInv" : "",
724  postDowngrade ? "PostDowngr" : "",
725  hasFromCache() ? "HasFromCache" : "");
726 
727  if (!targets.empty()) {
728  ccprintf(os, "%s Targets:\n", prefix);
729  targets.print(os, verbosity, prefix + " ");
730  }
731  if (!deferredTargets.empty()) {
732  ccprintf(os, "%s Deferred Targets:\n", prefix);
733  deferredTargets.print(os, verbosity, prefix + " ");
734  }
735 }
736 
737 std::string
738 MSHR::print() const
739 {
740  std::ostringstream str;
741  print(str);
742  return str.str();
743 }
744 
745 bool
746 MSHR::matchBlockAddr(const Addr addr, const bool is_secure) const
747 {
748  assert(hasTargets());
749  return (blkAddr == addr) && (isSecure == is_secure);
750 }
751 
752 bool
754 {
755  assert(hasTargets());
756  return pkt->matchBlockAddr(blkAddr, isSecure, blkSize);
757 }
758 
759 bool
760 MSHR::conflictAddr(const QueueEntry* entry) const
761 {
762  assert(hasTargets());
763  return entry->matchBlockAddr(blkAddr, isSecure);
764 }
765 
766 } // namespace gem5
gem5::curTick
Tick curTick()
The universal simulation clock.
Definition: cur_tick.hh:46
gem5::MSHR
Miss Status and handling Register.
Definition: mshr.hh:74
gem5::MipsISA::fill
fill
Definition: pra_constants.hh:57
gem5::MSHR::TargetList::replaceUpgrades
void replaceUpgrades()
Convert upgrades to the equivalent request if the cache line they refer to would have been invalid (U...
Definition: mshr.cc:221
gem5::MemCmd::StoreCondReq
@ StoreCondReq
Definition: packet.hh:112
base.hh
gem5::Request::STRICT_ORDER
@ STRICT_ORDER
The request is required to be strictly ordered by CPU models and is non-speculative.
Definition: request.hh:135
gem5::MSHR::TargetList::print
void print(std::ostream &os, int verbosity, const std::string &prefix) const
Definition: mshr.cc:276
gem5::MSHR::TargetList::updateWriteFlags
void updateWriteFlags(PacketPtr pkt)
Add the specified packet in the TargetList.
Definition: mshr.cc:118
gem5::Packet::getOffset
Addr getOffset(unsigned int blk_size) const
Definition: packet.hh:800
gem5::QueueEntry::_isUncacheable
bool _isUncacheable
True if the entry is uncacheable.
Definition: queue_entry.hh:77
gem5::Packet::findNextSenderState
T * findNextSenderState() const
Go through the sender state stack and return the first instance that is of type T (as determined by a...
Definition: packet.hh:564
gem5::MSHR::TargetList::TargetList
TargetList(const std::string &name=".unnamedTargetList")
Definition: mshr.cc:73
mshr.hh
gem5::Request::UNCACHEABLE
@ UNCACHEABLE
The request is to an uncacheable address.
Definition: request.hh:125
gem5::Packet::req
RequestPtr req
A pointer to the original request.
Definition: packet.hh:366
gem5::MSHR::allocOnFill
bool allocOnFill() const
Definition: mshr.hh:340
gem5::MSHR::isForward
bool isForward
True if the entry is just a simple forward from an upper level.
Definition: mshr.hh:127
gem5::MSHR::promoteIf
void promoteIf(const std::function< bool(Target &)> &pred)
Promotes deferred targets that satisfy a predicate.
Definition: mshr.cc:620
gem5::MSHR::pendingModified
bool pendingModified
Here we use one flag to track both if:
Definition: mshr.hh:113
gem5::MSHR::TargetList::add
void add(PacketPtr pkt, Tick readyTime, Counter order, Target::Source source, bool markPending, bool alloc_on_fill)
Add the specified packet in the TargetList.
Definition: mshr.cc:163
gem5::MSHR::matchBlockAddr
bool matchBlockAddr(const Addr addr, const bool is_secure) const override
Check if entry corresponds to the one being looked for.
Definition: mshr.cc:746
gem5::MSHR::hasPostInvalidate
bool hasPostInvalidate() const
Definition: mshr.hh:330
gem5::Packet::setCacheResponding
void setCacheResponding()
Snoop flags.
Definition: packet.hh:640
gem5::MSHR::promoteDeferredTargets
bool promoteDeferredTargets()
Definition: mshr.cc:581
gem5::Request::MEM_SWAP
@ MEM_SWAP
This request is for a memory swap.
Definition: request.hh:158
gem5::MSHR::promoteWritable
void promoteWritable()
Promotes deferred targets that do not require writable.
Definition: mshr.cc:664
gem5::MSHR::postInvalidate
bool postInvalidate
Did we snoop an invalidate while waiting for data?
Definition: mshr.hh:116
gem5::Packet::isUpgrade
bool isUpgrade() const
Definition: packet.hh:585
gem5::Packet::isWrite
bool isWrite() const
Definition: packet.hh:583
gem5::Packet::isSecure
bool isSecure() const
Definition: packet.hh:810
gem5::MemCmd::UpgradeReq
@ UpgradeReq
Definition: packet.hh:102
gem5::MSHR::postDowngrade
bool postDowngrade
Did we snoop a read while waiting for data?
Definition: mshr.hh:119
gem5::MSHR::markInService
void markInService(bool pending_modified_resp)
Definition: mshr.cc:343
gem5::MSHR::sendPacket
bool sendPacket(BaseCache &cache) override
Send this queue entry as a downstream packet, with the exact behaviour depending on the specific entr...
Definition: mshr.cc:706
gem5::MemCmd::HardPFReq
@ HardPFReq
Definition: packet.hh:98
gem5::Packet::setSatisfied
void setSatisfied()
Set when a request hits in a cache and the cache is not going to respond.
Definition: packet.hh:736
gem5::QueueEntry::blkAddr
Addr blkAddr
Block aligned address.
Definition: queue_entry.hh:116
gem5::MSHR::TargetList::clearDownstreamPending
void clearDownstreamPending()
Definition: mshr.cc:256
gem5::Request::FlagsType
uint64_t FlagsType
Definition: request.hh:100
request.hh
gem5::QueueEntry::order
Counter order
Order number assigned to disambiguate writes and misses.
Definition: queue_entry.hh:113
gem5::ccprintf
void ccprintf(cp::Print &print)
Definition: cprintf.hh:130
gem5::QueueEntry::readyTime
Tick readyTime
Tick when ready to issue.
Definition: queue_entry.hh:74
gem5::MSHR::TargetList::populateFlags
void populateFlags()
Goes through the list of targets and uses them to populate the flags of this TargetList.
Definition: mshr.cc:109
gem5::MemCmd::StoreCondFailReq
@ StoreCondFailReq
Definition: packet.hh:113
gem5::Named
Interface for things with names.
Definition: named.hh:38
gem5::Packet::hasData
bool hasData() const
Definition: packet.hh:603
gem5::MSHR::Target::FromCPU
@ FromCPU
Definition: mshr.hh:135
gem5::Packet::needsWritable
bool needsWritable() const
Definition: packet.hh:588
gem5::MSHR::allocateTarget
void allocateTarget(PacketPtr target, Tick when, Counter order, bool alloc_on_fill)
Add a request to the list of targets.
Definition: mshr.cc:376
gem5::Request::SECURE
@ SECURE
The request targets the secure memory space.
Definition: request.hh:184
gem5::MemCmd::SCUpgradeReq
@ SCUpgradeReq
Definition: packet.hh:103
gem5::Named::name
virtual std::string name() const
Definition: named.hh:47
gem5::MSHR::needsWritable
bool needsWritable() const
The pending* and post* flags are only valid if inService is true.
Definition: mshr.hh:319
gem5::Packet::print
void print(std::ostream &o, int verbosity=0, const std::string &prefix="") const
Definition: packet.cc:373
gem5::BaseCache
A basic cache interface.
Definition: base.hh:95
gem5::MSHR::TargetList::resetFlags
void resetFlags()
Definition: mshr.hh:210
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:186
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::Packet::matchBlockAddr
bool matchBlockAddr(const Addr addr, const bool is_secure, const int blk_size) const
Check if packet corresponds to a given block-aligned address and address space.
Definition: packet.cc:394
gem5::BaseCache::sendMSHRQueuePacket
virtual bool sendMSHRQueuePacket(MSHR *mshr)
Take an MSHR, turn it into a suitable downstream packet, and send it out.
Definition: base.cc:1790
gem5::QueueEntry::matchBlockAddr
virtual bool matchBlockAddr(const Addr addr, const bool is_secure) const =0
Check if entry corresponds to the one being looked for.
gem5::MSHR::isPendingModified
bool isPendingModified() const
Definition: mshr.hh:326
gem5::probing::Packet
ProbePointArg< PacketInfo > Packet
Packet probe point.
Definition: mem.hh:109
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::MSHR::Target
Definition: mshr.hh:129
gem5::QueueEntry::isSecure
bool isSecure
True if the entry targets the secure memory space.
Definition: queue_entry.hh:122
gem5::ArmISA::s
Bitfield< 4 > s
Definition: misc_types.hh:561
gem5::MSHR::TargetList::init
void init(Addr blk_addr, Addr blk_size)
Reset state.
Definition: mshr.hh:202
gem5::MSHR::TargetList::updateFlags
void updateFlags(PacketPtr pkt, Target::Source source, bool alloc_on_fill)
Use the provided packet and the source to update the flags of this TargetList.
Definition: mshr.cc:81
gem5::ArmISA::offset
Bitfield< 23, 0 > offset
Definition: types.hh:144
gem5::MSHR::print
std::string print() const
A no-args wrapper of print(std::ostream...) meant to be invoked from DPRINTFs avoiding string overhea...
Definition: mshr.cc:738
gem5::Packet::id
const PacketId id
Definition: packet.hh:363
gem5::MSHR::isWholeLineWrite
bool isWholeLineWrite() const
Check if this MSHR contains only compatible writes, and if they span the entire cache line.
Definition: mshr.hh:390
gem5::Packet::setResponderHadWritable
void setResponderHadWritable()
On responding to a snoop request (which only happens for Modified or Owned lines),...
Definition: packet.hh:700
gem5::MemCmd::ReadExReq
@ ReadExReq
Definition: packet.hh:107
gem5::Packet::cmd
MemCmd cmd
The command field of the packet.
Definition: packet.hh:361
gem5::ArmISA::t
Bitfield< 5 > t
Definition: misc_types.hh:70
gem5::Packet::isPrint
bool isPrint() const
Definition: packet.hh:611
gem5::MSHR::downstreamPending
bool downstreamPending
Flag set by downstream caches.
Definition: mshr.hh:87
gem5::MSHR::hasFromCache
bool hasFromCache() const
Determine if there are non-deferred requests from other caches.
Definition: mshr.hh:349
gem5::MSHR::TargetList
Definition: mshr.hh:169
gem5::Packet::needsResponse
bool needsResponse() const
Definition: packet.hh:597
gem5::MSHR::wasWholeLineWrite
bool wasWholeLineWrite
Track if we sent this as a whole line write or not.
Definition: mshr.hh:124
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::MSHR::deferredTargets
TargetList deferredTargets
Definition: mshr.hh:380
name
const std::string & name()
Definition: trace.cc:49
gem5::MSHR::TargetList::trySatisfyFunctional
bool trySatisfyFunctional(PacketPtr pkt)
Definition: mshr.cc:263
gem5::MSHR::conflictAddr
bool conflictAddr(const QueueEntry *entry) const override
Check if given entry's packets conflict with this' entries packets.
Definition: mshr.cc:760
gem5::MemCmd::SCUpgradeFailReq
@ SCUpgradeFailReq
Definition: packet.hh:105
gem5::MSHR::targets
TargetList targets
List of all requests that match the address.
Definition: mshr.hh:378
gem5::Packet::isClean
bool isClean() const
Definition: packet.hh:600
gem5::Packet::setHasSharers
void setHasSharers()
On fills, the hasSharers flag is used by the caches in combination with the cacheResponding flag,...
Definition: packet.hh:672
gem5::QueueEntry::blkSize
unsigned blkSize
Block size of the cache.
Definition: queue_entry.hh:119
gem5::Request::MEM_SWAP_COND
@ MEM_SWAP_COND
Definition: request.hh:159
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:203
gem5::Packet::allocate
void allocate()
Allocate memory for the packet.
Definition: packet.hh:1326
gem5::Request::LLSC
@ LLSC
The request is a Load locked/store conditional.
Definition: request.hh:156
types.hh
gem5::X86ISA::os
Bitfield< 17 > os
Definition: misc.hh:809
gem5::MSHR::Target::Source
Source
Definition: mshr.hh:133
gem5::MSHR::trySatisfyFunctional
bool trySatisfyFunctional(PacketPtr pkt)
Definition: mshr.cc:691
gem5::MSHR::Target::FromSnoop
@ FromSnoop
Definition: mshr.hh:136
gem5::MSHR::TargetList::needsWritable
bool needsWritable
Definition: mshr.hh:173
gem5::MSHR::handleSnoop
bool handleSnoop(PacketPtr target, Counter order)
Definition: mshr.cc:423
gem5::statistics::Counter
double Counter
All counters are of 64-bit values.
Definition: types.hh:47
gem5::MSHR::clearDownstreamPending
void clearDownstreamPending()
Definition: mshr.cc:333
gem5::MSHR::promoteReadable
void promoteReadable()
Promotes deferred targets that do not require writable.
Definition: mshr.cc:643
logging.hh
gem5::QueueEntry
A queue entry base class, to be used by both the MSHRs and write-queue entries.
Definition: queue_entry.hh:62
gem5::MSHR::allocate
void allocate(Addr blk_addr, unsigned blk_size, PacketPtr pkt, Tick when_ready, Counter _order, bool alloc_on_fill)
Allocate a miss to this MSHR.
Definition: mshr.cc:303
gem5::Packet::fromCache
bool fromCache() const
Definition: packet.hh:601
gem5::Packet::trySatisfyFunctional
bool trySatisfyFunctional(PacketPtr other)
Check a functional request against a memory value stored in another packet (i.e.
Definition: packet.hh:1358
gem5::replaceUpgrade
static void replaceUpgrade(PacketPtr pkt)
Definition: mshr.cc:189
gem5::MSHR::hasTargets
bool hasTargets() const
Returns true if there are targets left.
Definition: mshr.hh:451
gem5::MSHR::TargetList::isReset
bool isReset() const
Tests if the flags of this TargetList have their default values.
Definition: mshr.hh:243
gem5::MSHR::extractServiceableTargets
TargetList extractServiceableTargets(PacketPtr pkt)
Extracts the subset of the targets that can be serviced given a received response.
Definition: mshr.cc:547
gem5::MSHR::deallocate
void deallocate()
Mark this MSHR as free.
Definition: mshr.cc:364
gem5::Packet::isExpressSnoop
bool isExpressSnoop() const
Definition: packet.hh:689
trace.hh
gem5::MSHR::Target::FromPrefetcher
@ FromPrefetcher
Definition: mshr.hh:137
gem5::Request::PRIVILEGED
@ PRIVILEGED
This request is made in privileged mode.
Definition: request.hh:137
gem5::MSHR::MSHR
MSHR(const std::string &name)
A simple constructor.
Definition: mshr.cc:62
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::MSHR::hasPostDowngrade
bool hasPostDowngrade() const
Definition: mshr.hh:334
gem5::MemCmd::ReadRespWithInvalidate
@ ReadRespWithInvalidate
Definition: packet.hh:88
gem5::QueueEntry::inService
bool inService
True if the entry has been sent downstream.
Definition: queue_entry.hh:110
gem5::Packet::getSize
unsigned getSize() const
Definition: packet.hh:791
gem5::Packet::hasRespData
bool hasRespData() const
Definition: packet.hh:604
gem5::Packet::isInvalidate
bool isInvalidate() const
Definition: packet.hh:598
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84

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