gem5  v22.0.0.2
Public Member Functions | Public Attributes | Protected Member Functions | Private Member Functions | Private Attributes | List of all members
gem5::memory::HBMCtrl Class Reference

HBM2 is divided into two pseudo channels which have independent data buses but share a command bus (separate row and column command bus). More...

#include <hbm_ctrl.hh>

Inheritance diagram for gem5::memory::HBMCtrl:
gem5::memory::MemCtrl gem5::memory::qos::MemCtrl gem5::ClockedObject gem5::SimObject gem5::Clocked gem5::EventManager gem5::Serializable gem5::Drainable gem5::statistics::Group gem5::Named

Public Member Functions

 HBMCtrl (const HBMCtrlParams &p)
 
void pruneRowBurstTick ()
 
void pruneColBurstTick ()
 
Tick verifySingleCmd (Tick cmd_tick, Tick max_cmds_per_burst, bool row_cmd) override
 Check for command bus contention for single cycle command. More...
 
Tick verifyMultiCmd (Tick cmd_tick, Tick max_cmds_per_burst, Tick max_multi_cmd_split=0) override
 Check for command bus contention for multi-cycle (2 currently) command. More...
 
bool readQueueFullPC0 (unsigned int pkt_count) const
 Check if the read queue partition of both pseudo channels has room for more entries. More...
 
bool readQueueFullPC1 (unsigned int pkt_count) const
 
bool readQueueFull (unsigned int pkt_count) const
 
bool writeQueueFullPC0 (unsigned int pkt_count) const
 Check if the write queue partition of both pseudo channels has room for more entries. More...
 
bool writeQueueFullPC1 (unsigned int pkt_count) const
 
bool respondEventPC1Scheduled () const
 Is there a respondEvent for pseudo channel 1 scheduled? More...
 
bool requestEventScheduled (uint8_t pseudo_channel) const override
 Is there a read/write burst Event scheduled? More...
 
void restartScheduler (Tick tick, uint8_t pseudo_channel) override
 restart the controller scheduler More...
 
virtual void init () override
 init() is called after all C++ SimObjects have been created and all ports are connected. More...
 
virtual void startup () override
 startup() is the final initialization call before simulation. More...
 
virtual void drainResume () override
 Resume execution after a successful drain. More...
 
- Public Member Functions inherited from gem5::memory::MemCtrl
 MemCtrl (const MemCtrlParams &p)
 
virtual bool allIntfDrained () const
 Ensure that all interfaced have drained commands. More...
 
DrainState drain () override
 Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are partially executed or are partially in flight. More...
 
bool respondEventScheduled () const
 Is there a respondEvent scheduled? More...
 
bool inReadBusState (bool next_state) const
 Check the current direction of the memory channel. More...
 
bool inWriteBusState (bool next_state) const
 Check the current direction of the memory channel. More...
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Get a port with a given name and index. More...
 
- Public Member Functions inherited from gem5::memory::qos::MemCtrl
 MemCtrl (const QoSMemCtrlParams &)
 QoS Memory base class. More...
 
virtual ~MemCtrl ()
 
BusState getBusState () const
 Gets the current bus state. More...
 
BusState getBusStateNext () const
 Gets the next bus state. More...
 
bool hasRequestor (RequestorID id) const
 hasRequestor returns true if the selected requestor(ID) has been registered in the memory controller, which happens if the memory controller has received at least a packet from that requestor. More...
 
uint64_t getReadQueueSize (const uint8_t prio) const
 Gets a READ queue size. More...
 
uint64_t getWriteQueueSize (const uint8_t prio) const
 Gets a WRITE queue size. More...
 
uint64_t getTotalReadQueueSize () const
 Gets the total combined READ queues size. More...
 
uint64_t getTotalWriteQueueSize () const
 Gets the total combined WRITE queues size. More...
 
Tick getServiceTick (const uint8_t prio) const
 Gets the last service tick related to a QoS Priority. More...
 
uint8_t numPriorities () const
 Gets the total number of priority levels in the QoS memory controller. More...
 
Systemsystem () const
 read the system pointer More...
 
- Public Member Functions inherited from gem5::ClockedObject
 ClockedObject (const ClockedObjectParams &p)
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::SimObject
const Paramsparams () const
 
 SimObject (const Params &p)
 
virtual ~SimObject ()
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint. More...
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint. More...
 
virtual void regProbePoints ()
 Register probe points for this object. More...
 
virtual void regProbeListeners ()
 Register probe listeners for this object. More...
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object. More...
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining. More...
 
virtual void memWriteback ()
 Write back dirty buffers to memory using functional writes. More...
 
virtual void memInvalidate ()
 Invalidate the contents of memory buffers. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue. More...
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from gem5::Drainable
DrainState drainState () const
 Return the current drain state of an object. More...
 
virtual void notifyFork ()
 Notify a child process of a fork. More...
 
- Public Member Functions inherited from gem5::statistics::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group. More...
 
virtual ~Group ()
 
virtual void regStats ()
 Callback to set stat parameters. More...
 
virtual void resetStats ()
 Callback to reset stats. More...
 
virtual void preDumpStats ()
 Callback before stats are dumped. More...
 
void addStat (statistics::Info *info)
 Register a stat with this group. More...
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object. More...
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object. More...
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block. More...
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group. More...
 
void mergeStatGroup (Group *block)
 Merge the contents (stats & children) of a block to this block. More...
 
 Group ()=delete
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 
- Public Member Functions inherited from gem5::Clocked
void updateClockPeriod ()
 Update the tick to the current tick. More...
 
Tick clockEdge (Cycles cycles=Cycles(0)) const
 Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...
 
Cycles curCycle () const
 Determine the current cycle, corresponding to a tick aligned to a clock edge. More...
 
Tick nextCycle () const
 Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...
 
uint64_t frequency () const
 
Tick clockPeriod () const
 
double voltage () const
 
Cycles ticksToCycles (Tick t) const
 
Tick cyclesToTicks (Cycles c) const
 

Public Attributes

EventFunctionWrapper nextReqEventPC1
 NextReq and Respond events for second pseudo channel. More...
 
EventFunctionWrapper respondEventPC1
 
uint64_t readQueueSizePC0 = 0
 Following counters are used to keep track of the entries in read/write queue for each pseudo channel (useful when the partitioned queues are used) More...
 
uint64_t readQueueSizePC1 = 0
 
uint64_t writeQueueSizePC0 = 0
 
uint64_t writeQueueSizePC1 = 0
 
std::deque< MemPacket * > respQueuePC1
 Response queue for pkts sent to second pseudo channel The first pseudo channel uses MemCtrl::respQueue. More...
 
std::unordered_multiset< TickrowBurstTicks
 Holds count of row commands issued in burst window starting at defined Tick. More...
 
std::unordered_multiset< TickcolBurstTicks
 This is used to ensure that the column command bandwidth does not exceed the allowable media constraints. More...
 
DRAMInterfacepc0Int
 Pointers to interfaces of the two pseudo channels pc0Int is same as MemCtrl::dram (it will be pointing to the DRAM interface defined in base MemCtrl) More...
 
DRAMInterfacepc1Int
 
bool partitionedQ
 This indicates if the R/W queues will be partitioned among pseudo channels. More...
 
- Public Attributes inherited from gem5::ClockedObject
PowerStatepowerState
 

Protected Member Functions

bool respQEmpty () override
 
Tick recvAtomic (PacketPtr pkt) override
 
Tick recvAtomicBackdoor (PacketPtr pkt, MemBackdoorPtr &backdoor) override
 
void recvFunctional (PacketPtr pkt) override
 
bool recvTimingReq (PacketPtr pkt) override
 
- Protected Member Functions inherited from gem5::memory::MemCtrl
virtual void processNextReqEvent (MemInterface *mem_intr, MemPacketQueue &resp_queue, EventFunctionWrapper &resp_event, EventFunctionWrapper &next_req_event, bool &retry_wr_req)
 Bunch of things requires to setup "events" in gem5 When event "respondEvent" occurs for example, the method processRespondEvent is called; no parameters are allowed in these methods. More...
 
virtual void processRespondEvent (MemInterface *mem_intr, MemPacketQueue &queue, EventFunctionWrapper &resp_event, bool &retry_rd_req)
 
bool readQueueFull (unsigned int pkt_count) const
 Check if the read queue has room for more entries. More...
 
bool writeQueueFull (unsigned int pkt_count) const
 Check if the write queue has room for more entries. More...
 
bool addToReadQueue (PacketPtr pkt, unsigned int pkt_count, MemInterface *mem_intr)
 When a new read comes in, first check if the write q has a pending request to the same address. If not, decode the address to populate rank/bank/row, create one or mutliple "mem_pkt", and push them to the back of the read queue. More...
 
void addToWriteQueue (PacketPtr pkt, unsigned int pkt_count, MemInterface *mem_intr)
 Decode the incoming pkt, create a mem_pkt and push to the back of the write queue. More...
 
virtual Tick doBurstAccess (MemPacket *mem_pkt, MemInterface *mem_intr)
 Actually do the burst based on media specific access function. More...
 
virtual void accessAndRespond (PacketPtr pkt, Tick static_latency, MemInterface *mem_intr)
 When a packet reaches its "readyTime" in the response Q, use the "access()" method in AbstractMemory to actually create the response packet, and send it back to the outside world requestor. More...
 
virtual bool packetReady (MemPacket *pkt, MemInterface *mem_intr)
 Determine if there is a packet that can issue. More...
 
virtual Tick minReadToWriteDataGap ()
 Calculate the minimum delay used when scheduling a read-to-write transision. More...
 
virtual Tick minWriteToReadDataGap ()
 Calculate the minimum delay used when scheduling a write-to-read transision. More...
 
virtual MemPacketQueue::iterator chooseNext (MemPacketQueue &queue, Tick extra_col_delay, MemInterface *mem_intr)
 The memory schduler/arbiter - picks which request needs to go next, based on the specified policy such as FCFS or FR-FCFS and moves it to the head of the queue. More...
 
virtual std::pair< MemPacketQueue::iterator, TickchooseNextFRFCFS (MemPacketQueue &queue, Tick extra_col_delay, MemInterface *mem_intr)
 For FR-FCFS policy reorder the read/write queue depending on row buffer hits and earliest bursts available in memory. More...
 
Tick getBurstWindow (Tick cmd_tick)
 Calculate burst window aligned tick. More...
 
void printQs () const
 Used for debugging to observe the contents of the queues. More...
 
virtual Addr burstAlign (Addr addr, MemInterface *mem_intr) const
 Burst-align an address. More...
 
virtual bool pktSizeCheck (MemPacket *mem_pkt, MemInterface *mem_intr) const
 Check if mem pkt's size is sane. More...
 
std::vector< MemPacketQueue > & selQueue (bool is_read)
 Select either the read or write queue. More...
 
virtual bool memBusy (MemInterface *mem_intr)
 Checks if the memory interface is already busy. More...
 
virtual void nonDetermReads (MemInterface *mem_intr)
 Will access memory interface and select non-deterministic reads to issue. More...
 
virtual bool nvmWriteBlock (MemInterface *mem_intr)
 Will check if all writes are for nvm interface and nvm's write resp queue is full. More...
 
bool recvFunctionalLogic (PacketPtr pkt, MemInterface *mem_intr)
 
Tick recvAtomicLogic (PacketPtr pkt, MemInterface *mem_intr)
 
- Protected Member Functions inherited from gem5::memory::qos::MemCtrl
void addRequestor (const RequestorID id)
 Initializes dynamically counters and statistics for a given Requestor. More...
 
void logRequest (BusState dir, RequestorID id, uint8_t _qos, Addr addr, uint64_t entries)
 Called upon receiving a request or updates statistics and updates queues status. More...
 
void logResponse (BusState dir, RequestorID id, uint8_t _qos, Addr addr, uint64_t entries, double delay)
 Called upon receiving a response, updates statistics and updates queues status. More...
 
template<typename Queues >
uint8_t qosSchedule (std::initializer_list< Queues * > queues_ptr, uint64_t queue_entry_size, const PacketPtr pkt)
 Assign priority to a packet by executing the configured QoS policy. More...
 
uint8_t schedule (RequestorID id, uint64_t data)
 
uint8_t schedule (const PacketPtr pkt)
 
BusState selectNextBusState ()
 Returns next bus direction (READ or WRITE) based on configured policy. More...
 
void setCurrentBusState ()
 Set current bus direction (READ or WRITE) from next selected one. More...
 
void recordTurnaroundStats ()
 Record statistics on turnarounds based on busStateNext and busState values. More...
 
template<typename Queues >
void escalate (std::initializer_list< Queues * > queues, uint64_t queue_entry_size, RequestorID id, uint8_t tgt_prio)
 Escalates/demotes priority of all packets belonging to the passed requestor to given priority value. More...
 
template<typename Queues >
void escalateQueues (Queues &queues, uint64_t queue_entry_size, RequestorID id, uint8_t curr_prio, uint8_t tgt_prio)
 Escalates/demotes priority of all packets belonging to the passed requestor to given priority value in a specified cluster of queues (e.g. More...
 
- Protected Member Functions inherited from gem5::Drainable
 Drainable ()
 
virtual ~Drainable ()
 
void signalDrainDone () const
 Signal that an object is drained. More...
 
- Protected Member Functions inherited from gem5::Clocked
 Clocked (ClockDomain &clk_domain)
 Create a clocked object and set the clock domain based on the parameters. More...
 
 Clocked (Clocked &)=delete
 
Clockedoperator= (Clocked &)=delete
 
virtual ~Clocked ()
 Virtual destructor due to inheritance. More...
 
void resetClock () const
 Reset the object's clock using the current global tick value. More...
 
virtual void clockPeriodUpdated ()
 A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More...
 

Private Member Functions

void pruneBurstTick () override
 Remove commands that have already issued from rowBurstTicks and colBurstTicks. More...
 
AddrRangeList getAddrRanges () override
 

Private Attributes

bool retryRdReqPC1
 Remember if we have to retry a request for second pseudo channel. More...
 
bool retryWrReqPC1
 

Additional Inherited Members

- Public Types inherited from gem5::memory::qos::MemCtrl
enum  BusState { READ, WRITE }
 Bus Direction. More...
 
- Public Types inherited from gem5::ClockedObject
using Params = ClockedObjectParams
 Parameters of ClockedObject. More...
 
- Public Types inherited from gem5::SimObject
typedef SimObjectParams Params
 
- Static Public Member Functions inherited from gem5::SimObject
static void serializeAll (const std::string &cpt_dir)
 Create a checkpoint by serializing all SimObjects in the system. More...
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it. More...
 
static void setSimObjectResolver (SimObjectResolver *resolver)
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
static SimObjectResolvergetSimObjectResolver ()
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section. More...
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it. More...
 
- Protected Attributes inherited from gem5::memory::MemCtrl
MemoryPort port
 Our incoming port, for a multi-ported controller add a crossbar in front of it. More...
 
bool isTimingMode
 Remember if the memory system is in timing mode. More...
 
bool retryRdReq
 Remember if we have to retry a request when available. More...
 
bool retryWrReq
 
EventFunctionWrapper nextReqEvent
 
EventFunctionWrapper respondEvent
 
std::vector< MemPacketQueuereadQueue
 The controller's main read and write queues, with support for QoS reordering. More...
 
std::vector< MemPacketQueuewriteQueue
 
std::unordered_set< AddrisInWriteQueue
 To avoid iterating over the write queue to check for overlapping transactions, maintain a set of burst addresses that are currently queued. More...
 
std::deque< MemPacket * > respQueue
 Response queue where read packets wait after we're done working with them, but it's not time to send the response yet. More...
 
std::unordered_multiset< TickburstTicks
 Holds count of commands issued in burst window starting at defined Tick. More...
 
MemInterfacedram
 
uint32_t readBufferSize
 The following are basic design parameters of the memory controller, and are initialized based on parameter values. More...
 
uint32_t writeBufferSize
 
uint32_t writeHighThreshold
 
uint32_t writeLowThreshold
 
const uint32_t minWritesPerSwitch
 
const uint32_t minReadsPerSwitch
 
uint32_t writesThisTime
 
uint32_t readsThisTime
 
enums::MemSched memSchedPolicy
 Memory controller configuration initialized based on parameter values. More...
 
const Tick frontendLatency
 Pipeline latency of the controller frontend. More...
 
const Tick backendLatency
 Pipeline latency of the backend and PHY. More...
 
const Tick commandWindow
 Length of a command window, used to check command bandwidth. More...
 
Tick nextBurstAt
 Till when must we wait before issuing next RD/WR burst? More...
 
Tick prevArrival
 
Tick nextReqTime
 The soonest you have to start thinking about the next request is the longest access time that can occur before nextBurstAt. More...
 
CtrlStats stats
 
std::unique_ptr< PacketpendingDelete
 Upstream caches need this packet until true is returned, so hold it for deletion until a subsequent call. More...
 
- Protected Attributes inherited from gem5::memory::qos::MemCtrl
const std::unique_ptr< Policypolicy
 QoS Policy, assigns QoS priority to the incoming packets. More...
 
const std::unique_ptr< TurnaroundPolicyturnPolicy
 QoS Bus Turnaround Policy: selects the bus direction (READ/WRITE) More...
 
const std::unique_ptr< QueuePolicyqueuePolicy
 QoS Queue Policy: selects packet among same-priority queue. More...
 
const uint8_t _numPriorities
 Number of configured QoS priorities. More...
 
const bool qosPriorityEscalation
 Enables QoS priority escalation. More...
 
const bool qosSyncroScheduler
 Enables QoS synchronized scheduling invokes the QoS scheduler on all requestors, at every packet arrival. More...
 
std::unordered_map< RequestorID, const std::string > requestors
 Hash of requestor ID - requestor name. More...
 
std::unordered_map< RequestorID, std::vector< uint64_t > > packetPriorities
 Hash of requestors - number of packets queued per priority. More...
 
std::unordered_map< RequestorID, std::unordered_map< uint64_t, std::deque< uint64_t > > > requestTimes
 Hash of requestors - address of request - queue of times of request. More...
 
std::vector< TickserviceTick
 Vector of QoS priorities/last service time. More...
 
std::vector< uint64_t > readQueueSizes
 Read request packets queue length in #packets, per QoS priority. More...
 
std::vector< uint64_t > writeQueueSizes
 Write request packets queue length in #packets, per QoS priority. More...
 
uint64_t totalReadQueueSize
 Total read request packets queue length in #packets. More...
 
uint64_t totalWriteQueueSize
 Total write request packets queue length in #packets. More...
 
BusState busState
 Bus state used to control the read/write switching and drive the scheduling of the next request. More...
 
BusState busStateNext
 bus state for next request event triggered More...
 
gem5::memory::qos::MemCtrl::MemCtrlStats stats
 
System_system
 Pointer to the System object. More...
 
- Protected Attributes inherited from gem5::SimObject
const SimObjectParams & _params
 Cached copy of the object parameters. More...
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue. More...
 

Detailed Description

HBM2 is divided into two pseudo channels which have independent data buses but share a command bus (separate row and column command bus).

Therefore, the HBM memory controller should be able to control both pseudo channels. This HBM memory controller inherits from gem5's default memory controller (pseudo channel 0) and manages the additional HBM pseudo channel (pseudo channel 1).

Definition at line 64 of file hbm_ctrl.hh.

Constructor & Destructor Documentation

◆ HBMCtrl()

gem5::memory::HBMCtrl::HBMCtrl ( const HBMCtrlParams &  p)

Member Function Documentation

◆ drainResume()

void gem5::memory::HBMCtrl::drainResume ( )
overridevirtual

◆ getAddrRanges()

AddrRangeList gem5::memory::HBMCtrl::getAddrRanges ( )
overrideprivatevirtual

Reimplemented from gem5::memory::MemCtrl.

Definition at line 492 of file hbm_ctrl.cc.

References gem5::memory::AbstractMemory::getAddrRange(), pc0Int, and pc1Int.

◆ init()

void gem5::memory::HBMCtrl::init ( )
overridevirtual

init() is called after all C++ SimObjects have been created and all ports are connected.

Initializations that are independent of unserialization but rely on a fully instantiated and connected SimObject graph should be done here.

Reimplemented from gem5::memory::MemCtrl.

Definition at line 86 of file hbm_ctrl.cc.

References gem5::memory::MemCtrl::init().

◆ pruneBurstTick()

void gem5::memory::HBMCtrl::pruneBurstTick ( )
overrideprivatevirtual

Remove commands that have already issued from rowBurstTicks and colBurstTicks.

Reimplemented from gem5::memory::MemCtrl.

Definition at line 360 of file hbm_ctrl.cc.

References pruneColBurstTick(), and pruneRowBurstTick().

◆ pruneColBurstTick()

void gem5::memory::HBMCtrl::pruneColBurstTick ( )

Definition at line 347 of file hbm_ctrl.cc.

References colBurstTicks, gem5::curTick(), DPRINTF, and gem5::memory::MemCtrl::getBurstWindow().

Referenced by pruneBurstTick().

◆ pruneRowBurstTick()

void gem5::memory::HBMCtrl::pruneRowBurstTick ( )

Definition at line 334 of file hbm_ctrl.cc.

References gem5::curTick(), DPRINTF, gem5::memory::MemCtrl::getBurstWindow(), and rowBurstTicks.

Referenced by pruneBurstTick().

◆ readQueueFull()

bool gem5::memory::HBMCtrl::readQueueFull ( unsigned int  pkt_count) const

◆ readQueueFullPC0()

bool gem5::memory::HBMCtrl::readQueueFullPC0 ( unsigned int  pkt_count) const

Check if the read queue partition of both pseudo channels has room for more entries.

This is used when the HBM ctrl is run with partitioned queues

Parameters
pkt_countThe number of entries needed in the read queue
Returns
true if read queue partition is full, false otherwise

Definition at line 176 of file hbm_ctrl.cc.

References DPRINTF, gem5::memory::MemCtrl::readBufferSize, readQueueSizePC0, and gem5::memory::MemCtrl::respQueue.

Referenced by recvTimingReq().

◆ readQueueFullPC1()

bool gem5::memory::HBMCtrl::readQueueFullPC1 ( unsigned int  pkt_count) const

Definition at line 189 of file hbm_ctrl.cc.

References DPRINTF, gem5::memory::MemCtrl::readBufferSize, readQueueSizePC1, and respQueuePC1.

Referenced by recvTimingReq().

◆ recvAtomic()

Tick gem5::memory::HBMCtrl::recvAtomic ( PacketPtr  pkt)
overrideprotectedvirtual

◆ recvAtomicBackdoor()

Tick gem5::memory::HBMCtrl::recvAtomicBackdoor ( PacketPtr  pkt,
MemBackdoorPtr backdoor 
)
overrideprotectedvirtual

◆ recvFunctional()

void gem5::memory::HBMCtrl::recvFunctional ( PacketPtr  pkt)
overrideprotectedvirtual

◆ recvTimingReq()

bool gem5::memory::HBMCtrl::recvTimingReq ( PacketPtr  pkt)
overrideprotectedvirtual

◆ requestEventScheduled()

bool gem5::memory::HBMCtrl::requestEventScheduled ( uint8_t  pseudo_channel) const
inlineoverridevirtual

Is there a read/write burst Event scheduled?

Returns
true if event is scheduled

Reimplemented from gem5::memory::MemCtrl.

Definition at line 221 of file hbm_ctrl.hh.

References nextReqEventPC1, gem5::memory::MemCtrl::requestEventScheduled(), and gem5::Event::scheduled().

◆ respondEventPC1Scheduled()

bool gem5::memory::HBMCtrl::respondEventPC1Scheduled ( ) const
inline

Is there a respondEvent for pseudo channel 1 scheduled?

Returns
true if event is scheduled

Definition at line 211 of file hbm_ctrl.hh.

References respondEventPC1, and gem5::Event::scheduled().

◆ respQEmpty()

bool gem5::memory::HBMCtrl::respQEmpty ( )
inlineoverrideprotectedvirtual

Reimplemented from gem5::memory::MemCtrl.

Definition at line 69 of file hbm_ctrl.hh.

References gem5::memory::MemCtrl::respQueue, and respQueuePC1.

◆ restartScheduler()

void gem5::memory::HBMCtrl::restartScheduler ( Tick  tick,
uint8_t  pseudo_channel 
)
inlineoverridevirtual

restart the controller scheduler

Parameters
Tickto schedule next event
pseudo_channelpseudo channel number for which scheduler needs to restart

Reimplemented from gem5::memory::MemCtrl.

Definition at line 238 of file hbm_ctrl.hh.

References nextReqEventPC1, gem5::memory::MemCtrl::restartScheduler(), gem5::memory::qos::MemCtrl::schedule(), and gem5::Clocked::tick.

◆ startup()

void gem5::memory::HBMCtrl::startup ( )
overridevirtual

startup() is the final initialization call before simulation.

All state is initialized (including unserialized state, if any, such as the curTick() value), so this is the appropriate place to schedule initial event(s) for objects that need them.

Reimplemented from gem5::memory::MemCtrl.

Definition at line 92 of file hbm_ctrl.cc.

References gem5::memory::DRAMInterface::commandOffset(), gem5::curTick(), gem5::System::isTimingMode(), gem5::memory::MemCtrl::isTimingMode, gem5::memory::MemInterface::nextBurstAt, pc1Int, gem5::memory::MemCtrl::startup(), and gem5::memory::qos::MemCtrl::system().

Referenced by drainResume().

◆ verifyMultiCmd()

Tick gem5::memory::HBMCtrl::verifyMultiCmd ( Tick  cmd_tick,
Tick  max_cmds_per_burst,
Tick  max_multi_cmd_split = 0 
)
overridevirtual

Check for command bus contention for multi-cycle (2 currently) command.

If there is contention, shift command(s) to next burst. Check verifies that the commands issued per burst is less than a defined max number, maxCommandsPerWindow. Therefore, contention per cycle is not verified and instead is done based on a burst window. For HBM2, only row cmds (activate) can be multi-cycle

Parameters
cmd_tickInitial tick of command, to be verified
max_multi_cmd_splitMaximum delay between commands
max_cmds_per_burstNumber of commands that can issue in a burst window
Returns
tick for command issue without contention

Reimplemented from gem5::memory::MemCtrl.

Definition at line 404 of file hbm_ctrl.cc.

References gem5::memory::MemCtrl::commandWindow, DPRINTF, gem5::memory::MemCtrl::getBurstWindow(), and rowBurstTicks.

◆ verifySingleCmd()

Tick gem5::memory::HBMCtrl::verifySingleCmd ( Tick  cmd_tick,
Tick  max_cmds_per_burst,
bool  row_cmd 
)
overridevirtual

Check for command bus contention for single cycle command.

If there is contention, shift command to next burst. Check verifies that the commands issued per burst is less than a defined max number, maxCommandsPerWindow. Therefore, contention per cycle is not verified and instead is done based on a burst window.

Parameters
cmd_tickInitial tick of command, to be verified
max_cmds_per_burstNumber of commands that can issue in a burst window
Returns
tick for command issue without contention

Reimplemented from gem5::memory::MemCtrl.

Definition at line 367 of file hbm_ctrl.cc.

References colBurstTicks, gem5::memory::MemCtrl::commandWindow, DPRINTF, gem5::memory::MemCtrl::getBurstWindow(), and rowBurstTicks.

◆ writeQueueFullPC0()

bool gem5::memory::HBMCtrl::writeQueueFullPC0 ( unsigned int  pkt_count) const

Check if the write queue partition of both pseudo channels has room for more entries.

This is used when the HBM ctrl is run with partitioned queues

Parameters
pkt_countThe number of entries needed in the write queue
Returns
true if write queue is full, false otherwise

Definition at line 154 of file hbm_ctrl.cc.

References DPRINTF, gem5::memory::MemCtrl::writeBufferSize, and writeQueueSizePC0.

Referenced by recvTimingReq().

◆ writeQueueFullPC1()

bool gem5::memory::HBMCtrl::writeQueueFullPC1 ( unsigned int  pkt_count) const

Definition at line 165 of file hbm_ctrl.cc.

References DPRINTF, gem5::memory::MemCtrl::writeBufferSize, and writeQueueSizePC1.

Referenced by recvTimingReq().

Member Data Documentation

◆ colBurstTicks

std::unordered_multiset<Tick> gem5::memory::HBMCtrl::colBurstTicks

This is used to ensure that the column command bandwidth does not exceed the allowable media constraints.

HBM2 has separate command bus for row and column commands

Definition at line 188 of file hbm_ctrl.hh.

Referenced by pruneColBurstTick(), and verifySingleCmd().

◆ nextReqEventPC1

EventFunctionWrapper gem5::memory::HBMCtrl::nextReqEventPC1

NextReq and Respond events for second pseudo channel.

Definition at line 134 of file hbm_ctrl.hh.

Referenced by HBMCtrl(), recvTimingReq(), requestEventScheduled(), and restartScheduler().

◆ partitionedQ

bool gem5::memory::HBMCtrl::partitionedQ

This indicates if the R/W queues will be partitioned among pseudo channels.

Definition at line 202 of file hbm_ctrl.hh.

Referenced by recvTimingReq().

◆ pc0Int

DRAMInterface* gem5::memory::HBMCtrl::pc0Int

Pointers to interfaces of the two pseudo channels pc0Int is same as MemCtrl::dram (it will be pointing to the DRAM interface defined in base MemCtrl)

Definition at line 195 of file hbm_ctrl.hh.

Referenced by getAddrRanges(), recvAtomic(), recvAtomicBackdoor(), recvFunctional(), and recvTimingReq().

◆ pc1Int

DRAMInterface* gem5::memory::HBMCtrl::pc1Int

◆ readQueueSizePC0

uint64_t gem5::memory::HBMCtrl::readQueueSizePC0 = 0

Following counters are used to keep track of the entries in read/write queue for each pseudo channel (useful when the partitioned queues are used)

Definition at line 165 of file hbm_ctrl.hh.

Referenced by readQueueFullPC0().

◆ readQueueSizePC1

uint64_t gem5::memory::HBMCtrl::readQueueSizePC1 = 0

Definition at line 166 of file hbm_ctrl.hh.

Referenced by readQueueFullPC1().

◆ respondEventPC1

EventFunctionWrapper gem5::memory::HBMCtrl::respondEventPC1

Definition at line 135 of file hbm_ctrl.hh.

Referenced by HBMCtrl(), and respondEventPC1Scheduled().

◆ respQueuePC1

std::deque<MemPacket*> gem5::memory::HBMCtrl::respQueuePC1

Response queue for pkts sent to second pseudo channel The first pseudo channel uses MemCtrl::respQueue.

Definition at line 174 of file hbm_ctrl.hh.

Referenced by HBMCtrl(), readQueueFull(), readQueueFullPC1(), and respQEmpty().

◆ retryRdReqPC1

bool gem5::memory::HBMCtrl::retryRdReqPC1
private

Remember if we have to retry a request for second pseudo channel.

Definition at line 79 of file hbm_ctrl.hh.

Referenced by recvTimingReq().

◆ retryWrReqPC1

bool gem5::memory::HBMCtrl::retryWrReqPC1
private

Definition at line 80 of file hbm_ctrl.hh.

Referenced by HBMCtrl(), and recvTimingReq().

◆ rowBurstTicks

std::unordered_multiset<Tick> gem5::memory::HBMCtrl::rowBurstTicks

Holds count of row commands issued in burst window starting at defined Tick.

This is used to ensure that the row command bandwidth does not exceed the allowable media constraints.

Definition at line 181 of file hbm_ctrl.hh.

Referenced by pruneRowBurstTick(), verifyMultiCmd(), and verifySingleCmd().

◆ writeQueueSizePC0

uint64_t gem5::memory::HBMCtrl::writeQueueSizePC0 = 0

Definition at line 167 of file hbm_ctrl.hh.

Referenced by writeQueueFullPC0().

◆ writeQueueSizePC1

uint64_t gem5::memory::HBMCtrl::writeQueueSizePC1 = 0

Definition at line 168 of file hbm_ctrl.hh.

Referenced by writeQueueFullPC1().


The documentation for this class was generated from the following files:

Generated on Thu Jul 28 2022 13:34:08 for gem5 by doxygen 1.8.17